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git01.mediatek.com / filogic / uboot / d169b1f0230a15d029125119020d38dcfff6727b / . / include / configs / sun7i.h
blob: ccec50c328171d9fe4f11a1a1c3f67a287f52267 [file] [log] [blame]
Ian Campbell6efe3692014-05-05 11:52:26 +0100[diff] [blame]1/*
2 * (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net>
3 * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
4 *
5 * Configuration settings for the Allwinner A20 (sun7i) CPU
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * A20 specific configuration
14 */
Henrik Nordstromaa382ad2014-06-13 22:55:50 +0200[diff] [blame]15#define CONFIG_CLK_FULL_SPEED 912000000
Ian Campbell6efe3692014-05-05 11:52:26 +0100[diff] [blame]16
17#define CONFIG_SYS_PROMPT "sun7i# "
Hans de Goede7de7fe42014-10-13 07:41:16 +0200[diff] [blame]18#define CONFIG_MACH_TYPE 4283
Ian Campbell6efe3692014-05-05 11:52:26 +0100[diff] [blame]19
Roman Byshko5d6e0532014-07-24 22:54:23 +0200[diff] [blame]20#ifdef CONFIG_USB_EHCI
21#define CONFIG_USB_EHCI_SUNXI
Roman Byshko5d6e0532014-07-24 22:54:23 +0200[diff] [blame]22#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Roman Byshko5d6e0532014-07-24 22:54:23 +0200[diff] [blame]23#endif
24
Marc Zyngier0237c632014-07-18 21:06:38 +0100[diff] [blame]25#define CONFIG_ARMV7_PSCI 1
Marc Zyngier0237c632014-07-18 21:06:38 +0100[diff] [blame]26#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
Marc Zyngierabf5b312014-07-18 21:06:39 +0100[diff] [blame]27#define CONFIG_SYS_CLK_FREQ 24000000
Xiubo Libbd7d462014-12-11 11:15:26 -0800[diff] [blame]28#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
Marc Zyngier0237c632014-07-18 21:06:38 +0100[diff] [blame]29
Ian Campbell6efe3692014-05-05 11:52:26 +0100[diff] [blame]30/*
31 * Include common sunxi configuration where most the settings are
32 */
33#include <configs/sunxi-common.h>
34
35#endif /* __CONFIG_H */