blob: 5601cb4797d8c7401dd06c074be85f68b464118c [file] [log] [blame]
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamada608ed2c2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010017#define CONFIG_JUPITER 1 /* ... on Jupiter board */
Anatolij Gustschinccab47e2015-08-13 23:57:56 +020018#define CONFIG_SYS_GENERIC_BOARD
19#define CONFIG_DISPLAY_BOARDINFO
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010020
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020021/*
22 * Valid values for CONFIG_SYS_TEXT_BASE are:
23 * 0xFFF00000 boot high (standard configuration)
24 * 0x00100000 boot from RAM (for testing only)
25 */
26#ifndef CONFIG_SYS_TEXT_BASE
27#define CONFIG_SYS_TEXT_BASE 0xFFF00000
28#endif
29
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020030#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010031
32#define CONFIG_BOARD_EARLY_INIT_R 1
33#define CONFIG_BOARD_EARLY_INIT_F 1
34
Becky Bruce03ea1be2008-05-08 19:02:12 -050035#define CONFIG_HIGH_BATS 1 /* High BATs supported */
36
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010037/*
38 * Serial console configuration
39 */
40#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
41#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020042#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010043
44/*
45 * PCI Mapping:
46 * 0x40000000 - 0x4fffffff - PCI Memory
47 * 0x50000000 - 0x50ffffff - PCI IO Space
48 */
Wolfgang Denk2f7f2d92007-03-08 21:49:27 +010049/*#define CONFIG_PCI */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010050
51#if defined(CONFIG_PCI)
52#define CONFIG_PCI_PNP 1
53#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liew521f97b2008-03-30 01:19:06 -050054#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010055
56#define CONFIG_PCI_MEM_BUS 0x40000000
57#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
58#define CONFIG_PCI_MEM_SIZE 0x10000000
59
60#define CONFIG_PCI_IO_BUS 0x50000000
61#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
62#define CONFIG_PCI_IO_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010063#endif
64
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_XLB_PIPELINING 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010066
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010067#define CONFIG_MII 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020068#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010069
70/* Partitions */
71#define CONFIG_MAC_PARTITION
72#define CONFIG_DOS_PARTITION
73#define CONFIG_ISO_PARTITION
74
75#define CONFIG_TIMESTAMP /* Print image info with timestamp */
76
Jon Loeligerca8b5662007-07-04 22:32:51 -050077
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010078/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050079 * BOOTP options
80 */
81#define CONFIG_BOOTP_BOOTFILESIZE
82#define CONFIG_BOOTP_BOOTPATH
83#define CONFIG_BOOTP_GATEWAY
84#define CONFIG_BOOTP_HOSTNAME
85
86
87/*
Jon Loeligerca8b5662007-07-04 22:32:51 -050088 * Command line configuration.
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010089 */
Jon Loeligerca8b5662007-07-04 22:32:51 -050090#define CONFIG_CMD_SNTP
91
Jon Loeliger140b69c2007-07-10 09:38:02 -050092#if defined(CONFIG_PCI)
93#define CODFIG_CMD_PCI
94#endif
95
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010096
97/*
98 * Autobooting
99 */
100#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
101
102#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +0100103 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100104 "echo"
105
106#undef CONFIG_BOOTARGS
107
108#define CONFIG_EXTRA_ENV_SETTINGS \
109 "netdev=eth0\0" \
110 "nfsargs=setenv bootargs root=/dev/nfs rw " \
111 "nfsroot=${serverip}:${rootpath}\0" \
112 "ramargs=setenv bootargs root=/dev/ram rw\0" \
113 "addip=setenv bootargs ${bootargs} " \
114 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
115 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100116 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100117 "bootm ${kernel_addr}\0" \
118 "flash_self=run ramargs addip;" \
119 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100120 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100121 "${baudrate}\0" \
122 "contyp=ttyS0\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100123 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100124 "bootm\0" \
125 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100126 "bootfile=/tftpboot/jupiter/uImage\0" \
127 ""
128
129#define CONFIG_BOOTCOMMAND "run flash_self"
130
131/*
132 * IPB Bus clocking configuration.
133 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200134#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100135
136#if 0
137/* pass open firmware flat tree */
Grant Likely8d1e6e72007-09-06 09:46:23 -0600138#define CONFIG_OF_LIBFDT 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100139#define CONFIG_OF_BOARD_SETUP 1
140
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100141#define OF_CPU "PowerPC,5200@0"
142#define OF_SOC "soc5200@f0000000"
143#define OF_TBCLK (bd->bi_busfreq / 8)
144#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
145#endif
146
147#if 0
148/*
149 * I2C configuration
150 */
151#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100153
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200154#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
155#define CONFIG_SYS_I2C_SLAVE 0x7F
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100156
157/*
158 * EEPROM configuration
159 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200160#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
161#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
162#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
163#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100164#endif
165
166/*
167 * Flash configuration
168 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200169#define CONFIG_SYS_FLASH_BASE 0xFF000000
170#define CONFIG_SYS_FLASH_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100171
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200172#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100173
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200174#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100175
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200176#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
177#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100178
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100180
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200181#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200182#define CONFIG_SYS_FLASH_CFI
183#define CONFIG_SYS_FLASH_EMPTY_INFO
184#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
185#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
186#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100187
188/*
189 * Environment settings
190 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200191#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200192#define CONFIG_ENV_SIZE 0x20000
193#define CONFIG_ENV_SECT_SIZE 0x20000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100194#define CONFIG_ENV_OVERWRITE 1
195
Heiko Schocher162bbec2007-03-13 09:40:59 +0100196/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200197#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
198#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Heiko Schocher162bbec2007-03-13 09:40:59 +0100199
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100200/*
201 * Memory map
202 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200203#define CONFIG_SYS_MBAR 0xF0000000
204#define CONFIG_SYS_SDRAM_BASE 0x00000000
205#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100206
207/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200208#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200209#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100210
211
Wolfgang Denk0191e472010-10-26 14:34:52 +0200212#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200213#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100214
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200215#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200216#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
217# define CONFIG_SYS_RAMBOOT 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100218#endif
219
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200220#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
221#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
222#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100223
224/*
225 * Ethernet configuration
226 */
227#define CONFIG_MPC5xxx_FEC 1
Ben Warrenbc1b9172009-02-05 23:58:25 -0800228#define CONFIG_MPC5xxx_FEC_MII100
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100229/*
Ben Warrenbc1b9172009-02-05 23:58:25 -0800230 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100231 */
Ben Warrenbc1b9172009-02-05 23:58:25 -0800232/* #define CONFIG_MPC5xxx_FEC_MII10 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100233#define CONFIG_PHY_ADDR 0x00
234
235/*
236 * GPIO configuration
237 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200238#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100239
240/*
241 * Miscellaneous configurable options
242 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_LONGHELP /* undef to save memory */
Heiko Schocher162bbec2007-03-13 09:40:59 +0100244
245#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200246#define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500247#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200248#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100249#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200250#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100251#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200252#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
253#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
254#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100255
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200256#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
257#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
258#define CONFIG_SYS_ALT_MEMTEST 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100259
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200260#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100261
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200262#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500263#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200264# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500265#endif
266
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100267/*
268 * Various low-level settings
269 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200270#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
271#define CONFIG_SYS_HID0_FINAL HID0_ICE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100272
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200273#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
274#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
275#define CONFIG_SYS_BOOTCS_CFG 0x00047801
276#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
277#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100278
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200279#define CONFIG_SYS_CS_BURST 0x00000000
280#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100281
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200282#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100283
284#endif /* __CONFIG_H */