Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Freescale Semiconductor |
Yangbo Lu | bb32e68 | 2021-06-03 10:51:19 +0800 | [diff] [blame] | 4 | * Copyright 2019-2021 NXP |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __LS1043A_COMMON_H |
| 8 | #define __LS1043A_COMMON_H |
| 9 | |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 10 | /* SPL build */ |
| 11 | #ifdef CONFIG_SPL_BUILD |
| 12 | #define SPL_NO_FMAN |
| 13 | #define SPL_NO_DSPI |
| 14 | #define SPL_NO_PCIE |
| 15 | #define SPL_NO_ENV |
| 16 | #define SPL_NO_MISC |
| 17 | #define SPL_NO_USB |
| 18 | #define SPL_NO_SATA |
| 19 | #define SPL_NO_QE |
| 20 | #define SPL_NO_EEPROM |
| 21 | #endif |
| 22 | #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT)) |
| 23 | #define SPL_NO_MMC |
| 24 | #endif |
Yangbo Lu | 83c4ece | 2017-09-15 09:51:58 +0800 | [diff] [blame] | 25 | #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT_QSPI)) |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 26 | #define SPL_NO_IFC |
| 27 | #endif |
| 28 | |
Bharat Bhushan | 882b632 | 2017-03-22 12:06:27 +0530 | [diff] [blame] | 29 | #include <asm/arch/stream_id_lsch2.h> |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 30 | #include <asm/arch/config.h> |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 31 | |
| 32 | /* Link Definitions */ |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 33 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 34 | #define CONFIG_VERY_BIG_RAM |
| 35 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 |
| 36 | #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 |
| 37 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
Shaohui Xie | f6c8395 | 2015-11-23 15:23:48 +0800 | [diff] [blame] | 38 | #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 39 | |
Michael Walle | f056e0f | 2020-06-01 21:53:26 +0200 | [diff] [blame] | 40 | #define CPU_RELEASE_ADDR secondary_boot_addr |
Hou Zhiqiang | c7098fa | 2015-10-26 19:47:57 +0800 | [diff] [blame] | 41 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 42 | /* Serial Port */ |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 43 | #define CONFIG_SYS_NS16550_SERIAL |
| 44 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
Hou Zhiqiang | 3f91cda | 2017-01-10 16:44:15 +0800 | [diff] [blame] | 45 | #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 46 | |
Gong Qianyu | f671f6c | 2015-10-26 19:47:56 +0800 | [diff] [blame] | 47 | /* SD boot SPL */ |
| 48 | #ifdef CONFIG_SD_BOOT |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 49 | #ifdef CONFIG_NXP_ESBC |
Ruchika Gupta | d6b8920 | 2017-04-17 18:07:17 +0530 | [diff] [blame] | 50 | #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) |
| 51 | /* |
| 52 | * HDR would be appended at end of image and copied to DDR along |
| 53 | * with U-Boot image. Here u-boot max. size is 512K. So if binary |
| 54 | * size increases then increase this size in case of secure boot as |
| 55 | * it uses raw u-boot image instead of fit image. |
| 56 | */ |
| 57 | #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) |
| 58 | #else |
| 59 | #define CONFIG_SYS_MONITOR_LEN 0x100000 |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 60 | #endif /* ifdef CONFIG_NXP_ESBC */ |
Gong Qianyu | f671f6c | 2015-10-26 19:47:56 +0800 | [diff] [blame] | 61 | #endif |
| 62 | |
Gong Qianyu | 8168a0f | 2015-10-26 19:47:53 +0800 | [diff] [blame] | 63 | /* NAND SPL */ |
| 64 | #ifdef CONFIG_NAND_BOOT |
Gong Qianyu | 8168a0f | 2015-10-26 19:47:53 +0800 | [diff] [blame] | 65 | #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE |
| 66 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
Ruchika Gupta | ba68875 | 2017-04-17 18:07:18 +0530 | [diff] [blame] | 67 | |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 68 | #ifdef CONFIG_NXP_ESBC |
Ruchika Gupta | ba68875 | 2017-04-17 18:07:18 +0530 | [diff] [blame] | 69 | #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 70 | #endif /* ifdef CONFIG_NXP_ESBC */ |
Ruchika Gupta | ba68875 | 2017-04-17 18:07:18 +0530 | [diff] [blame] | 71 | |
| 72 | #ifdef CONFIG_U_BOOT_HDR_SIZE |
| 73 | /* |
| 74 | * HDR would be appended at end of image and copied to DDR along |
| 75 | * with U-Boot image. Here u-boot max. size is 512K. So if binary |
| 76 | * size increases then increase this size in case of secure boot as |
| 77 | * it uses raw u-boot image instead of fit image. |
| 78 | */ |
| 79 | #define CONFIG_SYS_MONITOR_LEN (0x100000 + CONFIG_U_BOOT_HDR_SIZE) |
| 80 | #else |
| 81 | #define CONFIG_SYS_MONITOR_LEN 0x100000 |
| 82 | #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */ |
| 83 | |
Gong Qianyu | 8168a0f | 2015-10-26 19:47:53 +0800 | [diff] [blame] | 84 | #endif |
| 85 | |
Biwen Li | 46de400 | 2021-02-05 19:01:56 +0800 | [diff] [blame] | 86 | /* GPIO */ |
Biwen Li | 46de400 | 2021-02-05 19:01:56 +0800 | [diff] [blame] | 87 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 88 | /* IFC */ |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 89 | #ifndef SPL_NO_IFC |
Rajesh Bhagat | b89aed4 | 2018-11-05 18:02:44 +0000 | [diff] [blame] | 90 | #if defined(CONFIG_TFABOOT) || \ |
| 91 | (!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)) |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 92 | /* |
| 93 | * CONFIG_SYS_FLASH_BASE has the final address (core view) |
| 94 | * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view) |
| 95 | * CONFIG_SYS_FLASH_BASE_PHYS_EARLY has the temporary IFC address |
| 96 | * CONFIG_SYS_TEXT_BASE is linked to 0x60000000 for booting |
| 97 | */ |
| 98 | #define CONFIG_SYS_FLASH_BASE 0x60000000 |
| 99 | #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE |
| 100 | #define CONFIG_SYS_FLASH_BASE_PHYS_EARLY 0x00000000 |
| 101 | |
Masahiro Yamada | 8cea9b5 | 2017-02-11 22:43:54 +0900 | [diff] [blame] | 102 | #ifdef CONFIG_MTD_NOR_FLASH |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 103 | #define CONFIG_SYS_FLASH_QUIET_TEST |
| 104 | #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ |
| 105 | #endif |
Gong Qianyu | 760df89 | 2016-01-25 15:16:06 +0800 | [diff] [blame] | 106 | #endif |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 107 | #endif |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 108 | |
| 109 | /* I2C */ |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 110 | |
| 111 | /* PCIe */ |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 112 | #ifndef SPL_NO_PCIE |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 113 | #define CONFIG_PCIE1 /* PCIE controller 1 */ |
| 114 | #define CONFIG_PCIE2 /* PCIE controller 2 */ |
| 115 | #define CONFIG_PCIE3 /* PCIE controller 3 */ |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 116 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 117 | #ifdef CONFIG_PCI |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 118 | #define CONFIG_PCI_SCAN_SHOW |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 119 | #endif |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 120 | #endif |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 121 | |
Gong Qianyu | 51c18dc | 2016-01-25 15:16:05 +0800 | [diff] [blame] | 122 | /* DSPI */ |
Gong Qianyu | 51c18dc | 2016-01-25 15:16:05 +0800 | [diff] [blame] | 123 | |
Shaohui Xie | 0464326 | 2015-10-26 19:47:54 +0800 | [diff] [blame] | 124 | /* FMan ucode */ |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 125 | #ifndef SPL_NO_FMAN |
Shaohui Xie | 0464326 | 2015-10-26 19:47:54 +0800 | [diff] [blame] | 126 | #define CONFIG_SYS_DPAA_FMAN |
| 127 | #ifdef CONFIG_SYS_DPAA_FMAN |
| 128 | #define CONFIG_SYS_FM_MURAM_SIZE 0x60000 |
| 129 | |
Shaohui Xie | 0464326 | 2015-10-26 19:47:54 +0800 | [diff] [blame] | 130 | #define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) |
| 131 | #endif |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 132 | #endif |
Shaohui Xie | 0464326 | 2015-10-26 19:47:54 +0800 | [diff] [blame] | 133 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 134 | /* Miscellaneous configurable options */ |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 135 | |
| 136 | #define CONFIG_HWCONFIG |
| 137 | #define HWCONFIG_BUFFER_SIZE 128 |
| 138 | |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 139 | #ifndef SPL_NO_MISC |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 140 | #ifndef CONFIG_SPL_BUILD |
| 141 | #define BOOT_TARGET_DEVICES(func) \ |
| 142 | func(MMC, mmc, 0) \ |
Mian Yousaf Kaukab | 6519df7 | 2019-01-29 16:38:40 +0100 | [diff] [blame] | 143 | func(USB, usb, 0) \ |
| 144 | func(DHCP, dhcp, na) |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 145 | #include <config_distro_bootcmd.h> |
| 146 | #endif |
| 147 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 148 | /* Initial environment variables */ |
| 149 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 150 | "hwconfig=fsl_ddr:bank_intlv=auto\0" \ |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 151 | "fdt_high=0xffffffffffffffff\0" \ |
| 152 | "initrd_high=0xffffffffffffffff\0" \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 153 | "kernel_addr=0x61000000\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 154 | "scriptaddr=0x80000000\0" \ |
Sumit Garg | 9cbcc4d | 2017-06-05 23:51:51 +0530 | [diff] [blame] | 155 | "scripthdraddr=0x80080000\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 156 | "fdtheader_addr_r=0x80100000\0" \ |
| 157 | "kernelheader_addr_r=0x80200000\0" \ |
| 158 | "kernel_addr_r=0x81000000\0" \ |
Wen He | 335b386 | 2018-11-20 16:55:25 +0800 | [diff] [blame] | 159 | "kernel_start=0x1000000\0" \ |
| 160 | "kernelheader_start=0x800000\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 161 | "fdt_addr_r=0x90000000\0" \ |
| 162 | "load_addr=0xa0000000\0" \ |
Manish Tomar | 8d38801 | 2020-11-05 14:08:55 +0530 | [diff] [blame] | 163 | "kernelheader_addr=0x60600000\0" \ |
Qianyu Gong | 2758edf | 2016-03-15 16:35:57 +0800 | [diff] [blame] | 164 | "kernel_size=0x2800000\0" \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 165 | "kernelheader_size=0x40000\0" \ |
Shengzhou Liu | 4286275 | 2017-11-09 17:57:55 +0800 | [diff] [blame] | 166 | "kernel_addr_sd=0x8000\0" \ |
| 167 | "kernel_size_sd=0x14000\0" \ |
Manish Tomar | 8d38801 | 2020-11-05 14:08:55 +0530 | [diff] [blame] | 168 | "kernelhdr_addr_sd=0x3000\0" \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 169 | "kernelhdr_size_sd=0x10\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 170 | "console=ttyS0,115200\0" \ |
York Sun | f7eed6b | 2017-09-28 08:42:16 -0700 | [diff] [blame] | 171 | "boot_os=y\0" \ |
Tom Rini | 5ad8e11 | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 172 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 173 | BOOTENV \ |
| 174 | "boot_scripts=ls1043ardb_boot.scr\0" \ |
Sumit Garg | 9cbcc4d | 2017-06-05 23:51:51 +0530 | [diff] [blame] | 175 | "boot_script_hdr=hdr_ls1043ardb_bs.out\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 176 | "scan_dev_for_boot_part=" \ |
| 177 | "part list ${devtype} ${devnum} devplist; " \ |
| 178 | "env exists devplist || setenv devplist 1; " \ |
| 179 | "for distro_bootpart in ${devplist}; do " \ |
| 180 | "if fstype ${devtype} " \ |
| 181 | "${devnum}:${distro_bootpart} " \ |
| 182 | "bootfstype; then " \ |
| 183 | "run scan_dev_for_boot; " \ |
| 184 | "fi; " \ |
| 185 | "done\0" \ |
Sumit Garg | 9cbcc4d | 2017-06-05 23:51:51 +0530 | [diff] [blame] | 186 | "boot_a_script=" \ |
| 187 | "load ${devtype} ${devnum}:${distro_bootpart} " \ |
| 188 | "${scriptaddr} ${prefix}${script}; " \ |
| 189 | "env exists secureboot && load ${devtype} " \ |
| 190 | "${devnum}:${distro_bootpart} " \ |
Vinitha V Pillai | 25355ec | 2019-04-23 05:52:17 +0000 | [diff] [blame] | 191 | "${scripthdraddr} ${prefix}${boot_script_hdr}; " \ |
| 192 | "env exists secureboot " \ |
Sumit Garg | 9cbcc4d | 2017-06-05 23:51:51 +0530 | [diff] [blame] | 193 | "&& esbc_validate ${scripthdraddr};" \ |
| 194 | "source ${scriptaddr}\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 195 | "qspi_bootcmd=echo Trying load from qspi..;" \ |
| 196 | "sf probe && sf read $load_addr " \ |
Wen He | cabe55c | 2019-11-14 15:08:15 +0800 | [diff] [blame] | 197 | "$kernel_start $kernel_size; env exists secureboot " \ |
| 198 | "&& sf read $kernelheader_addr_r $kernelheader_start " \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 199 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 200 | "bootm $load_addr#$board\0" \ |
Shengzhou Liu | 9d66254 | 2017-06-08 15:59:48 +0800 | [diff] [blame] | 201 | "nor_bootcmd=echo Trying load from nor..;" \ |
| 202 | "cp.b $kernel_addr $load_addr " \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 203 | "$kernel_size; env exists secureboot " \ |
| 204 | "&& cp.b $kernelheader_addr $kernelheader_addr_r " \ |
| 205 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 206 | "bootm $load_addr#$board\0" \ |
Wen He | 335b386 | 2018-11-20 16:55:25 +0800 | [diff] [blame] | 207 | "nand_bootcmd=echo Trying load from NAND..;" \ |
| 208 | "nand info; nand read $load_addr " \ |
| 209 | "$kernel_start $kernel_size; env exists secureboot " \ |
| 210 | "&& nand read $kernelheader_addr_r $kernelheader_start " \ |
| 211 | "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ |
| 212 | "bootm $load_addr#$board\0" \ |
Shengzhou Liu | 4286275 | 2017-11-09 17:57:55 +0800 | [diff] [blame] | 213 | "sd_bootcmd=echo Trying load from SD ..;" \ |
| 214 | "mmcinfo; mmc read $load_addr " \ |
| 215 | "$kernel_addr_sd $kernel_size_sd && " \ |
Vinitha Pillai-B57223 | 0c6e10a | 2017-11-22 10:38:35 +0530 | [diff] [blame] | 216 | "env exists secureboot && mmc read $kernelheader_addr_r " \ |
| 217 | "$kernelhdr_addr_sd $kernelhdr_size_sd " \ |
| 218 | " && esbc_validate ${kernelheader_addr_r};" \ |
Shengzhou Liu | 4286275 | 2017-11-09 17:57:55 +0800 | [diff] [blame] | 219 | "bootm $load_addr#$board\0" |
| 220 | |
Wenbin Song | 1738ca7 | 2016-07-21 18:55:16 +0800 | [diff] [blame] | 221 | |
Rajesh Bhagat | b89aed4 | 2018-11-05 18:02:44 +0000 | [diff] [blame] | 222 | #ifdef CONFIG_TFABOOT |
| 223 | #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ |
| 224 | "env exists secureboot && esbc_halt;" |
| 225 | #define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \ |
| 226 | "env exists secureboot && esbc_halt;" |
| 227 | #define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \ |
| 228 | "env exists secureboot && esbc_halt;" |
Pankit Garg | 6921072 | 2018-12-27 04:37:53 +0000 | [diff] [blame] | 229 | #define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; " \ |
| 230 | "env exists secureboot && esbc_halt;" |
Sumit Garg | 2a2857b | 2017-03-30 09:52:38 +0530 | [diff] [blame] | 231 | #endif |
Rajesh Bhagat | b89aed4 | 2018-11-05 18:02:44 +0000 | [diff] [blame] | 232 | #endif |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 233 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 234 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
| 235 | |
Simon Glass | 89e0a3a | 2017-05-17 08:23:10 -0600 | [diff] [blame] | 236 | #include <asm/arch/soc.h> |
| 237 | |
Mingkai Hu | eee86ff | 2015-10-26 19:47:52 +0800 | [diff] [blame] | 238 | #endif /* __LS1043A_COMMON_H */ |