Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / cf318793adb9cef2ab3b951167db97706040c400 / . / configs / evb-rv1108_defconfig
blob: 6204cb4b9634059e67cc9632a7b8dfcc4daf8c0c [file] [log] [blame]
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]3CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]4CONFIG_TEXT_BASE=0x60000000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=1
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]6CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
7CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000
Fabio Estevam09df3632024-04-24 11:18:41 -0300[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="rockchip/rv1108-evb"
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]9CONFIG_ROCKCHIP_RV1108=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]10CONFIG_DEBUG_UART_BASE=0x10210000
11CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini7c027e02022-06-20 08:13:12 -0400[diff] [blame]12# CONFIG_DEBUG_UART_BOARD_INIT is not set
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]13CONFIG_SYS_LOAD_ADDR=0x62000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]14CONFIG_DEBUG_UART=y
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]15CONFIG_BOOTCOMMAND="sf probe;sf read 0x62000000 0x140800 0x500000;dcache off;go 0x62000000"
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]16CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb"
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]17# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]18CONFIG_DISPLAY_BOARDINFO_LATE=y
Kever Yang4c7e6bf2020-04-13 09:38:32 +0800[diff] [blame]19CONFIG_BOARD_EARLY_INIT_F=y
William Wub8408c42017-08-09 11:36:27 +0800[diff] [blame]20CONFIG_CMD_USB=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]21# CONFIG_CMD_SETEXPR is not set
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]22CONFIG_CMD_CACHE=y
23CONFIG_CMD_TIME=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]24CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]25CONFIG_NET_RANDOM_ETHADDR=y
26CONFIG_REGMAP=y
27CONFIG_SYSCON=y
28CONFIG_CLK=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]29CONFIG_FASTBOOT_BUF_ADDR=0x62000000
30CONFIG_FASTBOOT_BUF_SIZE=0x08000000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]31CONFIG_FASTBOOT_FLASH_MMC_DEV=1
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]32CONFIG_ROCKCHIP_GPIO=y
33CONFIG_SYS_I2C_ROCKCHIP=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]34CONFIG_SPI_FLASH_GIGADEVICE=y
35CONFIG_SPI_FLASH_WINBOND=y
36CONFIG_SPI_FLASH_MTD=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]37CONFIG_ETH_DESIGNWARE=y
38CONFIG_GMAC_ROCKCHIP=y
39CONFIG_PINCTRL=y
William Wub8408c42017-08-09 11:36:27 +0800[diff] [blame]40CONFIG_DM_REGULATOR_FIXED=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]41CONFIG_BAUDRATE=1500000
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]42CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]43CONFIG_SYS_NS16550_MEM32=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]44CONFIG_SYSRESET=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]45CONFIG_USB=y
William Wub8408c42017-08-09 11:36:27 +0800[diff] [blame]46CONFIG_USB_EHCI_HCD=y
47CONFIG_USB_EHCI_GENERIC=y
48CONFIG_USB_OHCI_HCD=y
49CONFIG_USB_OHCI_GENERIC=y
50CONFIG_USB_DWC2=y
William Wub8408c42017-08-09 11:36:27 +0800[diff] [blame]51CONFIG_USB_GADGET=y
Tom Rini9e74f5d2017-10-16 21:35:43 -0400[diff] [blame]52CONFIG_USB_GADGET_DWC2_OTG=y
Tom Rini914a8c02024-01-03 09:26:16 -0500[diff] [blame]53CONFIG_RANDOM_UUID=y
Andy Yand6e658c2017-06-01 18:01:31 +0800[diff] [blame]54CONFIG_ERRNO_STR=y