| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y |
| 3 | CONFIG_ROCKCHIP_RV1108=y |
| 4 | CONFIG_TARGET_EVB_RV1108=y |
| 5 | CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" |
| Tom Rini | 256aa74 | 2017-06-19 09:47:40 -0400 | [diff] [blame] | 6 | CONFIG_DEBUG_UART=y |
| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 7 | # CONFIG_DISPLAY_CPUINFO is not set |
| William Wu | b8408c4 | 2017-08-09 11:36:27 +0800 | [diff] [blame^] | 8 | CONFIG_FASTBOOT=y |
| 9 | CONFIG_USB_FUNCTION_FASTBOOT=y |
| 10 | CONFIG_CMD_FASTBOOT=y |
| 11 | CONFIG_FASTBOOT_BUF_ADDR=0x62000000 |
| 12 | CONFIG_FASTBOOT_BUF_SIZE=0x08000000 |
| 13 | CONFIG_FASTBOOT_FLASH=y |
| 14 | CONFIG_FASTBOOT_FLASH_MMC_DEV=1 |
| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 15 | # CONFIG_CMD_IMLS is not set |
| 16 | CONFIG_CMD_SF=y |
| William Wu | b8408c4 | 2017-08-09 11:36:27 +0800 | [diff] [blame^] | 17 | CONFIG_CMD_USB=y |
| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 18 | # CONFIG_CMD_SETEXPR is not set |
| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 19 | CONFIG_CMD_CACHE=y |
| 20 | CONFIG_CMD_TIME=y |
| 21 | CONFIG_NET_RANDOM_ETHADDR=y |
| 22 | CONFIG_REGMAP=y |
| 23 | CONFIG_SYSCON=y |
| 24 | CONFIG_CLK=y |
| 25 | CONFIG_ROCKCHIP_GPIO=y |
| 26 | CONFIG_SYS_I2C_ROCKCHIP=y |
| 27 | CONFIG_SPI_FLASH=y |
| 28 | CONFIG_SPI_FLASH_BAR=y |
| 29 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 30 | CONFIG_SPI_FLASH_WINBOND=y |
| 31 | CONFIG_SPI_FLASH_MTD=y |
| 32 | CONFIG_DM_ETH=y |
| 33 | CONFIG_ETH_DESIGNWARE=y |
| 34 | CONFIG_GMAC_ROCKCHIP=y |
| 35 | CONFIG_PINCTRL=y |
| 36 | CONFIG_PINCTRL_ROCKCHIP_RV1108=y |
| William Wu | b8408c4 | 2017-08-09 11:36:27 +0800 | [diff] [blame^] | 37 | CONFIG_DM_REGULATOR_FIXED=y |
| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 38 | CONFIG_BAUDRATE=1500000 |
| 39 | # CONFIG_SPL_SERIAL_PRESENT is not set |
| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 40 | CONFIG_DEBUG_UART_BASE=0x10210000 |
| 41 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 42 | CONFIG_DEBUG_UART_SHIFT=2 |
| 43 | CONFIG_SYSRESET=y |
| Tom Rini | 504997e | 2017-08-25 17:50:26 -0400 | [diff] [blame] | 44 | CONFIG_USB=y |
| William Wu | b8408c4 | 2017-08-09 11:36:27 +0800 | [diff] [blame^] | 45 | CONFIG_USB_EHCI_HCD=y |
| 46 | CONFIG_USB_EHCI_GENERIC=y |
| 47 | CONFIG_USB_OHCI_HCD=y |
| 48 | CONFIG_USB_OHCI_GENERIC=y |
| 49 | CONFIG_USB_DWC2=y |
| 50 | CONFIG_USB_STORAGE=y |
| 51 | CONFIG_USB_GADGET=y |
| 52 | CONFIG_USB_GADGET_DWC2_OTG=y |
| 53 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 54 | CONFIG_G_DNL_MANUFACTURER="Rockchip" |
| 55 | CONFIG_G_DNL_VENDOR_NUM=0x2207 |
| 56 | CONFIG_G_DNL_PRODUCT_NUM=0x110a |
| Andy Yan | d6e658c | 2017-06-01 18:01:31 +0800 | [diff] [blame] | 57 | CONFIG_ERRNO_STR=y |