Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <command.h> |
| 9 | #include <i2c.h> |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 10 | #include <asm/io.h> |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 11 | #ifdef CONFIG_FSL_LSCH2 |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 12 | #include <asm/arch/immap_lsch2.h> |
Rai Harninder | 6aa1f3b | 2016-03-23 17:04:38 +0530 | [diff] [blame] | 13 | #elif defined(CONFIG_FSL_LSCH3) |
| 14 | #include <asm/arch/immap_lsch3.h> |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 15 | #else |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 16 | #include <asm/immap_85xx.h> |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 17 | #endif |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 18 | #include "vid.h" |
| 19 | |
| 20 | DECLARE_GLOBAL_DATA_PTR; |
| 21 | |
| 22 | int __weak i2c_multiplexer_select_vid_channel(u8 channel) |
| 23 | { |
| 24 | return 0; |
| 25 | } |
| 26 | |
| 27 | /* |
| 28 | * Compensate for a board specific voltage drop between regulator and SoC |
| 29 | * return a value in mV |
| 30 | */ |
| 31 | int __weak board_vdd_drop_compensation(void) |
| 32 | { |
| 33 | return 0; |
| 34 | } |
| 35 | |
| 36 | /* |
| 37 | * Get the i2c address configuration for the IR regulator chip |
| 38 | * |
| 39 | * There are some variance in the RDB HW regarding the I2C address configuration |
| 40 | * for the IR regulator chip, which is likely a problem of external resistor |
| 41 | * accuracy. So we just check each address in a hopefully non-intrusive mode |
| 42 | * and use the first one that seems to work |
| 43 | * |
| 44 | * The IR chip can show up under the following addresses: |
| 45 | * 0x08 (Verified on T1040RDB-PA,T4240RDB-PB,X-T4240RDB-16GPA) |
| 46 | * 0x09 (Verified on T1040RDB-PA) |
Ying Zhang | ff77905 | 2016-01-22 12:15:13 +0800 | [diff] [blame] | 47 | * 0x38 (Verified on T2080QDS, T2081QDS, T4240RDB) |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 48 | */ |
| 49 | static int find_ir_chip_on_i2c(void) |
| 50 | { |
| 51 | int i2caddress; |
| 52 | int ret; |
| 53 | u8 byte; |
| 54 | int i; |
| 55 | const int ir_i2c_addr[] = {0x38, 0x08, 0x09}; |
| 56 | |
| 57 | /* Check all the address */ |
| 58 | for (i = 0; i < (sizeof(ir_i2c_addr)/sizeof(ir_i2c_addr[0])); i++) { |
| 59 | i2caddress = ir_i2c_addr[i]; |
| 60 | ret = i2c_read(i2caddress, |
| 61 | IR36021_MFR_ID_OFFSET, 1, (void *)&byte, |
| 62 | sizeof(byte)); |
| 63 | if ((ret >= 0) && (byte == IR36021_MFR_ID)) |
| 64 | return i2caddress; |
| 65 | } |
| 66 | return -1; |
| 67 | } |
| 68 | |
| 69 | /* Maximum loop count waiting for new voltage to take effect */ |
| 70 | #define MAX_LOOP_WAIT_NEW_VOL 100 |
| 71 | /* Maximum loop count waiting for the voltage to be stable */ |
| 72 | #define MAX_LOOP_WAIT_VOL_STABLE 100 |
| 73 | /* |
| 74 | * read_voltage from sensor on I2C bus |
| 75 | * We use average of 4 readings, waiting for WAIT_FOR_ADC before |
| 76 | * another reading |
| 77 | */ |
| 78 | #define NUM_READINGS 4 /* prefer to be power of 2 for efficiency */ |
| 79 | |
| 80 | /* If an INA220 chip is available, we can use it to read back the voltage |
| 81 | * as it may have a higher accuracy than the IR chip for the same purpose |
| 82 | */ |
| 83 | #ifdef CONFIG_VOL_MONITOR_INA220 |
| 84 | #define WAIT_FOR_ADC 532 /* wait for 532 microseconds for ADC */ |
| 85 | #define ADC_MIN_ACCURACY 4 |
| 86 | #else |
| 87 | #define WAIT_FOR_ADC 138 /* wait for 138 microseconds for ADC */ |
| 88 | #define ADC_MIN_ACCURACY 4 |
| 89 | #endif |
| 90 | |
| 91 | #ifdef CONFIG_VOL_MONITOR_INA220 |
| 92 | static int read_voltage_from_INA220(int i2caddress) |
| 93 | { |
| 94 | int i, ret, voltage_read = 0; |
| 95 | u16 vol_mon; |
| 96 | u8 buf[2]; |
| 97 | |
| 98 | for (i = 0; i < NUM_READINGS; i++) { |
| 99 | ret = i2c_read(I2C_VOL_MONITOR_ADDR, |
| 100 | I2C_VOL_MONITOR_BUS_V_OFFSET, 1, |
| 101 | (void *)&buf, 2); |
| 102 | if (ret) { |
| 103 | printf("VID: failed to read core voltage\n"); |
| 104 | return ret; |
| 105 | } |
| 106 | vol_mon = (buf[0] << 8) | buf[1]; |
| 107 | if (vol_mon & I2C_VOL_MONITOR_BUS_V_OVF) { |
| 108 | printf("VID: Core voltage sensor error\n"); |
| 109 | return -1; |
| 110 | } |
| 111 | debug("VID: bus voltage reads 0x%04x\n", vol_mon); |
| 112 | /* LSB = 4mv */ |
| 113 | voltage_read += (vol_mon >> I2C_VOL_MONITOR_BUS_V_SHIFT) * 4; |
| 114 | udelay(WAIT_FOR_ADC); |
| 115 | } |
| 116 | /* calculate the average */ |
| 117 | voltage_read /= NUM_READINGS; |
| 118 | |
| 119 | return voltage_read; |
| 120 | } |
| 121 | #endif |
| 122 | |
| 123 | /* read voltage from IR */ |
| 124 | #ifdef CONFIG_VOL_MONITOR_IR36021_READ |
| 125 | static int read_voltage_from_IR(int i2caddress) |
| 126 | { |
| 127 | int i, ret, voltage_read = 0; |
| 128 | u16 vol_mon; |
| 129 | u8 buf; |
| 130 | |
| 131 | for (i = 0; i < NUM_READINGS; i++) { |
| 132 | ret = i2c_read(i2caddress, |
| 133 | IR36021_LOOP1_VOUT_OFFSET, |
| 134 | 1, (void *)&buf, 1); |
| 135 | if (ret) { |
| 136 | printf("VID: failed to read vcpu\n"); |
| 137 | return ret; |
| 138 | } |
| 139 | vol_mon = buf; |
| 140 | if (!vol_mon) { |
| 141 | printf("VID: Core voltage sensor error\n"); |
| 142 | return -1; |
| 143 | } |
| 144 | debug("VID: bus voltage reads 0x%02x\n", vol_mon); |
| 145 | /* Resolution is 1/128V. We scale up here to get 1/128mV |
| 146 | * and divide at the end |
| 147 | */ |
| 148 | voltage_read += vol_mon * 1000; |
| 149 | udelay(WAIT_FOR_ADC); |
| 150 | } |
| 151 | /* Scale down to the real mV as IR resolution is 1/128V, rounding up */ |
| 152 | voltage_read = DIV_ROUND_UP(voltage_read, 128); |
| 153 | |
| 154 | /* calculate the average */ |
| 155 | voltage_read /= NUM_READINGS; |
| 156 | |
| 157 | /* Compensate for a board specific voltage drop between regulator and |
| 158 | * SoC before converting into an IR VID value |
| 159 | */ |
| 160 | voltage_read -= board_vdd_drop_compensation(); |
| 161 | |
| 162 | return voltage_read; |
| 163 | } |
| 164 | #endif |
| 165 | |
| 166 | static int read_voltage(int i2caddress) |
| 167 | { |
| 168 | int voltage_read; |
| 169 | #ifdef CONFIG_VOL_MONITOR_INA220 |
| 170 | voltage_read = read_voltage_from_INA220(i2caddress); |
| 171 | #elif defined CONFIG_VOL_MONITOR_IR36021_READ |
| 172 | voltage_read = read_voltage_from_IR(i2caddress); |
| 173 | #else |
| 174 | return -1; |
| 175 | #endif |
| 176 | return voltage_read; |
| 177 | } |
| 178 | |
| 179 | /* |
| 180 | * We need to calculate how long before the voltage stops to drop |
| 181 | * or increase. It returns with the loop count. Each loop takes |
| 182 | * several readings (WAIT_FOR_ADC) |
| 183 | */ |
| 184 | static int wait_for_new_voltage(int vdd, int i2caddress) |
| 185 | { |
| 186 | int timeout, vdd_current; |
| 187 | |
| 188 | vdd_current = read_voltage(i2caddress); |
| 189 | /* wait until voltage starts to reach the target. Voltage slew |
| 190 | * rates by typical regulators will always lead to stable readings |
| 191 | * within each fairly long ADC interval in comparison to the |
| 192 | * intended voltage delta change until the target voltage is |
| 193 | * reached. The fairly small voltage delta change to any target |
| 194 | * VID voltage also means that this function will always complete |
| 195 | * within few iterations. If the timeout was ever reached, it would |
| 196 | * point to a serious failure in the regulator system. |
| 197 | */ |
| 198 | for (timeout = 0; |
| 199 | abs(vdd - vdd_current) > (IR_VDD_STEP_UP + IR_VDD_STEP_DOWN) && |
| 200 | timeout < MAX_LOOP_WAIT_NEW_VOL; timeout++) { |
| 201 | vdd_current = read_voltage(i2caddress); |
| 202 | } |
| 203 | if (timeout >= MAX_LOOP_WAIT_NEW_VOL) { |
| 204 | printf("VID: Voltage adjustment timeout\n"); |
| 205 | return -1; |
| 206 | } |
| 207 | return timeout; |
| 208 | } |
| 209 | |
| 210 | /* |
| 211 | * this function keeps reading the voltage until it is stable or until the |
| 212 | * timeout expires |
| 213 | */ |
| 214 | static int wait_for_voltage_stable(int i2caddress) |
| 215 | { |
| 216 | int timeout, vdd_current, vdd; |
| 217 | |
| 218 | vdd = read_voltage(i2caddress); |
| 219 | udelay(NUM_READINGS * WAIT_FOR_ADC); |
| 220 | |
| 221 | /* wait until voltage is stable */ |
| 222 | vdd_current = read_voltage(i2caddress); |
| 223 | /* The maximum timeout is |
| 224 | * MAX_LOOP_WAIT_VOL_STABLE * NUM_READINGS * WAIT_FOR_ADC |
| 225 | */ |
| 226 | for (timeout = MAX_LOOP_WAIT_VOL_STABLE; |
| 227 | abs(vdd - vdd_current) > ADC_MIN_ACCURACY && |
| 228 | timeout > 0; timeout--) { |
| 229 | vdd = vdd_current; |
| 230 | udelay(NUM_READINGS * WAIT_FOR_ADC); |
| 231 | vdd_current = read_voltage(i2caddress); |
| 232 | } |
| 233 | if (timeout == 0) |
| 234 | return -1; |
| 235 | return vdd_current; |
| 236 | } |
| 237 | |
| 238 | #ifdef CONFIG_VOL_MONITOR_IR36021_SET |
| 239 | /* Set the voltage to the IR chip */ |
| 240 | static int set_voltage_to_IR(int i2caddress, int vdd) |
| 241 | { |
| 242 | int wait, vdd_last; |
| 243 | int ret; |
| 244 | u8 vid; |
| 245 | |
| 246 | /* Compensate for a board specific voltage drop between regulator and |
| 247 | * SoC before converting into an IR VID value |
| 248 | */ |
| 249 | vdd += board_vdd_drop_compensation(); |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 250 | #ifdef CONFIG_FSL_LSCH2 |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 251 | vid = DIV_ROUND_UP(vdd - 265, 5); |
| 252 | #else |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 253 | vid = DIV_ROUND_UP(vdd - 245, 5); |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 254 | #endif |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 255 | |
| 256 | ret = i2c_write(i2caddress, IR36021_LOOP1_MANUAL_ID_OFFSET, |
| 257 | 1, (void *)&vid, sizeof(vid)); |
| 258 | if (ret) { |
| 259 | printf("VID: failed to write VID\n"); |
| 260 | return -1; |
| 261 | } |
| 262 | wait = wait_for_new_voltage(vdd, i2caddress); |
| 263 | if (wait < 0) |
| 264 | return -1; |
| 265 | debug("VID: Waited %d us\n", wait * NUM_READINGS * WAIT_FOR_ADC); |
| 266 | |
| 267 | vdd_last = wait_for_voltage_stable(i2caddress); |
| 268 | if (vdd_last < 0) |
| 269 | return -1; |
| 270 | debug("VID: Current voltage is %d mV\n", vdd_last); |
| 271 | return vdd_last; |
| 272 | } |
| 273 | #endif |
| 274 | |
| 275 | static int set_voltage(int i2caddress, int vdd) |
| 276 | { |
| 277 | int vdd_last = -1; |
| 278 | |
| 279 | #ifdef CONFIG_VOL_MONITOR_IR36021_SET |
| 280 | vdd_last = set_voltage_to_IR(i2caddress, vdd); |
| 281 | #else |
| 282 | #error Specific voltage monitor must be defined |
| 283 | #endif |
| 284 | return vdd_last; |
| 285 | } |
| 286 | |
| 287 | int adjust_vdd(ulong vdd_override) |
| 288 | { |
| 289 | int re_enable = disable_interrupts(); |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 290 | #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 291 | struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); |
| 292 | #else |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 293 | ccsr_gur_t __iomem *gur = |
| 294 | (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 295 | #endif |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 296 | u32 fusesr; |
Ying Zhang | 7ad5eff | 2016-01-22 12:15:12 +0800 | [diff] [blame] | 297 | u8 vid, buf; |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 298 | int vdd_target, vdd_current, vdd_last; |
| 299 | int ret, i2caddress; |
| 300 | unsigned long vdd_string_override; |
| 301 | char *vdd_string; |
| 302 | static const uint16_t vdd[32] = { |
| 303 | 0, /* unused */ |
| 304 | 9875, /* 0.9875V */ |
| 305 | 9750, |
| 306 | 9625, |
| 307 | 9500, |
| 308 | 9375, |
| 309 | 9250, |
| 310 | 9125, |
| 311 | 9000, |
| 312 | 8875, |
| 313 | 8750, |
| 314 | 8625, |
| 315 | 8500, |
| 316 | 8375, |
| 317 | 8250, |
| 318 | 8125, |
| 319 | 10000, /* 1.0000V */ |
| 320 | 10125, |
| 321 | 10250, |
| 322 | 10375, |
| 323 | 10500, |
| 324 | 10625, |
| 325 | 10750, |
| 326 | 10875, |
| 327 | 11000, |
| 328 | 0, /* reserved */ |
| 329 | }; |
| 330 | struct vdd_drive { |
| 331 | u8 vid; |
| 332 | unsigned voltage; |
| 333 | }; |
| 334 | |
| 335 | ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); |
| 336 | if (ret) { |
| 337 | debug("VID: I2C failed to switch channel\n"); |
| 338 | ret = -1; |
| 339 | goto exit; |
| 340 | } |
| 341 | ret = find_ir_chip_on_i2c(); |
| 342 | if (ret < 0) { |
| 343 | printf("VID: Could not find voltage regulator on I2C.\n"); |
| 344 | ret = -1; |
| 345 | goto exit; |
| 346 | } else { |
| 347 | i2caddress = ret; |
| 348 | debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); |
| 349 | } |
| 350 | |
Ying Zhang | 7ad5eff | 2016-01-22 12:15:12 +0800 | [diff] [blame] | 351 | /* check IR chip work on Intel mode*/ |
| 352 | ret = i2c_read(i2caddress, |
| 353 | IR36021_INTEL_MODE_OOFSET, |
| 354 | 1, (void *)&buf, 1); |
| 355 | if (ret) { |
| 356 | printf("VID: failed to read IR chip mode.\n"); |
| 357 | ret = -1; |
| 358 | goto exit; |
| 359 | } |
| 360 | if ((buf & IR36021_MODE_MASK) != IR36021_INTEL_MODE) { |
| 361 | printf("VID: IR Chip is not used in Intel mode.\n"); |
| 362 | ret = -1; |
| 363 | goto exit; |
| 364 | } |
| 365 | |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 366 | /* get the voltage ID from fuse status register */ |
Rai Harninder | 6aa1f3b | 2016-03-23 17:04:38 +0530 | [diff] [blame] | 367 | #ifdef CONFIG_FSL_LSCH3 |
| 368 | fusesr = in_le32(&gur->dcfg_fusesr); |
| 369 | #else |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 370 | fusesr = in_be32(&gur->dcfg_fusesr); |
Rai Harninder | 6aa1f3b | 2016-03-23 17:04:38 +0530 | [diff] [blame] | 371 | #endif |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 372 | /* |
| 373 | * VID is used according to the table below |
| 374 | * --------------------------------------- |
| 375 | * | DA_V | |
| 376 | * |-------------------------------------| |
| 377 | * | 5b00000 | 5b00001-5b11110 | 5b11111 | |
| 378 | * ---------------+---------+-----------------+---------| |
| 379 | * | D | 5b00000 | NO VID | VID = DA_V | NO VID | |
| 380 | * | A |----------+---------+-----------------+---------| |
| 381 | * | _ | 5b00001 |VID = | VID = |VID = | |
| 382 | * | V | ~ | DA_V_ALT| DA_V_ALT | DA_A_VLT| |
| 383 | * | _ | 5b11110 | | | | |
| 384 | * | A |----------+---------+-----------------+---------| |
| 385 | * | L | 5b11111 | No VID | VID = DA_V | NO VID | |
| 386 | * | T | | | | | |
| 387 | * ------------------------------------------------------ |
| 388 | */ |
Shaohui Xie | 085ac1c | 2016-09-07 17:56:14 +0800 | [diff] [blame] | 389 | #ifdef CONFIG_FSL_LSCH2 |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 390 | vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_ALTVID_SHIFT) & |
| 391 | FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK; |
| 392 | if ((vid == 0) || (vid == FSL_CHASSIS2_DCFG_FUSESR_ALTVID_MASK)) { |
| 393 | vid = (fusesr >> FSL_CHASSIS2_DCFG_FUSESR_VID_SHIFT) & |
| 394 | FSL_CHASSIS2_DCFG_FUSESR_VID_MASK; |
| 395 | } |
Rai Harninder | 6aa1f3b | 2016-03-23 17:04:38 +0530 | [diff] [blame] | 396 | #elif defined(CONFIG_FSL_LSCH3) |
| 397 | vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) & |
| 398 | FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK; |
| 399 | if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) { |
| 400 | vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) & |
| 401 | FSL_CHASSIS3_DCFG_FUSESR_VID_MASK; |
| 402 | } |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 403 | #else |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 404 | vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_ALTVID_SHIFT) & |
| 405 | FSL_CORENET_DCFG_FUSESR_ALTVID_MASK; |
| 406 | if ((vid == 0) || (vid == FSL_CORENET_DCFG_FUSESR_ALTVID_MASK)) { |
| 407 | vid = (fusesr >> FSL_CORENET_DCFG_FUSESR_VID_SHIFT) & |
| 408 | FSL_CORENET_DCFG_FUSESR_VID_MASK; |
| 409 | } |
Shaohui Xie | dd33567 | 2015-11-11 17:58:37 +0800 | [diff] [blame] | 410 | #endif |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 411 | vdd_target = vdd[vid]; |
| 412 | |
| 413 | /* check override variable for overriding VDD */ |
| 414 | vdd_string = getenv(CONFIG_VID_FLS_ENV); |
| 415 | if (vdd_override == 0 && vdd_string && |
| 416 | !strict_strtoul(vdd_string, 10, &vdd_string_override)) |
| 417 | vdd_override = vdd_string_override; |
| 418 | if (vdd_override >= VDD_MV_MIN && vdd_override <= VDD_MV_MAX) { |
| 419 | vdd_target = vdd_override * 10; /* convert to 1/10 mV */ |
| 420 | debug("VDD override is %lu\n", vdd_override); |
| 421 | } else if (vdd_override != 0) { |
| 422 | printf("Invalid value.\n"); |
| 423 | } |
| 424 | if (vdd_target == 0) { |
| 425 | debug("VID: VID not used\n"); |
| 426 | ret = 0; |
| 427 | goto exit; |
| 428 | } else { |
| 429 | /* divide and round up by 10 to get a value in mV */ |
| 430 | vdd_target = DIV_ROUND_UP(vdd_target, 10); |
| 431 | debug("VID: vid = %d mV\n", vdd_target); |
| 432 | } |
| 433 | |
| 434 | /* |
| 435 | * Read voltage monitor to check real voltage. |
| 436 | */ |
| 437 | vdd_last = read_voltage(i2caddress); |
| 438 | if (vdd_last < 0) { |
| 439 | printf("VID: Couldn't read sensor abort VID adjustment\n"); |
| 440 | ret = -1; |
| 441 | goto exit; |
| 442 | } |
| 443 | vdd_current = vdd_last; |
| 444 | debug("VID: Core voltage is currently at %d mV\n", vdd_last); |
| 445 | /* |
| 446 | * Adjust voltage to at or one step above target. |
| 447 | * As measurements are less precise than setting the values |
| 448 | * we may run through dummy steps that cancel each other |
| 449 | * when stepping up and then down. |
| 450 | */ |
| 451 | while (vdd_last > 0 && |
| 452 | vdd_last < vdd_target) { |
| 453 | vdd_current += IR_VDD_STEP_UP; |
| 454 | vdd_last = set_voltage(i2caddress, vdd_current); |
| 455 | } |
| 456 | while (vdd_last > 0 && |
| 457 | vdd_last > vdd_target + (IR_VDD_STEP_DOWN - 1)) { |
| 458 | vdd_current -= IR_VDD_STEP_DOWN; |
| 459 | vdd_last = set_voltage(i2caddress, vdd_current); |
| 460 | } |
| 461 | |
| 462 | if (vdd_last > 0) |
| 463 | printf("VID: Core voltage after adjustment is at %d mV\n", |
| 464 | vdd_last); |
| 465 | else |
| 466 | ret = -1; |
| 467 | exit: |
| 468 | if (re_enable) |
| 469 | enable_interrupts(); |
Wenbin Song | 44ad75c | 2016-03-09 13:38:23 +0800 | [diff] [blame] | 470 | |
| 471 | i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); |
| 472 | |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 473 | return ret; |
| 474 | } |
| 475 | |
| 476 | static int print_vdd(void) |
| 477 | { |
| 478 | int vdd_last, ret, i2caddress; |
| 479 | |
| 480 | ret = i2c_multiplexer_select_vid_channel(I2C_MUX_CH_VOL_MONITOR); |
| 481 | if (ret) { |
| 482 | debug("VID : I2c failed to switch channel\n"); |
| 483 | return -1; |
| 484 | } |
| 485 | ret = find_ir_chip_on_i2c(); |
| 486 | if (ret < 0) { |
| 487 | printf("VID: Could not find voltage regulator on I2C.\n"); |
Wenbin Song | 44ad75c | 2016-03-09 13:38:23 +0800 | [diff] [blame] | 488 | goto exit; |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 489 | } else { |
| 490 | i2caddress = ret; |
| 491 | debug("VID: IR Chip found on I2C address 0x%02x\n", i2caddress); |
| 492 | } |
| 493 | |
| 494 | /* |
| 495 | * Read voltage monitor to check real voltage. |
| 496 | */ |
| 497 | vdd_last = read_voltage(i2caddress); |
| 498 | if (vdd_last < 0) { |
| 499 | printf("VID: Couldn't read sensor abort VID adjustment\n"); |
Wenbin Song | 44ad75c | 2016-03-09 13:38:23 +0800 | [diff] [blame] | 500 | goto exit; |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 501 | } |
| 502 | printf("VID: Core voltage is at %d mV\n", vdd_last); |
Wenbin Song | 44ad75c | 2016-03-09 13:38:23 +0800 | [diff] [blame] | 503 | exit: |
| 504 | i2c_multiplexer_select_vid_channel(I2C_MUX_CH_DEFAULT); |
| 505 | |
| 506 | return ret < 0 ? -1 : 0; |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 507 | |
Ying Zhang | 8876a51 | 2014-10-31 18:06:18 +0800 | [diff] [blame] | 508 | } |
| 509 | |
| 510 | static int do_vdd_override(cmd_tbl_t *cmdtp, |
| 511 | int flag, int argc, |
| 512 | char * const argv[]) |
| 513 | { |
| 514 | ulong override; |
| 515 | |
| 516 | if (argc < 2) |
| 517 | return CMD_RET_USAGE; |
| 518 | |
| 519 | if (!strict_strtoul(argv[1], 10, &override)) |
| 520 | adjust_vdd(override); /* the value is checked by callee */ |
| 521 | else |
| 522 | return CMD_RET_USAGE; |
| 523 | return 0; |
| 524 | } |
| 525 | |
| 526 | static int do_vdd_read(cmd_tbl_t *cmdtp, |
| 527 | int flag, int argc, |
| 528 | char * const argv[]) |
| 529 | { |
| 530 | if (argc < 1) |
| 531 | return CMD_RET_USAGE; |
| 532 | print_vdd(); |
| 533 | |
| 534 | return 0; |
| 535 | } |
| 536 | |
| 537 | U_BOOT_CMD( |
| 538 | vdd_override, 2, 0, do_vdd_override, |
| 539 | "override VDD", |
| 540 | " - override with the voltage specified in mV, eg. 1050" |
| 541 | ); |
| 542 | |
| 543 | U_BOOT_CMD( |
| 544 | vdd_read, 1, 0, do_vdd_read, |
| 545 | "read VDD", |
| 546 | " - Read the voltage specified in mV" |
| 547 | ) |