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git01.mediatek.com / filogic / uboot / ce53ec860ccb3e2a250b7919c7ac2b664533947a / . / configs / rock960-rk3399_defconfig
blob: daa0d3ddf5dc16d0c1feaf24c3695fc75d8d9c06 [file] [log] [blame]
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
5CONFIG_SYS_TEXT_BASE=0x00200000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]6CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]7CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960"
Tom Rinice53ec82022-08-23 15:24:14 -0400[diff] [blame^]8CONFIG_SYS_PROMPT="rock960 => "
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]9CONFIG_ROCKCHIP_RK3399=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]10CONFIG_TARGET_ROCK960_RK3399=y
11CONFIG_DEBUG_UART_BASE=0xFF1A0000
12CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]13CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]14CONFIG_DEBUG_UART=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]15CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
16CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
Peter Robinsone3b59cc2020-09-29 14:06:18 +0100[diff] [blame]17CONFIG_USE_PREBOOT=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]18CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]19CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]20CONFIG_MISC_INIT_R=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]21CONFIG_SPL_MAX_SIZE=0x2e000
22CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]23CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
24CONFIG_SPL_BSS_START_ADDR=0x400000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]25CONFIG_SPL_BSS_MAX_SIZE=0x2000
Kever Yang20673542019-08-20 11:47:02 +0800[diff] [blame]26# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]27# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
28CONFIG_SPL_STACK=0x400000
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]29CONFIG_SPL_STACK_R=y
Peter Robinsona6bbd202019-11-06 11:43:05 +0000[diff] [blame]30CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
Peter Robinsona6bbd202019-11-06 11:43:05 +0000[diff] [blame]31CONFIG_TPL=y
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]32CONFIG_SYS_PBSIZE=1052
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]33CONFIG_CMD_BOOTZ=y
34CONFIG_CMD_GPT=y
35CONFIG_CMD_MMC=y
Jagan Tekidfe0a3d2020-05-09 22:26:24 +0530[diff] [blame]36CONFIG_CMD_PCI=y
Tom Rini579e9e82021-04-27 08:28:38 -0400[diff] [blame]37# CONFIG_CMD_SF is not set
Tom Rini63683ef2020-05-26 08:32:25 -0400[diff] [blame]38CONFIG_CMD_USB=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]39# CONFIG_CMD_SETEXPR is not set
40CONFIG_CMD_TIME=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]41CONFIG_CMD_PMIC=y
42CONFIG_CMD_REGULATOR=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]43CONFIG_SPL_OF_CONTROL=y
44CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
45CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]46CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]47CONFIG_SYS_MMC_ENV_DEV=1
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]48CONFIG_ROCKCHIP_GPIO=y
49CONFIG_SYS_I2C_ROCKCHIP=y
50CONFIG_MMC_DW=y
51CONFIG_MMC_DW_ROCKCHIP=y
52CONFIG_MMC_SDHCI=y
Peter Robinsonc9099d02019-07-01 17:05:52 +0100[diff] [blame]53CONFIG_MMC_SDHCI_SDMA=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]54CONFIG_MMC_SDHCI_ROCKCHIP=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]55CONFIG_NVME_PCI=y
Jagan Tekidfe0a3d2020-05-09 22:26:24 +0530[diff] [blame]56CONFIG_PCI=y
Peter Robinsone3b59cc2020-09-29 14:06:18 +0100[diff] [blame]57CONFIG_PHY_ROCKCHIP_INNO_USB2=y
58CONFIG_PHY_ROCKCHIP_TYPEC=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]59CONFIG_PMIC_RK8XX=y
60CONFIG_REGULATOR_PWM=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]61CONFIG_REGULATOR_RK8XX=y
62CONFIG_PWM_ROCKCHIP=y
Jagan Tekidfe0a3d2020-05-09 22:26:24 +0530[diff] [blame]63CONFIG_DM_RESET=y
Tom Rinib2e0b322021-01-29 13:56:04 -0500[diff] [blame]64CONFIG_DM_RNG=y
65CONFIG_RNG_ROCKCHIP=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]66CONFIG_BAUDRATE=1500000
67CONFIG_DEBUG_UART_SHIFT=2
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]68CONFIG_SYSRESET=y
69CONFIG_USB=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]70CONFIG_USB_XHCI_HCD=y
71CONFIG_USB_XHCI_DWC3=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]72CONFIG_USB_EHCI_HCD=y
73CONFIG_USB_EHCI_GENERIC=y
Peter Robinsone3b59cc2020-09-29 14:06:18 +0100[diff] [blame]74CONFIG_USB_OHCI_HCD=y
75CONFIG_USB_OHCI_GENERIC=y
Tom Rini112d2e02022-06-25 11:02:31 -0400[diff] [blame]76CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]77CONFIG_USB_DWC3=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]78CONFIG_USB_KEYBOARD=y
Peter Robinson070d0492019-07-01 17:05:53 +0100[diff] [blame]79CONFIG_USB_HOST_ETHER=y
Peter Robinson070d0492019-07-01 17:05:53 +0100[diff] [blame]80CONFIG_USB_ETHER_ASIX=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]81CONFIG_USB_ETHER_ASIX88179=y
Peter Robinson070d0492019-07-01 17:05:53 +0100[diff] [blame]82CONFIG_USB_ETHER_MCS7830=y
83CONFIG_USB_ETHER_RTL8152=y
84CONFIG_USB_ETHER_SMSC95XX=y
Jagan Teki288b7562020-04-02 17:11:24 +0530[diff] [blame]85CONFIG_DM_VIDEO=y
Jagan Teki288b7562020-04-02 17:11:24 +0530[diff] [blame]86CONFIG_DISPLAY=y
87CONFIG_VIDEO_ROCKCHIP=y
88CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]89CONFIG_SPL_TINY_MEMSET=y
90CONFIG_ERRNO_STR=y