Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Texas Instruments, <www.ti.com> |
| 4 | * |
| 5 | * Author : |
| 6 | * Manikandan Pillai <mani.pillai@ti.com> |
| 7 | * |
| 8 | * Derived from Beagle Board and 3430 SDP code by |
| 9 | * Richard Woodruff <r-woodruff2@ti.com> |
| 10 | * Syed Mohammed Khasim <khasim@ti.com> |
| 11 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 12 | * SPDX-License-Identifier: GPL-2.0+ |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #include <common.h> |
| 16 | #include <asm/io.h> |
| 17 | #include <asm/arch/mem.h> /* get mem tables */ |
| 18 | #include <asm/arch/sys_proto.h> |
| 19 | #include <i2c.h> |
Nikita Kiryanov | 275c05a | 2012-01-05 02:03:22 +0000 | [diff] [blame] | 20 | #include <linux/compiler.h> |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 21 | |
| 22 | extern omap3_sysinfo sysinfo; |
Dirk Behme | dc7af20 | 2009-08-08 09:30:21 +0200 | [diff] [blame] | 23 | static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; |
Sanjeev Premi | 9659e3f | 2011-07-18 09:12:24 -0400 | [diff] [blame] | 24 | |
| 25 | #ifdef CONFIG_DISPLAY_CPUINFO |
Sanjeev Premi | fcbb44f | 2009-04-27 21:27:54 +0530 | [diff] [blame] | 26 | static char *rev_s[CPU_3XX_MAX_REV] = { |
| 27 | "1.0", |
| 28 | "2.0", |
| 29 | "2.1", |
| 30 | "3.0", |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 31 | "3.1", |
| 32 | "UNKNOWN", |
| 33 | "UNKNOWN", |
| 34 | "3.1.2"}; |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 35 | |
Howard D. Gray | 3082bc6 | 2011-09-04 14:11:17 -0400 | [diff] [blame] | 36 | /* this is the revision table for 37xx CPUs */ |
| 37 | static char *rev_s_37xx[CPU_37XX_MAX_REV] = { |
| 38 | "1.0", |
| 39 | "1.1", |
| 40 | "1.2"}; |
Sanjeev Premi | 2161496 | 2011-09-23 05:29:45 +0000 | [diff] [blame] | 41 | #endif /* CONFIG_DISPLAY_CPUINFO */ |
Howard D. Gray | 3082bc6 | 2011-09-04 14:11:17 -0400 | [diff] [blame] | 42 | |
Dirk Behme | 12dbcf6 | 2009-03-12 19:30:50 +0100 | [diff] [blame] | 43 | /***************************************************************** |
Nishanth Menon | 346e34f | 2014-03-28 11:00:05 -0500 | [diff] [blame] | 44 | * get_dieid(u32 *id) - read die ID |
| 45 | *****************************************************************/ |
| 46 | void get_dieid(u32 *id) |
| 47 | { |
| 48 | struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE; |
| 49 | |
| 50 | id[3] = readl(&id_base->die_id_0); |
| 51 | id[2] = readl(&id_base->die_id_1); |
| 52 | id[1] = readl(&id_base->die_id_2); |
| 53 | id[0] = readl(&id_base->die_id_3); |
| 54 | } |
| 55 | |
| 56 | /***************************************************************** |
Dirk Behme | 12dbcf6 | 2009-03-12 19:30:50 +0100 | [diff] [blame] | 57 | * dieid_num_r(void) - read and set die ID |
| 58 | *****************************************************************/ |
| 59 | void dieid_num_r(void) |
| 60 | { |
Dirk Behme | 12dbcf6 | 2009-03-12 19:30:50 +0100 | [diff] [blame] | 61 | char *uid_s, die_id[34]; |
| 62 | u32 id[4]; |
| 63 | |
| 64 | memset(die_id, 0, sizeof(die_id)); |
| 65 | |
| 66 | uid_s = getenv("dieid#"); |
| 67 | |
| 68 | if (uid_s == NULL) { |
Nishanth Menon | 346e34f | 2014-03-28 11:00:05 -0500 | [diff] [blame] | 69 | get_dieid(id); |
Dirk Behme | 12dbcf6 | 2009-03-12 19:30:50 +0100 | [diff] [blame] | 70 | sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]); |
| 71 | setenv("dieid#", die_id); |
| 72 | uid_s = die_id; |
| 73 | } |
| 74 | |
| 75 | printf("Die ID #%s\n", uid_s); |
| 76 | } |
| 77 | |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 78 | /****************************************** |
Dirk Behme | 2d0d4fa | 2009-02-12 18:55:42 +0100 | [diff] [blame] | 79 | * get_cpu_type(void) - extract cpu info |
| 80 | ******************************************/ |
| 81 | u32 get_cpu_type(void) |
| 82 | { |
| 83 | return readl(&ctrl_base->ctrl_omap_stat); |
| 84 | } |
| 85 | |
| 86 | /****************************************** |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 87 | * get_cpu_id(void) - extract cpu id |
| 88 | * returns 0 for ES1.0, cpuid otherwise |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 89 | ******************************************/ |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 90 | u32 get_cpu_id(void) |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 91 | { |
Dirk Behme | dc7af20 | 2009-08-08 09:30:21 +0200 | [diff] [blame] | 92 | struct ctrl_id *id_base; |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 93 | u32 cpuid = 0; |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 94 | |
| 95 | /* |
| 96 | * On ES1.0 the IDCODE register is not exposed on L4 |
Sanjeev Premi | fcbb44f | 2009-04-27 21:27:54 +0530 | [diff] [blame] | 97 | * so using CPU ID to differentiate between ES1.0 and > ES1.0. |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 98 | */ |
| 99 | __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid)); |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 100 | if ((cpuid & 0xf) == 0x0) { |
| 101 | return 0; |
| 102 | } else { |
Sanjeev Premi | fcbb44f | 2009-04-27 21:27:54 +0530 | [diff] [blame] | 103 | /* Decode the IDs on > ES1.0 */ |
Dirk Behme | dc7af20 | 2009-08-08 09:30:21 +0200 | [diff] [blame] | 104 | id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE; |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 105 | |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 106 | cpuid = readl(&id_base->idcode); |
| 107 | } |
| 108 | |
| 109 | return cpuid; |
| 110 | } |
| 111 | |
| 112 | /****************************************** |
| 113 | * get_cpu_family(void) - extract cpu info |
| 114 | ******************************************/ |
| 115 | u32 get_cpu_family(void) |
| 116 | { |
| 117 | u16 hawkeye; |
| 118 | u32 cpu_family; |
| 119 | u32 cpuid = get_cpu_id(); |
Sanjeev Premi | fcbb44f | 2009-04-27 21:27:54 +0530 | [diff] [blame] | 120 | |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 121 | if (cpuid == 0) |
| 122 | return CPU_OMAP34XX; |
Sanjeev Premi | fcbb44f | 2009-04-27 21:27:54 +0530 | [diff] [blame] | 123 | |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 124 | hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff; |
| 125 | switch (hawkeye) { |
| 126 | case HAWKEYE_OMAP34XX: |
| 127 | cpu_family = CPU_OMAP34XX; |
| 128 | break; |
| 129 | case HAWKEYE_AM35XX: |
| 130 | cpu_family = CPU_AM35XX; |
| 131 | break; |
| 132 | case HAWKEYE_OMAP36XX: |
| 133 | cpu_family = CPU_OMAP36XX; |
| 134 | break; |
| 135 | default: |
| 136 | cpu_family = CPU_OMAP34XX; |
Sanjeev Premi | fcbb44f | 2009-04-27 21:27:54 +0530 | [diff] [blame] | 137 | } |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 138 | |
| 139 | return cpu_family; |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 140 | } |
| 141 | |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 142 | /****************************************** |
| 143 | * get_cpu_rev(void) - extract version info |
| 144 | ******************************************/ |
| 145 | u32 get_cpu_rev(void) |
| 146 | { |
| 147 | u32 cpuid = get_cpu_id(); |
| 148 | |
| 149 | if (cpuid == 0) |
| 150 | return CPU_3XX_ES10; |
| 151 | else |
| 152 | return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf; |
| 153 | } |
| 154 | |
| 155 | /***************************************************************** |
| 156 | * get_sku_id(void) - read sku_id to get info on max clock rate |
| 157 | *****************************************************************/ |
| 158 | u32 get_sku_id(void) |
| 159 | { |
| 160 | struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE; |
| 161 | return readl(&id_base->sku_id) & SKUID_CLK_MASK; |
| 162 | } |
| 163 | |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 164 | /*************************************************************************** |
| 165 | * get_gpmc0_base() - Return current address hardware will be |
| 166 | * fetching from. The below effectively gives what is correct, its a bit |
| 167 | * mis-leading compared to the TRM. For the most general case the mask |
| 168 | * needs to be also taken into account this does work in practice. |
| 169 | * - for u-boot we currently map: |
| 170 | * -- 0 to nothing, |
| 171 | * -- 4 to flash |
| 172 | * -- 8 to enent |
| 173 | * -- c to wifi |
| 174 | ****************************************************************************/ |
| 175 | u32 get_gpmc0_base(void) |
| 176 | { |
| 177 | u32 b; |
| 178 | |
Dirk Behme | a4becd6 | 2009-08-08 09:30:22 +0200 | [diff] [blame] | 179 | b = readl(&gpmc_cfg->cs[0].config7); |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 180 | b &= 0x1F; /* keep base [5:0] */ |
| 181 | b = b << 24; /* ret 0x0b000000 */ |
| 182 | return b; |
| 183 | } |
| 184 | |
| 185 | /******************************************************************* |
| 186 | * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand) |
| 187 | *******************************************************************/ |
| 188 | u32 get_gpmc0_width(void) |
| 189 | { |
| 190 | return WIDTH_16BIT; |
| 191 | } |
| 192 | |
| 193 | /************************************************************************* |
| 194 | * get_board_rev() - setup to pass kernel board revision information |
| 195 | * returns:(bit[0-3] sub version, higher bit[7-4] is higher version) |
| 196 | *************************************************************************/ |
Nikita Kiryanov | 275c05a | 2012-01-05 02:03:22 +0000 | [diff] [blame] | 197 | u32 __weak get_board_rev(void) |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 198 | { |
| 199 | return 0x20; |
| 200 | } |
| 201 | |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 202 | /******************************************************** |
| 203 | * get_base(); get upper addr of current execution |
| 204 | *******************************************************/ |
Jeroen Hofstee | cbc7562 | 2014-10-08 22:57:41 +0200 | [diff] [blame^] | 205 | static u32 get_base(void) |
Dirk Behme | e0e49fe | 2008-12-14 09:47:15 +0100 | [diff] [blame] | 206 | { |
| 207 | u32 val; |
| 208 | |
| 209 | __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory"); |
| 210 | val &= 0xF0000000; |
| 211 | val >>= 28; |
| 212 | return val; |
| 213 | } |
| 214 | |
| 215 | /******************************************************** |
| 216 | * is_running_in_flash() - tell if currently running in |
| 217 | * FLASH. |
| 218 | *******************************************************/ |
| 219 | u32 is_running_in_flash(void) |
| 220 | { |
| 221 | if (get_base() < 4) |
| 222 | return 1; /* in FLASH */ |
| 223 | |
| 224 | return 0; /* running in SRAM or SDRAM */ |
| 225 | } |
| 226 | |
| 227 | /******************************************************** |
| 228 | * is_running_in_sram() - tell if currently running in |
| 229 | * SRAM. |
| 230 | *******************************************************/ |
| 231 | u32 is_running_in_sram(void) |
| 232 | { |
| 233 | if (get_base() == 4) |
| 234 | return 1; /* in SRAM */ |
| 235 | |
| 236 | return 0; /* running in FLASH or SDRAM */ |
| 237 | } |
| 238 | |
| 239 | /******************************************************** |
| 240 | * is_running_in_sdram() - tell if currently running in |
| 241 | * SDRAM. |
| 242 | *******************************************************/ |
| 243 | u32 is_running_in_sdram(void) |
| 244 | { |
| 245 | if (get_base() > 4) |
| 246 | return 1; /* in SDRAM */ |
| 247 | |
| 248 | return 0; /* running in SRAM or FLASH */ |
| 249 | } |
| 250 | |
| 251 | /*************************************************************** |
| 252 | * get_boot_type() - Is this an XIP type device or a stream one |
| 253 | * bits 4-0 specify type. Bit 5 says mem/perif |
| 254 | ***************************************************************/ |
| 255 | u32 get_boot_type(void) |
| 256 | { |
| 257 | return (readl(&ctrl_base->status) & SYSBOOT_MASK); |
| 258 | } |
| 259 | |
| 260 | /************************************************************* |
| 261 | * get_device_type(): tell if GP/HS/EMU/TST |
| 262 | *************************************************************/ |
| 263 | u32 get_device_type(void) |
| 264 | { |
| 265 | return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8); |
| 266 | } |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 267 | |
| 268 | #ifdef CONFIG_DISPLAY_CPUINFO |
| 269 | /** |
| 270 | * Print CPU information |
| 271 | */ |
| 272 | int print_cpuinfo (void) |
| 273 | { |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 274 | char *cpu_family_s, *cpu_s, *sec_s, *max_clk; |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 275 | |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 276 | switch (get_cpu_family()) { |
| 277 | case CPU_OMAP34XX: |
| 278 | cpu_family_s = "OMAP"; |
| 279 | switch (get_cpu_type()) { |
| 280 | case OMAP3503: |
| 281 | cpu_s = "3503"; |
| 282 | break; |
| 283 | case OMAP3515: |
| 284 | cpu_s = "3515"; |
| 285 | break; |
| 286 | case OMAP3525: |
| 287 | cpu_s = "3525"; |
| 288 | break; |
| 289 | case OMAP3530: |
| 290 | cpu_s = "3530"; |
| 291 | break; |
| 292 | default: |
| 293 | cpu_s = "35XX"; |
| 294 | break; |
| 295 | } |
| 296 | if ((get_cpu_rev() >= CPU_3XX_ES31) && |
| 297 | (get_sku_id() == SKUID_CLK_720MHZ)) |
man.huber@arcor.de | b709cd1 | 2013-04-10 12:12:17 +0000 | [diff] [blame] | 298 | max_clk = "720 MHz"; |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 299 | else |
man.huber@arcor.de | b709cd1 | 2013-04-10 12:12:17 +0000 | [diff] [blame] | 300 | max_clk = "600 MHz"; |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 301 | |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 302 | break; |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 303 | case CPU_AM35XX: |
| 304 | cpu_family_s = "AM"; |
| 305 | switch (get_cpu_type()) { |
| 306 | case AM3505: |
| 307 | cpu_s = "3505"; |
| 308 | break; |
| 309 | case AM3517: |
| 310 | cpu_s = "3517"; |
| 311 | break; |
| 312 | default: |
| 313 | cpu_s = "35XX"; |
| 314 | break; |
| 315 | } |
| 316 | max_clk = "600 Mhz"; |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 317 | break; |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 318 | case CPU_OMAP36XX: |
| 319 | cpu_family_s = "OMAP"; |
| 320 | switch (get_cpu_type()) { |
| 321 | case OMAP3730: |
| 322 | cpu_s = "3630/3730"; |
| 323 | break; |
| 324 | default: |
| 325 | cpu_s = "36XX/37XX"; |
| 326 | break; |
| 327 | } |
| 328 | max_clk = "1 Ghz"; |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 329 | break; |
| 330 | default: |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 331 | cpu_family_s = "OMAP"; |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 332 | cpu_s = "35XX"; |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 333 | max_clk = "600 Mhz"; |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 334 | } |
| 335 | |
| 336 | switch (get_device_type()) { |
| 337 | case TST_DEVICE: |
| 338 | sec_s = "TST"; |
| 339 | break; |
| 340 | case EMU_DEVICE: |
| 341 | sec_s = "EMU"; |
| 342 | break; |
| 343 | case HS_DEVICE: |
| 344 | sec_s = "HS"; |
| 345 | break; |
| 346 | case GP_DEVICE: |
| 347 | sec_s = "GP"; |
| 348 | break; |
| 349 | default: |
| 350 | sec_s = "?"; |
| 351 | } |
| 352 | |
Howard D. Gray | 3082bc6 | 2011-09-04 14:11:17 -0400 | [diff] [blame] | 353 | if (CPU_OMAP36XX == get_cpu_family()) |
Andreas Bießmann | 4738e36 | 2013-07-08 15:21:34 +0200 | [diff] [blame] | 354 | printf("%s%s-%s ES%s, CPU-OPP2, L3-200MHz, Max CPU Clock %s\n", |
| 355 | cpu_family_s, cpu_s, sec_s, |
| 356 | rev_s_37xx[get_cpu_rev()], max_clk); |
Howard D. Gray | 3082bc6 | 2011-09-04 14:11:17 -0400 | [diff] [blame] | 357 | else |
| 358 | printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n", |
Steve Sakoman | ad74ace | 2010-08-17 14:39:34 -0700 | [diff] [blame] | 359 | cpu_family_s, cpu_s, sec_s, |
| 360 | rev_s[get_cpu_rev()], max_clk); |
Sanjeev Premi | e32ef2e | 2009-04-27 21:27:27 +0530 | [diff] [blame] | 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | #endif /* CONFIG_DISPLAY_CPUINFO */ |