blob: 4e1873300142204e6ba61808cc0a33177f6bb497 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +03002/*
3 * Copyright (c) 2017 Tuomas Tynkkynen
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +03004 */
Bin Menga94f6a02018-10-15 02:21:19 -07005
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +03006#include <common.h>
Bin Menga94f6a02018-10-15 02:21:19 -07007#include <dm.h>
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +03008#include <fdtdec.h>
Bin Menga94f6a02018-10-15 02:21:19 -07009#include <virtio_types.h>
10#include <virtio.h>
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +030011
Tuomas Tynkkynendfdd46d2018-01-11 16:11:23 +020012#ifdef CONFIG_ARM64
13#include <asm/armv8/mmu.h>
14
15static struct mm_region qemu_arm64_mem_map[] = {
16 {
17 /* Flash */
18 .virt = 0x00000000UL,
19 .phys = 0x00000000UL,
20 .size = 0x08000000UL,
21 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
22 PTE_BLOCK_INNER_SHARE
23 }, {
Tuomas Tynkkynene09ca642018-09-04 18:16:52 +030024 /* Lowmem peripherals */
Tuomas Tynkkynendfdd46d2018-01-11 16:11:23 +020025 .virt = 0x08000000UL,
26 .phys = 0x08000000UL,
27 .size = 0x38000000,
28 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
29 PTE_BLOCK_NON_SHARE |
30 PTE_BLOCK_PXN | PTE_BLOCK_UXN
31 }, {
32 /* RAM */
33 .virt = 0x40000000UL,
34 .phys = 0x40000000UL,
Tuomas Tynkkynenac927392018-05-14 18:47:51 +030035 .size = 255UL * SZ_1G,
Tuomas Tynkkynendfdd46d2018-01-11 16:11:23 +020036 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
37 PTE_BLOCK_INNER_SHARE
38 }, {
Tuomas Tynkkynene09ca642018-09-04 18:16:52 +030039 /* Highmem PCI-E ECAM memory area */
40 .virt = 0x4010000000ULL,
41 .phys = 0x4010000000ULL,
42 .size = 0x10000000,
43 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
44 PTE_BLOCK_NON_SHARE |
45 PTE_BLOCK_PXN | PTE_BLOCK_UXN
46 }, {
47 /* Highmem PCI-E MMIO memory area */
48 .virt = 0x8000000000ULL,
49 .phys = 0x8000000000ULL,
50 .size = 0x8000000000ULL,
51 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
52 PTE_BLOCK_NON_SHARE |
53 PTE_BLOCK_PXN | PTE_BLOCK_UXN
54 }, {
Tuomas Tynkkynendfdd46d2018-01-11 16:11:23 +020055 /* List terminator */
56 0,
57 }
58};
59
60struct mm_region *mem_map = qemu_arm64_mem_map;
61#endif
62
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +030063int board_init(void)
64{
Bin Menga94f6a02018-10-15 02:21:19 -070065 /*
66 * Make sure virtio bus is enumerated so that peripherals
67 * on the virtio bus can be discovered by their drivers
68 */
69 virtio_init();
70
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +030071 return 0;
72}
73
74int dram_init(void)
75{
Siva Durga Prasad Paladugub3d55ea2018-07-16 15:56:11 +053076 if (fdtdec_setup_mem_size_base() != 0)
Tuomas Tynkkynen28cac522017-09-19 23:18:07 +030077 return -EINVAL;
78
79 return 0;
80}
81
82int dram_init_banksize(void)
83{
84 fdtdec_setup_memory_banksize();
85
86 return 0;
87}
88
89void *board_fdt_blob_setup(void)
90{
91 /* QEMU loads a generated DTB for us at the start of RAM. */
92 return (void *)CONFIG_SYS_SDRAM_BASE;
93}
Sughosh Ganu7064a5d2019-12-29 00:01:05 +053094
95#if defined(CONFIG_EFI_RNG_PROTOCOL)
96#include <efi_loader.h>
97#include <efi_rng.h>
98
99#include <dm/device-internal.h>
100
101efi_status_t platform_get_rng_device(struct udevice **dev)
102{
103 int ret;
104 efi_status_t status = EFI_DEVICE_ERROR;
105 struct udevice *bus, *devp;
106
107 for (uclass_first_device(UCLASS_VIRTIO, &bus); bus;
108 uclass_next_device(&bus)) {
109 for (device_find_first_child(bus, &devp); devp;
110 device_find_next_child(&devp)) {
111 if (device_get_uclass_id(devp) == UCLASS_RNG) {
112 *dev = devp;
113 status = EFI_SUCCESS;
114 break;
115 }
116 }
117 }
118
119 if (status != EFI_SUCCESS) {
120 debug("No rng device found\n");
121 return EFI_DEVICE_ERROR;
122 }
123
124 if (*dev) {
125 ret = device_probe(*dev);
126 if (ret)
127 return EFI_DEVICE_ERROR;
128 } else {
129 debug("Couldn't get child device\n");
130 return EFI_DEVICE_ERROR;
131 }
132
133 return EFI_SUCCESS;
134}
135#endif /* CONFIG_EFI_RNG_PROTOCOL */