Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net> |
| 4 | * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net> |
| 5 | * |
| 6 | * (C) Copyright 2007-2011 |
| 7 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> |
| 8 | * Tom Cubie <tangliang@allwinnertech.com> |
| 9 | * |
| 10 | * Some board init for the Allwinner A10-evb board. |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #include <common.h> |
Jagan Teki | 73a3ecf | 2018-05-07 13:03:36 +0530 | [diff] [blame] | 14 | #include <dm.h> |
Simon Glass | 313112a | 2019-08-01 09:46:46 -0600 | [diff] [blame] | 15 | #include <env.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 16 | #include <hang.h> |
Simon Glass | 2dc9c34 | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 17 | #include <image.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 18 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 19 | #include <log.h> |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 20 | #include <mmc.h> |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 21 | #include <axp_pmic.h> |
Jagan Teki | 73a3ecf | 2018-05-07 13:03:36 +0530 | [diff] [blame] | 22 | #include <generic-phy.h> |
| 23 | #include <phy-sun4i-usb.h> |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 24 | #include <asm/arch/clock.h> |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 25 | #include <asm/arch/cpu.h> |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 26 | #include <asm/arch/display.h> |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 27 | #include <asm/arch/dram.h> |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 28 | #include <asm/arch/gpio.h> |
| 29 | #include <asm/arch/mmc.h> |
Hans de Goede | a146c50 | 2016-07-09 09:56:56 +0200 | [diff] [blame] | 30 | #include <asm/arch/spl.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 31 | #include <linux/delay.h> |
Simon Glass | 48b6c6b | 2019-11-14 12:57:16 -0700 | [diff] [blame] | 32 | #include <u-boot/crc.h> |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 33 | #ifndef CONFIG_ARM64 |
| 34 | #include <asm/armv7.h> |
| 35 | #endif |
Hans de Goede | d9d0565 | 2015-04-23 23:23:50 +0200 | [diff] [blame] | 36 | #include <asm/gpio.h> |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 37 | #include <asm/io.h> |
Philipp Tomsich | 36b26d1 | 2018-11-25 19:22:18 +0100 | [diff] [blame] | 38 | #include <u-boot/crc.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 39 | #include <env_internal.h> |
Masahiro Yamada | 75f82d0 | 2018-03-05 01:20:11 +0900 | [diff] [blame] | 40 | #include <linux/libfdt.h> |
Hans de Goede | 5ed52f6 | 2015-08-15 11:55:26 +0200 | [diff] [blame] | 41 | #include <nand.h> |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 42 | #include <net.h> |
Maxime Ripard | ae56d97 | 2017-08-23 10:08:29 +0200 | [diff] [blame] | 43 | #include <spl.h> |
Jelle van der Waa | 3f3a309 | 2016-02-23 18:47:19 +0100 | [diff] [blame] | 44 | #include <sy8106a.h> |
Simon Glass | d9a766f | 2017-05-17 08:23:00 -0600 | [diff] [blame] | 45 | #include <asm/setup.h> |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 46 | |
Hans de Goede | a5b4cfe | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 47 | #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) |
| 48 | /* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */ |
| 49 | int soft_i2c_gpio_sda; |
| 50 | int soft_i2c_gpio_scl; |
Hans de Goede | d9d0565 | 2015-04-23 23:23:50 +0200 | [diff] [blame] | 51 | |
| 52 | static int soft_i2c_board_init(void) |
| 53 | { |
| 54 | int ret; |
| 55 | |
| 56 | soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA); |
| 57 | if (soft_i2c_gpio_sda < 0) { |
| 58 | printf("Error invalid soft i2c sda pin: '%s', err %d\n", |
| 59 | CONFIG_VIDEO_LCD_PANEL_I2C_SDA, soft_i2c_gpio_sda); |
| 60 | return soft_i2c_gpio_sda; |
| 61 | } |
| 62 | ret = gpio_request(soft_i2c_gpio_sda, "soft-i2c-sda"); |
| 63 | if (ret) { |
| 64 | printf("Error requesting soft i2c sda pin: '%s', err %d\n", |
| 65 | CONFIG_VIDEO_LCD_PANEL_I2C_SDA, ret); |
| 66 | return ret; |
| 67 | } |
| 68 | |
| 69 | soft_i2c_gpio_scl = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SCL); |
| 70 | if (soft_i2c_gpio_scl < 0) { |
| 71 | printf("Error invalid soft i2c scl pin: '%s', err %d\n", |
| 72 | CONFIG_VIDEO_LCD_PANEL_I2C_SCL, soft_i2c_gpio_scl); |
| 73 | return soft_i2c_gpio_scl; |
| 74 | } |
| 75 | ret = gpio_request(soft_i2c_gpio_scl, "soft-i2c-scl"); |
| 76 | if (ret) { |
| 77 | printf("Error requesting soft i2c scl pin: '%s', err %d\n", |
| 78 | CONFIG_VIDEO_LCD_PANEL_I2C_SCL, ret); |
| 79 | return ret; |
| 80 | } |
| 81 | |
| 82 | return 0; |
| 83 | } |
| 84 | #else |
| 85 | static int soft_i2c_board_init(void) { return 0; } |
Hans de Goede | a5b4cfe | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 86 | #endif |
| 87 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 88 | DECLARE_GLOBAL_DATA_PTR; |
| 89 | |
Jernej Skrabec | 07da880 | 2017-04-27 00:03:35 +0200 | [diff] [blame] | 90 | void i2c_init_board(void) |
| 91 | { |
| 92 | #ifdef CONFIG_I2C0_ENABLE |
| 93 | #if defined(CONFIG_MACH_SUN4I) || \ |
| 94 | defined(CONFIG_MACH_SUN5I) || \ |
| 95 | defined(CONFIG_MACH_SUN7I) || \ |
| 96 | defined(CONFIG_MACH_SUN8I_R40) |
| 97 | sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0); |
| 98 | sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0); |
| 99 | clock_twi_onoff(0, 1); |
| 100 | #elif defined(CONFIG_MACH_SUN6I) |
| 101 | sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0); |
| 102 | sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0); |
| 103 | clock_twi_onoff(0, 1); |
| 104 | #elif defined(CONFIG_MACH_SUN8I) |
| 105 | sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0); |
| 106 | sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0); |
| 107 | clock_twi_onoff(0, 1); |
Stefan Mavrodiev | cabe992 | 2019-01-08 12:04:30 +0200 | [diff] [blame] | 108 | #elif defined(CONFIG_MACH_SUN50I) |
| 109 | sunxi_gpio_set_cfgpin(SUNXI_GPH(0), SUN50I_GPH_TWI0); |
| 110 | sunxi_gpio_set_cfgpin(SUNXI_GPH(1), SUN50I_GPH_TWI0); |
| 111 | clock_twi_onoff(0, 1); |
Jernej Skrabec | 07da880 | 2017-04-27 00:03:35 +0200 | [diff] [blame] | 112 | #endif |
| 113 | #endif |
| 114 | |
| 115 | #ifdef CONFIG_I2C1_ENABLE |
| 116 | #if defined(CONFIG_MACH_SUN4I) || \ |
| 117 | defined(CONFIG_MACH_SUN7I) || \ |
| 118 | defined(CONFIG_MACH_SUN8I_R40) |
| 119 | sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1); |
| 120 | sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1); |
| 121 | clock_twi_onoff(1, 1); |
| 122 | #elif defined(CONFIG_MACH_SUN5I) |
| 123 | sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1); |
| 124 | sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1); |
| 125 | clock_twi_onoff(1, 1); |
| 126 | #elif defined(CONFIG_MACH_SUN6I) |
| 127 | sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1); |
| 128 | sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1); |
| 129 | clock_twi_onoff(1, 1); |
| 130 | #elif defined(CONFIG_MACH_SUN8I) |
| 131 | sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1); |
| 132 | sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1); |
| 133 | clock_twi_onoff(1, 1); |
Stefan Mavrodiev | cabe992 | 2019-01-08 12:04:30 +0200 | [diff] [blame] | 134 | #elif defined(CONFIG_MACH_SUN50I) |
| 135 | sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN50I_GPH_TWI1); |
| 136 | sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN50I_GPH_TWI1); |
| 137 | clock_twi_onoff(1, 1); |
Jernej Skrabec | 07da880 | 2017-04-27 00:03:35 +0200 | [diff] [blame] | 138 | #endif |
| 139 | #endif |
| 140 | |
| 141 | #ifdef CONFIG_I2C2_ENABLE |
| 142 | #if defined(CONFIG_MACH_SUN4I) || \ |
| 143 | defined(CONFIG_MACH_SUN7I) || \ |
| 144 | defined(CONFIG_MACH_SUN8I_R40) |
| 145 | sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2); |
| 146 | sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2); |
| 147 | clock_twi_onoff(2, 1); |
| 148 | #elif defined(CONFIG_MACH_SUN5I) |
| 149 | sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2); |
| 150 | sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2); |
| 151 | clock_twi_onoff(2, 1); |
| 152 | #elif defined(CONFIG_MACH_SUN6I) |
| 153 | sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2); |
| 154 | sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2); |
| 155 | clock_twi_onoff(2, 1); |
| 156 | #elif defined(CONFIG_MACH_SUN8I) |
| 157 | sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2); |
| 158 | sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2); |
| 159 | clock_twi_onoff(2, 1); |
Stefan Mavrodiev | cabe992 | 2019-01-08 12:04:30 +0200 | [diff] [blame] | 160 | #elif defined(CONFIG_MACH_SUN50I) |
| 161 | sunxi_gpio_set_cfgpin(SUNXI_GPE(14), SUN50I_GPE_TWI2); |
| 162 | sunxi_gpio_set_cfgpin(SUNXI_GPE(15), SUN50I_GPE_TWI2); |
| 163 | clock_twi_onoff(2, 1); |
Jernej Skrabec | 07da880 | 2017-04-27 00:03:35 +0200 | [diff] [blame] | 164 | #endif |
| 165 | #endif |
| 166 | |
| 167 | #ifdef CONFIG_I2C3_ENABLE |
| 168 | #if defined(CONFIG_MACH_SUN6I) |
| 169 | sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3); |
| 170 | sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3); |
| 171 | clock_twi_onoff(3, 1); |
| 172 | #elif defined(CONFIG_MACH_SUN7I) || \ |
| 173 | defined(CONFIG_MACH_SUN8I_R40) |
| 174 | sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3); |
| 175 | sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3); |
| 176 | clock_twi_onoff(3, 1); |
| 177 | #endif |
| 178 | #endif |
| 179 | |
| 180 | #ifdef CONFIG_I2C4_ENABLE |
| 181 | #if defined(CONFIG_MACH_SUN7I) || \ |
| 182 | defined(CONFIG_MACH_SUN8I_R40) |
| 183 | sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4); |
| 184 | sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4); |
| 185 | clock_twi_onoff(4, 1); |
| 186 | #endif |
| 187 | #endif |
| 188 | |
| 189 | #ifdef CONFIG_R_I2C_ENABLE |
Vasily Khoruzhick | 6f4c344 | 2018-11-05 20:24:30 -0800 | [diff] [blame] | 190 | #ifdef CONFIG_MACH_SUN50I |
| 191 | clock_twi_onoff(5, 1); |
| 192 | sunxi_gpio_set_cfgpin(SUNXI_GPL(8), SUN50I_GPL_R_TWI); |
| 193 | sunxi_gpio_set_cfgpin(SUNXI_GPL(9), SUN50I_GPL_R_TWI); |
| 194 | #else |
Jernej Skrabec | 07da880 | 2017-04-27 00:03:35 +0200 | [diff] [blame] | 195 | clock_twi_onoff(5, 1); |
| 196 | sunxi_gpio_set_cfgpin(SUNXI_GPL(0), SUN8I_H3_GPL_R_TWI); |
| 197 | sunxi_gpio_set_cfgpin(SUNXI_GPL(1), SUN8I_H3_GPL_R_TWI); |
| 198 | #endif |
Vasily Khoruzhick | 6f4c344 | 2018-11-05 20:24:30 -0800 | [diff] [blame] | 199 | #endif |
Jernej Skrabec | 07da880 | 2017-04-27 00:03:35 +0200 | [diff] [blame] | 200 | } |
| 201 | |
Maxime Ripard | 9ba2ac7 | 2018-01-23 21:17:03 +0100 | [diff] [blame] | 202 | #if defined(CONFIG_ENV_IS_IN_MMC) && defined(CONFIG_ENV_IS_IN_FAT) |
| 203 | enum env_location env_get_location(enum env_operation op, int prio) |
| 204 | { |
| 205 | switch (prio) { |
| 206 | case 0: |
| 207 | return ENVL_FAT; |
| 208 | |
| 209 | case 1: |
| 210 | return ENVL_MMC; |
| 211 | |
| 212 | default: |
| 213 | return ENVL_UNKNOWN; |
| 214 | } |
| 215 | } |
| 216 | #endif |
| 217 | |
Andre Przywara | d7cea36 | 2019-01-29 15:54:14 +0000 | [diff] [blame] | 218 | #ifdef CONFIG_DM_MMC |
| 219 | static void mmc_pinmux_setup(int sdc); |
| 220 | #endif |
| 221 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 222 | /* add board specific code here */ |
| 223 | int board_init(void) |
| 224 | { |
Mylène Josserand | 147c606 | 2017-04-02 12:59:10 +0200 | [diff] [blame] | 225 | __maybe_unused int id_pfr1, ret, satapwr_pin, macpwr_pin; |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 226 | |
| 227 | gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100); |
| 228 | |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 229 | #ifndef CONFIG_ARM64 |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 230 | asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1)); |
| 231 | debug("id_pfr1: 0x%08x\n", id_pfr1); |
| 232 | /* Generic Timer Extension available? */ |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 233 | if ((id_pfr1 >> CPUID_ARM_GENTIMER_SHIFT) & 0xf) { |
| 234 | uint32_t freq; |
| 235 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 236 | debug("Setting CNTFRQ\n"); |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 237 | |
| 238 | /* |
| 239 | * CNTFRQ is a secure register, so we will crash if we try to |
| 240 | * write this from the non-secure world (read is OK, though). |
| 241 | * In case some bootcode has already set the correct value, |
| 242 | * we avoid the risk of writing to it. |
| 243 | */ |
| 244 | asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq)); |
Andre Przywara | 70c7893 | 2017-02-16 01:20:19 +0000 | [diff] [blame] | 245 | if (freq != COUNTER_FREQUENCY) { |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 246 | debug("arch timer frequency is %d Hz, should be %d, fixing ...\n", |
Andre Przywara | 70c7893 | 2017-02-16 01:20:19 +0000 | [diff] [blame] | 247 | freq, COUNTER_FREQUENCY); |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 248 | #ifdef CONFIG_NON_SECURE |
| 249 | printf("arch timer frequency is wrong, but cannot adjust it\n"); |
| 250 | #else |
| 251 | asm volatile("mcr p15, 0, %0, c14, c0, 0" |
Andre Przywara | 70c7893 | 2017-02-16 01:20:19 +0000 | [diff] [blame] | 252 | : : "r"(COUNTER_FREQUENCY)); |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 253 | #endif |
| 254 | } |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 255 | } |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 256 | #endif /* !CONFIG_ARM64 */ |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 257 | |
Hans de Goede | 3ae1d13 | 2015-04-25 17:25:14 +0200 | [diff] [blame] | 258 | ret = axp_gpio_init(); |
| 259 | if (ret) |
| 260 | return ret; |
| 261 | |
Hans de Goede | 9c34c3e | 2016-03-22 20:10:30 +0100 | [diff] [blame] | 262 | #ifdef CONFIG_SATAPWR |
Mylène Josserand | 628426a | 2017-04-02 12:59:09 +0200 | [diff] [blame] | 263 | satapwr_pin = sunxi_name_to_gpio(CONFIG_SATAPWR); |
| 264 | gpio_request(satapwr_pin, "satapwr"); |
| 265 | gpio_direction_output(satapwr_pin, 1); |
Werner Böllmann | e58f830 | 2017-11-10 19:14:20 +0530 | [diff] [blame] | 266 | /* Give attached sata device time to power-up to avoid link timeouts */ |
| 267 | mdelay(500); |
Hans de Goede | 9c34c3e | 2016-03-22 20:10:30 +0100 | [diff] [blame] | 268 | #endif |
Hans de Goede | 42cbbe3 | 2016-03-17 13:53:03 +0100 | [diff] [blame] | 269 | #ifdef CONFIG_MACPWR |
Mylène Josserand | 147c606 | 2017-04-02 12:59:10 +0200 | [diff] [blame] | 270 | macpwr_pin = sunxi_name_to_gpio(CONFIG_MACPWR); |
| 271 | gpio_request(macpwr_pin, "macpwr"); |
| 272 | gpio_direction_output(macpwr_pin, 1); |
Hans de Goede | 42cbbe3 | 2016-03-17 13:53:03 +0100 | [diff] [blame] | 273 | #endif |
| 274 | |
Jernej Skrabec | 9220d50 | 2017-04-27 00:03:36 +0200 | [diff] [blame] | 275 | #ifdef CONFIG_DM_I2C |
| 276 | /* |
| 277 | * Temporary workaround for enabling I2C clocks until proper sunxi DM |
| 278 | * clk, reset and pinctrl drivers land. |
| 279 | */ |
| 280 | i2c_init_board(); |
| 281 | #endif |
Andre Przywara | d7cea36 | 2019-01-29 15:54:14 +0000 | [diff] [blame] | 282 | |
| 283 | #ifdef CONFIG_DM_MMC |
| 284 | /* |
| 285 | * Temporary workaround for enabling MMC clocks until a sunxi DM |
| 286 | * pinctrl driver lands. |
| 287 | */ |
| 288 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT); |
| 289 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
| 290 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA); |
| 291 | #endif |
| 292 | #endif /* CONFIG_DM_MMC */ |
Jernej Skrabec | 9220d50 | 2017-04-27 00:03:36 +0200 | [diff] [blame] | 293 | |
Hans de Goede | d9d0565 | 2015-04-23 23:23:50 +0200 | [diff] [blame] | 294 | /* Uses dm gpio code so do this here and not in i2c_init_board() */ |
| 295 | return soft_i2c_board_init(); |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 296 | } |
| 297 | |
Andre Przywara | 14a2539 | 2018-10-25 17:23:04 +0800 | [diff] [blame] | 298 | /* |
| 299 | * On older SoCs the SPL is actually at address zero, so using NULL as |
| 300 | * an error value does not work. |
| 301 | */ |
| 302 | #define INVALID_SPL_HEADER ((void *)~0UL) |
| 303 | |
| 304 | static struct boot_file_head * get_spl_header(uint8_t req_version) |
| 305 | { |
| 306 | struct boot_file_head *spl = (void *)(ulong)SPL_ADDR; |
| 307 | uint8_t spl_header_version = spl->spl_signature[3]; |
| 308 | |
| 309 | /* Is there really the SPL header (still) there? */ |
| 310 | if (memcmp(spl->spl_signature, SPL_SIGNATURE, 3) != 0) |
| 311 | return INVALID_SPL_HEADER; |
| 312 | |
| 313 | if (spl_header_version < req_version) { |
| 314 | printf("sunxi SPL version mismatch: expected %u, got %u\n", |
| 315 | req_version, spl_header_version); |
| 316 | return INVALID_SPL_HEADER; |
| 317 | } |
| 318 | |
| 319 | return spl; |
| 320 | } |
| 321 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 322 | int dram_init(void) |
| 323 | { |
Andre Przywara | 08ee1ba | 2018-10-25 17:23:07 +0800 | [diff] [blame] | 324 | struct boot_file_head *spl = get_spl_header(SPL_DRAM_HEADER_VERSION); |
| 325 | |
| 326 | if (spl == INVALID_SPL_HEADER) |
| 327 | gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, |
| 328 | PHYS_SDRAM_0_SIZE); |
| 329 | else |
| 330 | gd->ram_size = (phys_addr_t)spl->dram_size << 20; |
| 331 | |
| 332 | if (gd->ram_size > CONFIG_SUNXI_DRAM_MAX_SIZE) |
| 333 | gd->ram_size = CONFIG_SUNXI_DRAM_MAX_SIZE; |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 334 | |
| 335 | return 0; |
| 336 | } |
| 337 | |
Boris Brezillon | 57f2038 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 338 | #if defined(CONFIG_NAND_SUNXI) |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 339 | static void nand_pinmux_setup(void) |
| 340 | { |
| 341 | unsigned int pin; |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 342 | |
Hans de Goede | d223678 | 2015-08-15 13:17:49 +0200 | [diff] [blame] | 343 | for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(19); pin++) |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 344 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); |
| 345 | |
Hans de Goede | d223678 | 2015-08-15 13:17:49 +0200 | [diff] [blame] | 346 | #if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN7I |
| 347 | for (pin = SUNXI_GPC(20); pin <= SUNXI_GPC(22); pin++) |
| 348 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); |
| 349 | #endif |
| 350 | /* sun4i / sun7i do have a PC23, but it is not used for nand, |
| 351 | * only sun7i has a PC24 */ |
| 352 | #ifdef CONFIG_MACH_SUN7I |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 353 | sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_NAND); |
Hans de Goede | d223678 | 2015-08-15 13:17:49 +0200 | [diff] [blame] | 354 | #endif |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 355 | } |
| 356 | |
| 357 | static void nand_clock_setup(void) |
| 358 | { |
| 359 | struct sunxi_ccm_reg *const ccm = |
| 360 | (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; |
Hans de Goede | e5561a8 | 2015-08-15 11:58:03 +0200 | [diff] [blame] | 361 | |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 362 | setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); |
Miquel Raynal | ebeeb80 | 2018-02-28 20:51:53 +0100 | [diff] [blame] | 363 | #if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I || \ |
| 364 | defined CONFIG_MACH_SUN9I || defined CONFIG_MACH_SUN50I |
| 365 | setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); |
| 366 | #endif |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 367 | setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); |
| 368 | } |
Hans de Goede | 5ed52f6 | 2015-08-15 11:55:26 +0200 | [diff] [blame] | 369 | |
| 370 | void board_nand_init(void) |
| 371 | { |
| 372 | nand_pinmux_setup(); |
| 373 | nand_clock_setup(); |
Boris Brezillon | 57f2038 | 2016-06-15 21:09:23 +0200 | [diff] [blame] | 374 | #ifndef CONFIG_SPL_BUILD |
| 375 | sunxi_nand_init(); |
| 376 | #endif |
Hans de Goede | 5ed52f6 | 2015-08-15 11:55:26 +0200 | [diff] [blame] | 377 | } |
Karol Gugala | 7bea893 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 378 | #endif |
| 379 | |
Masahiro Yamada | 0a78017 | 2017-05-09 20:31:39 +0900 | [diff] [blame] | 380 | #ifdef CONFIG_MMC |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 381 | static void mmc_pinmux_setup(int sdc) |
| 382 | { |
| 383 | unsigned int pin; |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 384 | __maybe_unused int pins; |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 385 | |
| 386 | switch (sdc) { |
| 387 | case 0: |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 388 | /* SDC0: PF0-PF5 */ |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 389 | for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { |
Paul Kocialkowski | ae358a4 | 2015-03-22 18:12:22 +0100 | [diff] [blame] | 390 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0); |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 391 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 392 | sunxi_gpio_set_drv(pin, 2); |
| 393 | } |
| 394 | break; |
| 395 | |
| 396 | case 1: |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 397 | pins = sunxi_name_to_gpio_bank(CONFIG_MMC1_PINS); |
| 398 | |
Chen-Yu Tsai | 111bc59 | 2016-11-30 16:28:34 +0800 | [diff] [blame] | 399 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \ |
| 400 | defined(CONFIG_MACH_SUN8I_R40) |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 401 | if (pins == SUNXI_GPIO_H) { |
| 402 | /* SDC1: PH22-PH-27 */ |
| 403 | for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) { |
| 404 | sunxi_gpio_set_cfgpin(pin, SUN4I_GPH_SDC1); |
| 405 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 406 | sunxi_gpio_set_drv(pin, 2); |
| 407 | } |
| 408 | } else { |
| 409 | /* SDC1: PG0-PG5 */ |
| 410 | for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { |
| 411 | sunxi_gpio_set_cfgpin(pin, SUN4I_GPG_SDC1); |
| 412 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 413 | sunxi_gpio_set_drv(pin, 2); |
| 414 | } |
| 415 | } |
| 416 | #elif defined(CONFIG_MACH_SUN5I) |
| 417 | /* SDC1: PG3-PG8 */ |
Hans de Goede | 4dccfd4 | 2014-10-03 16:44:57 +0200 | [diff] [blame] | 418 | for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) { |
Paul Kocialkowski | ae358a4 | 2015-03-22 18:12:22 +0100 | [diff] [blame] | 419 | sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1); |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 420 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 421 | sunxi_gpio_set_drv(pin, 2); |
| 422 | } |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 423 | #elif defined(CONFIG_MACH_SUN6I) |
| 424 | /* SDC1: PG0-PG5 */ |
| 425 | for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { |
| 426 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPG_SDC1); |
| 427 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 428 | sunxi_gpio_set_drv(pin, 2); |
| 429 | } |
| 430 | #elif defined(CONFIG_MACH_SUN8I) |
| 431 | if (pins == SUNXI_GPIO_D) { |
| 432 | /* SDC1: PD2-PD7 */ |
| 433 | for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) { |
| 434 | sunxi_gpio_set_cfgpin(pin, SUN8I_GPD_SDC1); |
| 435 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 436 | sunxi_gpio_set_drv(pin, 2); |
| 437 | } |
| 438 | } else { |
| 439 | /* SDC1: PG0-PG5 */ |
| 440 | for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { |
| 441 | sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1); |
| 442 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 443 | sunxi_gpio_set_drv(pin, 2); |
| 444 | } |
| 445 | } |
| 446 | #endif |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 447 | break; |
| 448 | |
| 449 | case 2: |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 450 | pins = sunxi_name_to_gpio_bank(CONFIG_MMC2_PINS); |
| 451 | |
| 452 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) |
| 453 | /* SDC2: PC6-PC11 */ |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 454 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { |
Paul Kocialkowski | ae358a4 | 2015-03-22 18:12:22 +0100 | [diff] [blame] | 455 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 456 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 457 | sunxi_gpio_set_drv(pin, 2); |
| 458 | } |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 459 | #elif defined(CONFIG_MACH_SUN5I) |
| 460 | if (pins == SUNXI_GPIO_E) { |
| 461 | /* SDC2: PE4-PE9 */ |
| 462 | for (pin = SUNXI_GPE(4); pin <= SUNXI_GPD(9); pin++) { |
| 463 | sunxi_gpio_set_cfgpin(pin, SUN5I_GPE_SDC2); |
| 464 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 465 | sunxi_gpio_set_drv(pin, 2); |
| 466 | } |
| 467 | } else { |
| 468 | /* SDC2: PC6-PC15 */ |
| 469 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { |
| 470 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 471 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 472 | sunxi_gpio_set_drv(pin, 2); |
| 473 | } |
| 474 | } |
| 475 | #elif defined(CONFIG_MACH_SUN6I) |
| 476 | if (pins == SUNXI_GPIO_A) { |
| 477 | /* SDC2: PA9-PA14 */ |
| 478 | for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { |
| 479 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC2); |
| 480 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 481 | sunxi_gpio_set_drv(pin, 2); |
| 482 | } |
| 483 | } else { |
| 484 | /* SDC2: PC6-PC15, PC24 */ |
| 485 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { |
| 486 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 487 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 488 | sunxi_gpio_set_drv(pin, 2); |
| 489 | } |
| 490 | |
| 491 | sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2); |
| 492 | sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); |
| 493 | sunxi_gpio_set_drv(SUNXI_GPC(24), 2); |
| 494 | } |
Chen-Yu Tsai | 111bc59 | 2016-11-30 16:28:34 +0800 | [diff] [blame] | 495 | #elif defined(CONFIG_MACH_SUN8I_R40) |
| 496 | /* SDC2: PC6-PC15, PC24 */ |
| 497 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { |
| 498 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 499 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 500 | sunxi_gpio_set_drv(pin, 2); |
| 501 | } |
| 502 | |
| 503 | sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2); |
| 504 | sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); |
| 505 | sunxi_gpio_set_drv(SUNXI_GPC(24), 2); |
Siarhei Siamashka | 26c50fb | 2016-03-29 17:29:10 +0200 | [diff] [blame] | 506 | #elif defined(CONFIG_MACH_SUN8I) || defined(CONFIG_MACH_SUN50I) |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 507 | /* SDC2: PC5-PC6, PC8-PC16 */ |
| 508 | for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) { |
| 509 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 510 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 511 | sunxi_gpio_set_drv(pin, 2); |
| 512 | } |
| 513 | |
| 514 | for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) { |
| 515 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 516 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 517 | sunxi_gpio_set_drv(pin, 2); |
| 518 | } |
Icenowy Zheng | a838a15 | 2018-07-21 16:20:29 +0800 | [diff] [blame] | 519 | #elif defined(CONFIG_MACH_SUN50I_H6) |
| 520 | /* SDC2: PC4-PC14 */ |
| 521 | for (pin = SUNXI_GPC(4); pin <= SUNXI_GPC(14); pin++) { |
| 522 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 523 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 524 | sunxi_gpio_set_drv(pin, 2); |
| 525 | } |
Philipp Tomsich | a0c7c71 | 2016-10-28 18:21:33 +0800 | [diff] [blame] | 526 | #elif defined(CONFIG_MACH_SUN9I) |
| 527 | /* SDC2: PC6-PC16 */ |
| 528 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(16); pin++) { |
| 529 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 530 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 531 | sunxi_gpio_set_drv(pin, 2); |
| 532 | } |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 533 | #endif |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 534 | break; |
| 535 | |
| 536 | case 3: |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 537 | pins = sunxi_name_to_gpio_bank(CONFIG_MMC3_PINS); |
| 538 | |
Chen-Yu Tsai | 111bc59 | 2016-11-30 16:28:34 +0800 | [diff] [blame] | 539 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) || \ |
| 540 | defined(CONFIG_MACH_SUN8I_R40) |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 541 | /* SDC3: PI4-PI9 */ |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 542 | for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 543 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPI_SDC3); |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 544 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 545 | sunxi_gpio_set_drv(pin, 2); |
| 546 | } |
Paul Kocialkowski | d390d8c | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 547 | #elif defined(CONFIG_MACH_SUN6I) |
| 548 | if (pins == SUNXI_GPIO_A) { |
| 549 | /* SDC3: PA9-PA14 */ |
| 550 | for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { |
| 551 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC3); |
| 552 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 553 | sunxi_gpio_set_drv(pin, 2); |
| 554 | } |
| 555 | } else { |
| 556 | /* SDC3: PC6-PC15, PC24 */ |
| 557 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { |
| 558 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3); |
| 559 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 560 | sunxi_gpio_set_drv(pin, 2); |
| 561 | } |
| 562 | |
| 563 | sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3); |
| 564 | sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); |
| 565 | sunxi_gpio_set_drv(SUNXI_GPC(24), 2); |
| 566 | } |
| 567 | #endif |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 568 | break; |
| 569 | |
| 570 | default: |
| 571 | printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc); |
| 572 | break; |
| 573 | } |
| 574 | } |
| 575 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 576 | int board_mmc_init(struct bd_info *bis) |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 577 | { |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 578 | __maybe_unused struct mmc *mmc0, *mmc1; |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 579 | |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 580 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT); |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 581 | mmc0 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT); |
| 582 | if (!mmc0) |
| 583 | return -1; |
| 584 | |
Hans de Goede | af593e4 | 2014-10-02 20:43:50 +0200 | [diff] [blame] | 585 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 586 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA); |
Hans de Goede | 63deaa8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 587 | mmc1 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA); |
| 588 | if (!mmc1) |
| 589 | return -1; |
| 590 | #endif |
| 591 | |
Ian Campbell | b4e9f2f | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 592 | return 0; |
| 593 | } |
| 594 | #endif |
| 595 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 596 | #ifdef CONFIG_SPL_BUILD |
Andre Przywara | 08ee1ba | 2018-10-25 17:23:07 +0800 | [diff] [blame] | 597 | |
| 598 | static void sunxi_spl_store_dram_size(phys_addr_t dram_size) |
| 599 | { |
| 600 | struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); |
| 601 | |
| 602 | if (spl == INVALID_SPL_HEADER) |
| 603 | return; |
| 604 | |
| 605 | /* Promote the header version for U-Boot proper, if needed. */ |
| 606 | if (spl->spl_signature[3] < SPL_DRAM_HEADER_VERSION) |
| 607 | spl->spl_signature[3] = SPL_DRAM_HEADER_VERSION; |
| 608 | |
| 609 | spl->dram_size = dram_size >> 20; |
| 610 | } |
| 611 | |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 612 | void sunxi_board_init(void) |
| 613 | { |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 614 | int power_failed = 0; |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 615 | |
Jelle van der Waa | 3f3a309 | 2016-02-23 18:47:19 +0100 | [diff] [blame] | 616 | #ifdef CONFIG_SY8106A_POWER |
| 617 | power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT); |
| 618 | #endif |
| 619 | |
vishnupatekar | 1895dfd | 2015-11-29 01:07:22 +0800 | [diff] [blame] | 620 | #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \ |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 621 | defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ |
| 622 | defined CONFIG_AXP818_POWER |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 623 | power_failed = axp_init(); |
| 624 | |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 625 | #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ |
| 626 | defined CONFIG_AXP818_POWER |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 627 | power_failed |= axp_set_dcdc1(CONFIG_AXP_DCDC1_VOLT); |
Hans de Goede | 1f24736 | 2014-06-13 22:55:51 +0200 | [diff] [blame] | 628 | #endif |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 629 | power_failed |= axp_set_dcdc2(CONFIG_AXP_DCDC2_VOLT); |
| 630 | power_failed |= axp_set_dcdc3(CONFIG_AXP_DCDC3_VOLT); |
vishnupatekar | 1895dfd | 2015-11-29 01:07:22 +0800 | [diff] [blame] | 631 | #if !defined(CONFIG_AXP209_POWER) && !defined(CONFIG_AXP818_POWER) |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 632 | power_failed |= axp_set_dcdc4(CONFIG_AXP_DCDC4_VOLT); |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 633 | #endif |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 634 | #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ |
| 635 | defined CONFIG_AXP818_POWER |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 636 | power_failed |= axp_set_dcdc5(CONFIG_AXP_DCDC5_VOLT); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 637 | #endif |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 638 | |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 639 | #if defined CONFIG_AXP221_POWER || defined CONFIG_AXP809_POWER || \ |
| 640 | defined CONFIG_AXP818_POWER |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 641 | power_failed |= axp_set_aldo1(CONFIG_AXP_ALDO1_VOLT); |
| 642 | #endif |
| 643 | power_failed |= axp_set_aldo2(CONFIG_AXP_ALDO2_VOLT); |
Chen-Yu Tsai | c05aa39 | 2016-01-12 14:42:40 +0800 | [diff] [blame] | 644 | #if !defined(CONFIG_AXP152_POWER) |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 645 | power_failed |= axp_set_aldo3(CONFIG_AXP_ALDO3_VOLT); |
| 646 | #endif |
| 647 | #ifdef CONFIG_AXP209_POWER |
| 648 | power_failed |= axp_set_aldo4(CONFIG_AXP_ALDO4_VOLT); |
| 649 | #endif |
| 650 | |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 651 | #if defined(CONFIG_AXP221_POWER) || defined(CONFIG_AXP809_POWER) || \ |
| 652 | defined(CONFIG_AXP818_POWER) |
Chen-Yu Tsai | 2e6911f | 2016-01-12 14:42:37 +0800 | [diff] [blame] | 653 | power_failed |= axp_set_dldo(1, CONFIG_AXP_DLDO1_VOLT); |
| 654 | power_failed |= axp_set_dldo(2, CONFIG_AXP_DLDO2_VOLT); |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 655 | #if !defined CONFIG_AXP809_POWER |
Chen-Yu Tsai | 2e6911f | 2016-01-12 14:42:37 +0800 | [diff] [blame] | 656 | power_failed |= axp_set_dldo(3, CONFIG_AXP_DLDO3_VOLT); |
| 657 | power_failed |= axp_set_dldo(4, CONFIG_AXP_DLDO4_VOLT); |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 658 | #endif |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 659 | power_failed |= axp_set_eldo(1, CONFIG_AXP_ELDO1_VOLT); |
| 660 | power_failed |= axp_set_eldo(2, CONFIG_AXP_ELDO2_VOLT); |
| 661 | power_failed |= axp_set_eldo(3, CONFIG_AXP_ELDO3_VOLT); |
| 662 | #endif |
Chen-Yu Tsai | d028fba | 2016-03-30 00:26:48 +0800 | [diff] [blame] | 663 | |
| 664 | #ifdef CONFIG_AXP818_POWER |
| 665 | power_failed |= axp_set_fldo(1, CONFIG_AXP_FLDO1_VOLT); |
| 666 | power_failed |= axp_set_fldo(2, CONFIG_AXP_FLDO2_VOLT); |
| 667 | power_failed |= axp_set_fldo(3, CONFIG_AXP_FLDO3_VOLT); |
Chen-Yu Tsai | f1e66e7 | 2016-05-02 10:28:15 +0800 | [diff] [blame] | 668 | #endif |
| 669 | |
| 670 | #if defined CONFIG_AXP809_POWER || defined CONFIG_AXP818_POWER |
Chen-Yu Tsai | 0e3efd3 | 2016-05-02 10:28:12 +0800 | [diff] [blame] | 671 | power_failed |= axp_set_sw(IS_ENABLED(CONFIG_AXP_SW_ON)); |
Chen-Yu Tsai | d028fba | 2016-03-30 00:26:48 +0800 | [diff] [blame] | 672 | #endif |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 673 | #endif |
From: Karl Palsson | 0a0bcde | 2018-12-19 13:00:39 +0000 | [diff] [blame] | 674 | printf("DRAM:"); |
| 675 | gd->ram_size = sunxi_dram_init(); |
| 676 | printf(" %d MiB\n", (int)(gd->ram_size >> 20)); |
| 677 | if (!gd->ram_size) |
| 678 | hang(); |
| 679 | |
| 680 | sunxi_spl_store_dram_size(gd->ram_size); |
Andre Przywara | 08ee1ba | 2018-10-25 17:23:07 +0800 | [diff] [blame] | 681 | |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 682 | /* |
| 683 | * Only clock up the CPU to full speed if we are reasonably |
| 684 | * assured it's being powered with suitable core voltage |
| 685 | */ |
| 686 | if (!power_failed) |
Iain Paton | 630df14 | 2015-03-28 10:26:38 +0000 | [diff] [blame] | 687 | clock_set_pll1(CONFIG_SYS_CLK_FREQ); |
Henrik Nordstrom | aa382ad | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 688 | else |
From: Karl Palsson | 0a0bcde | 2018-12-19 13:00:39 +0000 | [diff] [blame] | 689 | printf("Failed to set core voltage! Can't set CPU frequency\n"); |
Ian Campbell | 6efe369 | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 690 | } |
| 691 | #endif |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 692 | |
Paul Kocialkowski | dbbccaf | 2015-03-22 18:07:13 +0100 | [diff] [blame] | 693 | #ifdef CONFIG_USB_GADGET |
| 694 | int g_dnl_board_usb_cable_connected(void) |
| 695 | { |
Jagan Teki | 73a3ecf | 2018-05-07 13:03:36 +0530 | [diff] [blame] | 696 | struct udevice *dev; |
| 697 | struct phy phy; |
| 698 | int ret; |
| 699 | |
Jean-Jacques Hiblot | 9dc0d5c | 2018-11-29 10:52:46 +0100 | [diff] [blame] | 700 | ret = uclass_get_device(UCLASS_USB_GADGET_GENERIC, 0, &dev); |
Jagan Teki | 73a3ecf | 2018-05-07 13:03:36 +0530 | [diff] [blame] | 701 | if (ret) { |
| 702 | pr_err("%s: Cannot find USB device\n", __func__); |
| 703 | return ret; |
| 704 | } |
| 705 | |
| 706 | ret = generic_phy_get_by_name(dev, "usb", &phy); |
| 707 | if (ret) { |
| 708 | pr_err("failed to get %s USB PHY\n", dev->name); |
| 709 | return ret; |
| 710 | } |
| 711 | |
| 712 | ret = generic_phy_init(&phy); |
| 713 | if (ret) { |
| 714 | pr_err("failed to init %s USB PHY\n", dev->name); |
| 715 | return ret; |
| 716 | } |
| 717 | |
| 718 | ret = sun4i_usb_phy_vbus_detect(&phy); |
| 719 | if (ret == 1) { |
| 720 | pr_err("A charger is plugged into the OTG\n"); |
| 721 | return -ENODEV; |
| 722 | } |
| 723 | |
| 724 | return ret; |
Paul Kocialkowski | dbbccaf | 2015-03-22 18:07:13 +0100 | [diff] [blame] | 725 | } |
| 726 | #endif |
| 727 | |
Paul Kocialkowski | 99ae0f6 | 2015-03-28 18:35:36 +0100 | [diff] [blame] | 728 | #ifdef CONFIG_SERIAL_TAG |
| 729 | void get_board_serial(struct tag_serialnr *serialnr) |
| 730 | { |
| 731 | char *serial_string; |
| 732 | unsigned long long serial; |
| 733 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 734 | serial_string = env_get("serial#"); |
Paul Kocialkowski | 99ae0f6 | 2015-03-28 18:35:36 +0100 | [diff] [blame] | 735 | |
| 736 | if (serial_string) { |
| 737 | serial = simple_strtoull(serial_string, NULL, 16); |
| 738 | |
| 739 | serialnr->high = (unsigned int) (serial >> 32); |
| 740 | serialnr->low = (unsigned int) (serial & 0xffffffff); |
| 741 | } else { |
| 742 | serialnr->high = 0; |
| 743 | serialnr->low = 0; |
| 744 | } |
| 745 | } |
| 746 | #endif |
| 747 | |
Bernhard Nortmann | ead498a | 2015-09-17 18:52:52 +0200 | [diff] [blame] | 748 | /* |
| 749 | * Check the SPL header for the "sunxi" variant. If found: parse values |
| 750 | * that might have been passed by the loader ("fel" utility), and update |
| 751 | * the environment accordingly. |
| 752 | */ |
| 753 | static void parse_spl_header(const uint32_t spl_addr) |
| 754 | { |
Andre Przywara | 14a2539 | 2018-10-25 17:23:04 +0800 | [diff] [blame] | 755 | struct boot_file_head *spl = get_spl_header(SPL_ENV_HEADER_VERSION); |
Bernhard Nortmann | e9bbbe8 | 2016-06-09 07:37:35 +0200 | [diff] [blame] | 756 | |
Andre Przywara | 14a2539 | 2018-10-25 17:23:04 +0800 | [diff] [blame] | 757 | if (spl == INVALID_SPL_HEADER) |
Bernhard Nortmann | e9bbbe8 | 2016-06-09 07:37:35 +0200 | [diff] [blame] | 758 | return; |
Andre Przywara | 14a2539 | 2018-10-25 17:23:04 +0800 | [diff] [blame] | 759 | |
Bernhard Nortmann | e9bbbe8 | 2016-06-09 07:37:35 +0200 | [diff] [blame] | 760 | if (!spl->fel_script_address) |
| 761 | return; |
| 762 | |
| 763 | if (spl->fel_uEnv_length != 0) { |
| 764 | /* |
| 765 | * data is expected in uEnv.txt compatible format, so "env |
| 766 | * import -t" the string(s) at fel_script_address right away. |
| 767 | */ |
Andre Przywara | ac4e673 | 2016-09-05 01:32:41 +0100 | [diff] [blame] | 768 | himport_r(&env_htab, (char *)(uintptr_t)spl->fel_script_address, |
Bernhard Nortmann | e9bbbe8 | 2016-06-09 07:37:35 +0200 | [diff] [blame] | 769 | spl->fel_uEnv_length, '\n', H_NOCLEAR, 0, 0, NULL); |
| 770 | return; |
Bernhard Nortmann | ead498a | 2015-09-17 18:52:52 +0200 | [diff] [blame] | 771 | } |
Bernhard Nortmann | e9bbbe8 | 2016-06-09 07:37:35 +0200 | [diff] [blame] | 772 | /* otherwise assume .scr format (mkimage-type script) */ |
Simon Glass | 4d949a2 | 2017-08-03 12:22:10 -0600 | [diff] [blame] | 773 | env_set_hex("fel_scriptaddr", spl->fel_script_address); |
Bernhard Nortmann | ead498a | 2015-09-17 18:52:52 +0200 | [diff] [blame] | 774 | } |
Bernhard Nortmann | ead498a | 2015-09-17 18:52:52 +0200 | [diff] [blame] | 775 | |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 776 | /* |
| 777 | * Note this function gets called multiple times. |
| 778 | * It must not make any changes to env variables which already exist. |
| 779 | */ |
| 780 | static void setup_environment(const void *fdt) |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 781 | { |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 782 | char serial_string[17] = { 0 }; |
Hans de Goede | 11d7098 | 2014-11-26 00:04:24 +0100 | [diff] [blame] | 783 | unsigned int sid[4]; |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 784 | uint8_t mac_addr[6]; |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 785 | char ethaddr[16]; |
| 786 | int i, ret; |
Bernhard Nortmann | ead498a | 2015-09-17 18:52:52 +0200 | [diff] [blame] | 787 | |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 788 | ret = sunxi_get_sid(sid); |
Hans de Goede | e5fe548 | 2016-07-29 11:47:03 +0200 | [diff] [blame] | 789 | if (ret == 0 && sid[0] != 0) { |
| 790 | /* |
| 791 | * The single words 1 - 3 of the SID have quite a few bits |
| 792 | * which are the same on many models, so we take a crc32 |
| 793 | * of all 3 words, to get a more unique value. |
| 794 | * |
| 795 | * Note we only do this on newer SoCs as we cannot change |
| 796 | * the algorithm on older SoCs since those have been using |
| 797 | * fixed mac-addresses based on only using word 3 for a |
| 798 | * long time and changing a fixed mac-address with an |
| 799 | * u-boot update is not good. |
| 800 | */ |
| 801 | #if !defined(CONFIG_MACH_SUN4I) && !defined(CONFIG_MACH_SUN5I) && \ |
| 802 | !defined(CONFIG_MACH_SUN6I) && !defined(CONFIG_MACH_SUN7I) && \ |
| 803 | !defined(CONFIG_MACH_SUN8I_A23) && !defined(CONFIG_MACH_SUN8I_A33) |
| 804 | sid[3] = crc32(0, (unsigned char *)&sid[1], 12); |
| 805 | #endif |
| 806 | |
Hans de Goede | abca843 | 2016-07-27 17:58:06 +0200 | [diff] [blame] | 807 | /* Ensure the NIC specific bytes of the mac are not all 0 */ |
| 808 | if ((sid[3] & 0xffffff) == 0) |
| 809 | sid[3] |= 0x800000; |
| 810 | |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 811 | for (i = 0; i < 4; i++) { |
| 812 | sprintf(ethaddr, "ethernet%d", i); |
| 813 | if (!fdt_get_alias(fdt, ethaddr)) |
| 814 | continue; |
| 815 | |
| 816 | if (i == 0) |
| 817 | strcpy(ethaddr, "ethaddr"); |
| 818 | else |
| 819 | sprintf(ethaddr, "eth%daddr", i); |
| 820 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 821 | if (env_get(ethaddr)) |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 822 | continue; |
| 823 | |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 824 | /* Non OUI / registered MAC address */ |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 825 | mac_addr[0] = (i << 4) | 0x02; |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 826 | mac_addr[1] = (sid[0] >> 0) & 0xff; |
| 827 | mac_addr[2] = (sid[3] >> 24) & 0xff; |
| 828 | mac_addr[3] = (sid[3] >> 16) & 0xff; |
| 829 | mac_addr[4] = (sid[3] >> 8) & 0xff; |
| 830 | mac_addr[5] = (sid[3] >> 0) & 0xff; |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 831 | |
Simon Glass | 8551d55 | 2017-08-03 12:22:11 -0600 | [diff] [blame] | 832 | eth_env_set_enetaddr(ethaddr, mac_addr); |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 833 | } |
| 834 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 835 | if (!env_get("serial#")) { |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 836 | snprintf(serial_string, sizeof(serial_string), |
| 837 | "%08x%08x", sid[0], sid[3]); |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 838 | |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 839 | env_set("serial#", serial_string); |
Paul Kocialkowski | 9293594 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 840 | } |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 841 | } |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 842 | } |
| 843 | |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 844 | int misc_init_r(void) |
| 845 | { |
Maxime Ripard | ae56d97 | 2017-08-23 10:08:29 +0200 | [diff] [blame] | 846 | uint boot; |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 847 | |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 848 | env_set("fel_booted", NULL); |
| 849 | env_set("fel_scriptaddr", NULL); |
Maxime Ripard | 65cefba | 2017-08-23 10:12:22 +0200 | [diff] [blame] | 850 | env_set("mmc_bootdev", NULL); |
Maxime Ripard | ae56d97 | 2017-08-23 10:08:29 +0200 | [diff] [blame] | 851 | |
| 852 | boot = sunxi_get_boot_device(); |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 853 | /* determine if we are running in FEL mode */ |
Maxime Ripard | ae56d97 | 2017-08-23 10:08:29 +0200 | [diff] [blame] | 854 | if (boot == BOOT_DEVICE_BOARD) { |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 855 | env_set("fel_booted", "1"); |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 856 | parse_spl_header(SPL_ADDR); |
Maxime Ripard | 65cefba | 2017-08-23 10:12:22 +0200 | [diff] [blame] | 857 | /* or if we booted from MMC, and which one */ |
| 858 | } else if (boot == BOOT_DEVICE_MMC1) { |
| 859 | env_set("mmc_bootdev", "0"); |
| 860 | } else if (boot == BOOT_DEVICE_MMC2) { |
| 861 | env_set("mmc_bootdev", "1"); |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 862 | } |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 863 | |
| 864 | setup_environment(gd->fdt_blob); |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 865 | |
Icenowy Zheng | f4116b6 | 2017-09-28 22:16:38 +0800 | [diff] [blame] | 866 | #ifdef CONFIG_USB_ETHER |
Maxime Ripard | f54aba3 | 2017-09-06 22:25:03 +0200 | [diff] [blame] | 867 | usb_ether_init(); |
Icenowy Zheng | f4116b6 | 2017-09-28 22:16:38 +0800 | [diff] [blame] | 868 | #endif |
Maxime Ripard | f54aba3 | 2017-09-06 22:25:03 +0200 | [diff] [blame] | 869 | |
Jonathan Liu | abc1aae | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 870 | return 0; |
| 871 | } |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 872 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 873 | int ft_board_setup(void *blob, struct bd_info *bd) |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 874 | { |
Hans de Goede | 48a234a | 2016-03-22 22:51:52 +0100 | [diff] [blame] | 875 | int __maybe_unused r; |
| 876 | |
Hans de Goede | da0ff7c | 2016-06-26 13:34:42 +0200 | [diff] [blame] | 877 | /* |
| 878 | * Call setup_environment again in case the boot fdt has |
| 879 | * ethernet aliases the u-boot copy does not have. |
| 880 | */ |
| 881 | setup_environment(blob); |
| 882 | |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 883 | #ifdef CONFIG_VIDEO_DT_SIMPLEFB |
Hans de Goede | 48a234a | 2016-03-22 22:51:52 +0100 | [diff] [blame] | 884 | r = sunxi_simplefb_setup(blob); |
| 885 | if (r) |
| 886 | return r; |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 887 | #endif |
Hans de Goede | 48a234a | 2016-03-22 22:51:52 +0100 | [diff] [blame] | 888 | return 0; |
Luc Verhaegen | 4869a8c | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 889 | } |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 890 | |
| 891 | #ifdef CONFIG_SPL_LOAD_FIT |
| 892 | int board_fit_config_name_match(const char *name) |
| 893 | { |
Andre Przywara | 14a2539 | 2018-10-25 17:23:04 +0800 | [diff] [blame] | 894 | struct boot_file_head *spl = get_spl_header(SPL_DT_HEADER_VERSION); |
| 895 | const char *cmp_str = (const char *)spl; |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 896 | |
Andre Przywara | 4f99ea6 | 2017-04-26 01:32:50 +0100 | [diff] [blame] | 897 | /* Check if there is a DT name stored in the SPL header and use that. */ |
Andre Przywara | 14a2539 | 2018-10-25 17:23:04 +0800 | [diff] [blame] | 898 | if (spl != INVALID_SPL_HEADER && spl->dt_name_offset) { |
Andre Przywara | 4f99ea6 | 2017-04-26 01:32:50 +0100 | [diff] [blame] | 899 | cmp_str += spl->dt_name_offset; |
| 900 | } else { |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 901 | #ifdef CONFIG_DEFAULT_DEVICE_TREE |
Andre Przywara | 4f99ea6 | 2017-04-26 01:32:50 +0100 | [diff] [blame] | 902 | cmp_str = CONFIG_DEFAULT_DEVICE_TREE; |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 903 | #else |
Andre Przywara | 4f99ea6 | 2017-04-26 01:32:50 +0100 | [diff] [blame] | 904 | return 0; |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 905 | #endif |
Andre Przywara | 4f99ea6 | 2017-04-26 01:32:50 +0100 | [diff] [blame] | 906 | }; |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 907 | |
Icenowy Zheng | 2a269d3 | 2018-10-25 17:23:02 +0800 | [diff] [blame] | 908 | #ifdef CONFIG_PINE64_DT_SELECTION |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 909 | /* Differentiate the two Pine64 board DTs by their DRAM size. */ |
| 910 | if (strstr(name, "-pine64") && strstr(cmp_str, "-pine64")) { |
| 911 | if ((gd->ram_size > 512 * 1024 * 1024)) |
| 912 | return !strstr(name, "plus"); |
| 913 | else |
| 914 | return !!strstr(name, "plus"); |
| 915 | } else { |
| 916 | return strcmp(name, cmp_str); |
| 917 | } |
Icenowy Zheng | 2a269d3 | 2018-10-25 17:23:02 +0800 | [diff] [blame] | 918 | #endif |
| 919 | return strcmp(name, cmp_str); |
Andre Przywara | 1bd5ca3 | 2017-04-26 01:32:44 +0100 | [diff] [blame] | 920 | } |
| 921 | #endif |