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Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Board configuration file for Variscite DART-6UL Evaluation Kit
4 * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
5 */
6#ifndef __DART_6UL_H
7#define __DART_6UL_H
8
9#include <linux/sizes.h>
Simon Glassfb64e362020-05-10 11:40:09 -060010#include <linux/stringify.h>
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020011#include "mx6_common.h"
12
13/* SPL options */
14#include "imx6_spl.h"
15
16/* NAND pin conflicts with usdhc2 */
17#ifdef CONFIG_CMD_NAND
18#define CONFIG_SYS_FSL_USDHC_NUM 1
19#else
20#define CONFIG_SYS_FSL_USDHC_NUM 2
21#endif
22
23#ifdef CONFIG_CMD_NET
24#define CONFIG_FEC_ENET_DEV 0
25
26#if (CONFIG_FEC_ENET_DEV == 0)
27#define IMX_FEC_BASE ENET_BASE_ADDR
28#define CONFIG_FEC_MXC_PHYADDR 0x1
29#define CONFIG_FEC_XCV_TYPE RMII
30#define CONFIG_ETHPRIME "eth0"
31#elif (CONFIG_FEC_ENET_DEV == 1)
32#define IMX_FEC_BASE ENET2_BASE_ADDR
33#define CONFIG_FEC_MXC_PHYADDR 0x3
34#define CONFIG_FEC_XCV_TYPE RMII
35#define CONFIG_ETHPRIME "eth1"
36#endif
37#endif
38
39/* Size of malloc() pool */
40#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
41
42/* Environment settings */
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020043
44/* Environment in SD */
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020045#define MMC_ROOTFS_DEV 0
46#define MMC_ROOTFS_PART 2
47
48/* Console configs */
49#define CONFIG_MXC_UART_BASE UART1_BASE
50
51/* MMC Configs */
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020052
53#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
54#define CONFIG_SUPPORT_EMMC_BOOT
55
56/* I2C configs */
57#ifdef CONFIG_CMD_I2C
58#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
59#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
60#define CONFIG_SYS_I2C_SPEED 100000
61#endif
62
63/* Miscellaneous configurable options */
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020064
65#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
66#define CONFIG_SYS_HZ 1000
67
68/* Physical Memory Map */
69#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
70#define PHYS_SDRAM_SIZE SZ_512M
71
72#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
73#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
74#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
75
76#define CONFIG_SYS_INIT_SP_OFFSET \
77 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
78#define CONFIG_SYS_INIT_SP_ADDR \
79 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
80
81/* USB Configs */
82#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
83#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
84#define CONFIG_MXC_USB_FLAGS 0
85#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
86
Parthiban Nallathambi5e9147d2019-04-18 00:04:09 +020087#define ENV_MMC \
88 "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \
89 "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \
90 "fitpart=1\0" \
91 "bootdelay=3\0" \
92 "silent=1\0" \
93 "optargs=rw rootwait\0" \
94 "mmcautodetect=yes\0" \
95 "mmcrootfstype=ext4\0" \
96 "mmcfit_name=fitImage\0" \
97 "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \
98 "${mmcfit_name}\0" \
99 "mmcargs=setenv bootargs " \
100 "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \
101 "console=${console} rootfstype=${mmcrootfstype}\0" \
102 "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \
103
104/* Default environment */
105#define CONFIG_EXTRA_ENV_SETTINGS \
106 "fdt_high=0xffffffff\0" \
107 "console=ttymxc0,115200n8\0" \
108 "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \
109 "fit_addr=0x82000000\0" \
110 ENV_MMC
111
112#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit"
113
114#define BOOT_TARGET_DEVICES(func) \
115 func(MMC, mmc, 0) \
116 func(MMC, mmc, 1) \
117 func(DHCP, dhcp, na)
118
119#include <config_distro_bootcmd.h>
120#endif /* __DART_6UL_H */