blob: 062820305dd36cf6aa74c5a4a31ab1a40da27244 [file] [log] [blame]
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamada608ed2c2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010017#define CONFIG_JUPITER 1 /* ... on Jupiter board */
Anatolij Gustschinccab47e2015-08-13 23:57:56 +020018#define CONFIG_DISPLAY_BOARDINFO
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010019
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020020/*
21 * Valid values for CONFIG_SYS_TEXT_BASE are:
22 * 0xFFF00000 boot high (standard configuration)
23 * 0x00100000 boot from RAM (for testing only)
24 */
25#ifndef CONFIG_SYS_TEXT_BASE
26#define CONFIG_SYS_TEXT_BASE 0xFFF00000
27#endif
28
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020029#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010030
31#define CONFIG_BOARD_EARLY_INIT_R 1
32#define CONFIG_BOARD_EARLY_INIT_F 1
33
Becky Bruce03ea1be2008-05-08 19:02:12 -050034#define CONFIG_HIGH_BATS 1 /* High BATs supported */
35
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010036/*
37 * Serial console configuration
38 */
39#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
40#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020041#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010042
43/*
44 * PCI Mapping:
45 * 0x40000000 - 0x4fffffff - PCI Memory
46 * 0x50000000 - 0x50ffffff - PCI IO Space
47 */
Wolfgang Denk2f7f2d92007-03-08 21:49:27 +010048/*#define CONFIG_PCI */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010049
50#if defined(CONFIG_PCI)
51#define CONFIG_PCI_PNP 1
52#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liew521f97b2008-03-30 01:19:06 -050053#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010054
55#define CONFIG_PCI_MEM_BUS 0x40000000
56#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
57#define CONFIG_PCI_MEM_SIZE 0x10000000
58
59#define CONFIG_PCI_IO_BUS 0x50000000
60#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
61#define CONFIG_PCI_IO_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010062#endif
63
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020064#define CONFIG_SYS_XLB_PIPELINING 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010065
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010066#define CONFIG_MII 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020067#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010068
69/* Partitions */
70#define CONFIG_MAC_PARTITION
71#define CONFIG_DOS_PARTITION
72#define CONFIG_ISO_PARTITION
73
74#define CONFIG_TIMESTAMP /* Print image info with timestamp */
75
76/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050077 * BOOTP options
78 */
79#define CONFIG_BOOTP_BOOTFILESIZE
80#define CONFIG_BOOTP_BOOTPATH
81#define CONFIG_BOOTP_GATEWAY
82#define CONFIG_BOOTP_HOSTNAME
83
Jon Loeliger140b69c2007-07-10 09:38:02 -050084/*
Jon Loeligerca8b5662007-07-04 22:32:51 -050085 * Command line configuration.
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010086 */
Jon Loeligerca8b5662007-07-04 22:32:51 -050087
Jon Loeliger140b69c2007-07-10 09:38:02 -050088#if defined(CONFIG_PCI)
89#define CODFIG_CMD_PCI
90#endif
91
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010092/*
93 * Autobooting
94 */
95#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
96
97#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +010098 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010099 "echo"
100
101#undef CONFIG_BOOTARGS
102
103#define CONFIG_EXTRA_ENV_SETTINGS \
104 "netdev=eth0\0" \
105 "nfsargs=setenv bootargs root=/dev/nfs rw " \
106 "nfsroot=${serverip}:${rootpath}\0" \
107 "ramargs=setenv bootargs root=/dev/ram rw\0" \
108 "addip=setenv bootargs ${bootargs} " \
109 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
110 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100111 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100112 "bootm ${kernel_addr}\0" \
113 "flash_self=run ramargs addip;" \
114 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100115 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100116 "${baudrate}\0" \
117 "contyp=ttyS0\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100118 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100119 "bootm\0" \
120 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100121 "bootfile=/tftpboot/jupiter/uImage\0" \
122 ""
123
124#define CONFIG_BOOTCOMMAND "run flash_self"
125
126/*
127 * IPB Bus clocking configuration.
128 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200129#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100130
131#if 0
132/* pass open firmware flat tree */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100133#define OF_CPU "PowerPC,5200@0"
134#define OF_SOC "soc5200@f0000000"
135#define OF_TBCLK (bd->bi_busfreq / 8)
136#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
137#endif
138
139#if 0
140/*
141 * I2C configuration
142 */
143#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100145
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
147#define CONFIG_SYS_I2C_SLAVE 0x7F
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100148
149/*
150 * EEPROM configuration
151 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
153#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
154#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
155#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100156#endif
157
158/*
159 * Flash configuration
160 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200161#define CONFIG_SYS_FLASH_BASE 0xFF000000
162#define CONFIG_SYS_FLASH_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100163
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200164#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100165
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200166#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100167
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
169#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100170
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200171#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100172
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200173#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200174#define CONFIG_SYS_FLASH_CFI
175#define CONFIG_SYS_FLASH_EMPTY_INFO
176#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
177#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
178#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100179
180/*
181 * Environment settings
182 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200183#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200184#define CONFIG_ENV_SIZE 0x20000
185#define CONFIG_ENV_SECT_SIZE 0x20000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100186#define CONFIG_ENV_OVERWRITE 1
187
Heiko Schocher162bbec2007-03-13 09:40:59 +0100188/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200189#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
190#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Heiko Schocher162bbec2007-03-13 09:40:59 +0100191
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100192/*
193 * Memory map
194 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200195#define CONFIG_SYS_MBAR 0xF0000000
196#define CONFIG_SYS_SDRAM_BASE 0x00000000
197#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100198
199/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200200#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200201#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100202
Wolfgang Denk0191e472010-10-26 14:34:52 +0200203#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200204#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100205
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200206#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200207#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
208# define CONFIG_SYS_RAMBOOT 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100209#endif
210
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200211#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
212#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
213#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100214
215/*
216 * Ethernet configuration
217 */
218#define CONFIG_MPC5xxx_FEC 1
Ben Warrenbc1b9172009-02-05 23:58:25 -0800219#define CONFIG_MPC5xxx_FEC_MII100
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100220/*
Ben Warrenbc1b9172009-02-05 23:58:25 -0800221 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100222 */
Ben Warrenbc1b9172009-02-05 23:58:25 -0800223/* #define CONFIG_MPC5xxx_FEC_MII10 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100224#define CONFIG_PHY_ADDR 0x00
225
226/*
227 * GPIO configuration
228 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200229#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100230
231/*
232 * Miscellaneous configurable options
233 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200234#define CONFIG_SYS_LONGHELP /* undef to save memory */
Heiko Schocher162bbec2007-03-13 09:40:59 +0100235
236#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500237#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200238#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100239#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200240#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100241#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200242#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
243#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
244#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100245
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200246#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
247#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
248#define CONFIG_SYS_ALT_MEMTEST 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100249
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200250#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100251
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200252#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500253#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200254# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500255#endif
256
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100257/*
258 * Various low-level settings
259 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200260#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
261#define CONFIG_SYS_HID0_FINAL HID0_ICE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100262
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200263#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
264#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
265#define CONFIG_SYS_BOOTCS_CFG 0x00047801
266#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
267#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100268
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200269#define CONFIG_SYS_CS_BURST 0x00000000
270#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100271
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200272#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100273
274#endif /* __CONFIG_H */