blob: 139f416d1f090d4eb9bdb8e47307d423e34d8325 [file] [log] [blame]
Peng Fan203a2272019-03-05 02:32:49 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 NXP
4 */
5
6#include <common.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06007#include <env.h>
Peng Fan203a2272019-03-05 02:32:49 +00008#include <errno.h>
Simon Glassa7b51302019-11-14 12:57:46 -07009#include <init.h>
Peng Fan203a2272019-03-05 02:32:49 +000010#include <linux/libfdt.h>
Alifer Moraesca43acf2020-01-16 12:43:07 -030011#include <fdt_support.h>
Peng Fan203a2272019-03-05 02:32:49 +000012#include <asm/io.h>
13#include <asm/gpio.h>
14#include <asm/arch/clock.h>
15#include <asm/arch/sci/sci.h>
16#include <asm/arch/imx8-pins.h>
17#include <asm/arch/iomux.h>
18#include <asm/arch/sys_proto.h>
19
20DECLARE_GLOBAL_DATA_PTR;
21
22#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
23 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
24 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
25 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
26
27static iomux_cfg_t uart0_pads[] = {
28 SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
29 SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
30};
31
32static void setup_iomux_uart(void)
33{
34 imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
35}
36
37int board_early_init_f(void)
38{
Anatolij Gustschinef156d22019-06-12 13:35:25 +020039 sc_pm_clock_rate_t rate = SC_80MHZ;
Peng Fan203a2272019-03-05 02:32:49 +000040 int ret;
Peng Fan203a2272019-03-05 02:32:49 +000041
Anatolij Gustschinef156d22019-06-12 13:35:25 +020042 /* Set UART0 clock root to 80 MHz */
43 ret = sc_pm_setup_uart(SC_R_UART_0, rate);
Peng Fan203a2272019-03-05 02:32:49 +000044 if (ret)
45 return ret;
46
47 setup_iomux_uart();
48
49 sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
50
51 return 0;
52}
53
Simon Glassfa4689a2019-12-06 21:41:35 -070054#if CONFIG_IS_ENABLED(DM_GPIO)
Peng Fan203a2272019-03-05 02:32:49 +000055static void board_gpio_init(void)
56{
57 /* TODO */
58}
59#else
60static inline void board_gpio_init(void) {}
61#endif
62
63#if IS_ENABLED(CONFIG_FEC_MXC)
64#include <miiphy.h>
65
66int board_phy_config(struct phy_device *phydev)
67{
68 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
69 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
70
71 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
72 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
73 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
74 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
75
76 if (phydev->drv->config)
77 phydev->drv->config(phydev);
78
79 return 0;
80}
81#endif
82
Peng Fan203a2272019-03-05 02:32:49 +000083int checkboard(void)
84{
85 puts("Board: iMX8QM MEK\n");
86
87 build_info();
88 print_bootinfo();
89
90 return 0;
91}
92
93int board_init(void)
94{
95 /* Power up base board */
96 sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
97
98 board_gpio_init();
99
100 return 0;
101}
102
103void detail_board_ddr_info(void)
104{
105 puts("\nDDR ");
106}
107
108/*
109 * Board specific reset that is system reset.
110 */
111void reset_cpu(ulong addr)
112{
113 /* TODO */
114}
115
116#ifdef CONFIG_OF_BOARD_SETUP
117int ft_board_setup(void *blob, bd_t *bd)
118{
119 return 0;
120}
121#endif
122
123int board_mmc_get_env_dev(int devno)
124{
125 return devno;
126}
127
128int board_late_init(void)
129{
130#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
131 env_set("board_name", "MEK");
132 env_set("board_rev", "iMX8QM");
133#endif
134
135 return 0;
136}