blob: 68be0fe0cf7e37d34d885489918771feb24b06b6 [file] [log] [blame]
Peng Fan203a2272019-03-05 02:32:49 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 NXP
4 */
5
6#include <common.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06007#include <env.h>
Peng Fan203a2272019-03-05 02:32:49 +00008#include <errno.h>
Simon Glassa7b51302019-11-14 12:57:46 -07009#include <init.h>
Peng Fan203a2272019-03-05 02:32:49 +000010#include <linux/libfdt.h>
Peng Fan203a2272019-03-05 02:32:49 +000011#include <asm/io.h>
12#include <asm/gpio.h>
13#include <asm/arch/clock.h>
14#include <asm/arch/sci/sci.h>
15#include <asm/arch/imx8-pins.h>
16#include <asm/arch/iomux.h>
17#include <asm/arch/sys_proto.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21#define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \
22 (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
23 (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
24 (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
25
26static iomux_cfg_t uart0_pads[] = {
27 SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
28 SC_P_UART0_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
29};
30
31static void setup_iomux_uart(void)
32{
33 imx8_iomux_setup_multiple_pads(uart0_pads, ARRAY_SIZE(uart0_pads));
34}
35
36int board_early_init_f(void)
37{
Anatolij Gustschinef156d22019-06-12 13:35:25 +020038 sc_pm_clock_rate_t rate = SC_80MHZ;
Peng Fan203a2272019-03-05 02:32:49 +000039 int ret;
Peng Fan203a2272019-03-05 02:32:49 +000040
Anatolij Gustschinef156d22019-06-12 13:35:25 +020041 /* Set UART0 clock root to 80 MHz */
42 ret = sc_pm_setup_uart(SC_R_UART_0, rate);
Peng Fan203a2272019-03-05 02:32:49 +000043 if (ret)
44 return ret;
45
46 setup_iomux_uart();
47
48 sc_pm_set_resource_power_mode(-1, SC_R_GPIO_5, SC_PM_PW_MODE_ON);
49
50 return 0;
51}
52
53#if IS_ENABLED(CONFIG_DM_GPIO)
54static void board_gpio_init(void)
55{
56 /* TODO */
57}
58#else
59static inline void board_gpio_init(void) {}
60#endif
61
62#if IS_ENABLED(CONFIG_FEC_MXC)
63#include <miiphy.h>
64
65int board_phy_config(struct phy_device *phydev)
66{
67 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
68 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
69
70 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
71 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
72 phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
73 phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
74
75 if (phydev->drv->config)
76 phydev->drv->config(phydev);
77
78 return 0;
79}
80#endif
81
Peng Fan203a2272019-03-05 02:32:49 +000082int checkboard(void)
83{
84 puts("Board: iMX8QM MEK\n");
85
86 build_info();
87 print_bootinfo();
88
89 return 0;
90}
91
92int board_init(void)
93{
94 /* Power up base board */
95 sc_pm_set_resource_power_mode(-1, SC_R_BOARD_R1, SC_PM_PW_MODE_ON);
96
97 board_gpio_init();
98
99 return 0;
100}
101
102void detail_board_ddr_info(void)
103{
104 puts("\nDDR ");
105}
106
107/*
108 * Board specific reset that is system reset.
109 */
110void reset_cpu(ulong addr)
111{
112 /* TODO */
113}
114
115#ifdef CONFIG_OF_BOARD_SETUP
116int ft_board_setup(void *blob, bd_t *bd)
117{
118 return 0;
119}
120#endif
121
122int board_mmc_get_env_dev(int devno)
123{
124 return devno;
125}
126
127int board_late_init(void)
128{
129#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
130 env_set("board_name", "MEK");
131 env_set("board_rev", "iMX8QM");
132#endif
133
134 return 0;
135}