blob: 61310089b7b0bf2af2eb4e5117435939f329d7a1 [file] [log] [blame]
Sascha Hauerce6fc522008-03-26 20:41:09 +01001/*
2 * (C) Copyright 2004
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Kshitij Gupta <kshitij@ti.com>
6 *
Magnus Lilja69e84582008-04-15 19:09:10 +02007 * Configuration settings for the LogicPD i.MX31 Litekit board.
Sascha Hauerce6fc522008-03-26 20:41:09 +01008 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
Magnus Liljad1948c62008-04-20 10:36:36 +020031#include <asm/arch/mx31-regs.h>
32
Sascha Hauerce6fc522008-03-26 20:41:09 +010033 /* High Level Configuration Options */
34#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
35#define CONFIG_MX31 1 /* in a mx31 */
36#define CONFIG_MX31_HCLK_FREQ 26000000
37#define CONFIG_MX31_CLK32 32000
38
39#define CONFIG_DISPLAY_CPUINFO
40#define CONFIG_DISPLAY_BOARDINFO
41
42/* Temporarily disabled */
43#if 0
44#define CONFIG_OF_LIBFDT 1
45#define CONFIG_FIT 1
46#define CONFIG_FIT_VERBOSE 1
47#endif
48
49#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50#define CONFIG_SETUP_MEMORY_TAGS 1
51#define CONFIG_INITRD_TAG 1
52
53/*
54 * Size of malloc() pool
55 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020056#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
57#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
Sascha Hauerce6fc522008-03-26 20:41:09 +010058
59/*
60 * Hardware drivers
61 */
62
Ilya Yanok7bfca972009-06-08 04:12:46 +040063#define CONFIG_MXC_UART 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020064#define CONFIG_SYS_MX31_UART1 1
Sascha Hauerce6fc522008-03-26 20:41:09 +010065
Magnus Lilja180381d2008-04-20 10:38:12 +020066#define CONFIG_HARD_SPI 1
67#define CONFIG_MXC_SPI 1
Haavard Skinnemoend74084a2008-05-16 11:10:31 +020068#define CONFIG_DEFAULT_SPI_BUS 1
69#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH)
Magnus Lilja180381d2008-04-20 10:38:12 +020070
71#define CONFIG_RTC_MC13783 1
Magnus Lilja4ce00112008-08-29 10:36:18 +020072/* MC13783 connected to CSPI2 and SS0 */
73#define CONFIG_MC13783_SPI_BUS 1
74#define CONFIG_MC13783_SPI_CS 0
Magnus Lilja180381d2008-04-20 10:38:12 +020075
Sascha Hauerce6fc522008-03-26 20:41:09 +010076/* allow to overwrite serial and ethaddr */
77#define CONFIG_ENV_OVERWRITE
78#define CONFIG_CONS_INDEX 1
79#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020080#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
Sascha Hauerce6fc522008-03-26 20:41:09 +010081
82/***********************************************************
83 * Command definition
84 ***********************************************************/
85
86#include <config_cmd_default.h>
87
88#define CONFIG_CMD_MII
89#define CONFIG_CMD_PING
Magnus Lilja180381d2008-04-20 10:38:12 +020090#define CONFIG_CMD_SPI
91#define CONFIG_CMD_DATE
Sascha Hauerce6fc522008-03-26 20:41:09 +010092
93#define CONFIG_BOOTDELAY 3
94
95#define CONFIG_NETMASK 255.255.255.0
96#define CONFIG_IPADDR 192.168.23.168
97#define CONFIG_SERVERIP 192.168.23.2
98
99#define CONFIG_EXTRA_ENV_SETTINGS \
100 "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
101 "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
102 "bootcmd=run bootcmd_net\0" \
103 "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \
104 "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
105
106
Ben Warrenfbfdd3a2009-07-20 22:01:11 -0700107#define CONFIG_NET_MULTI
108#define CONFIG_SMC911X 1
109#define CONFIG_SMC911X_BASE (CS4_BASE + 0x00020000)
110#define CONFIG_SMC911X_32_BIT 1
Sascha Hauerce6fc522008-03-26 20:41:09 +0100111
112/*
113 * Miscellaneous configurable options
114 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200115#define CONFIG_SYS_LONGHELP /* undef to save memory */
116#define CONFIG_SYS_PROMPT "uboot> "
117#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100118/* Print Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200119#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
120#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
121#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100122
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
124#define CONFIG_SYS_MEMTEST_END 0x10000
Sascha Hauerce6fc522008-03-26 20:41:09 +0100125
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200126#define CONFIG_SYS_LOAD_ADDR 0 /* default load address */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100127
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200128#define CONFIG_SYS_HZ 1000
Sascha Hauerce6fc522008-03-26 20:41:09 +0100129
130#define CONFIG_CMDLINE_EDITING 1
131
132/*-----------------------------------------------------------------------
133 * Stack sizes
134 *
135 * The stack sizes are set up in start.S using the settings below
136 */
137#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
138
139/*-----------------------------------------------------------------------
140 * Physical Memory Map
141 */
142#define CONFIG_NR_DRAM_BANKS 1
Magnus Liljad1948c62008-04-20 10:36:36 +0200143#define PHYS_SDRAM_1 CSD0_BASE
Sascha Hauerce6fc522008-03-26 20:41:09 +0100144#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
145
146/*-----------------------------------------------------------------------
147 * FLASH and environment organization
148 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200149#define CONFIG_SYS_FLASH_BASE CS0_BASE
150#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
151#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
152#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100153
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200154#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x001f0000)
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200155#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200156#define CONFIG_ENV_SECT_SIZE (64 * 1024)
157#define CONFIG_ENV_SIZE (64 * 1024)
Sascha Hauerce6fc522008-03-26 20:41:09 +0100158
159/*-----------------------------------------------------------------------
160 * CFI FLASH driver setup
161 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200162#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200163#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200164#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
165#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100166
167/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200168#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
169#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
Sascha Hauerce6fc522008-03-26 20:41:09 +0100170
171/*
172 * JFFS2 partitions
173 */
Stefan Roeseb1423dd2009-03-19 13:30:36 +0100174#undef CONFIG_CMD_MTDPARTS
Sascha Hauerce6fc522008-03-26 20:41:09 +0100175#define CONFIG_JFFS2_DEV "nor0"
176
177#endif /* __CONFIG_H */