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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Siarhei Siamashka15aca902015-02-21 07:34:09 +020018#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
19/*
20 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
21 * expense of restricting some features, so the regular machine id values can
22 * be used.
23 */
24# define CONFIG_MACH_TYPE_COMPAT_REV 0
25#else
26/*
27 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
28 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
29 * beyond the machine id check.
30 */
31# define CONFIG_MACH_TYPE_COMPAT_REV 1
32#endif
33
Andre Przywarad8362162017-04-26 01:32:48 +010034#ifdef CONFIG_ARM64
Jagan Tekia4e696b2017-11-10 22:21:09 +053035#define CONFIG_SYS_BOOTM_LEN (32 << 20)
Andre Przywarad8362162017-04-26 01:32:48 +010036#endif
37
Ian Campbell6efe3692014-05-05 11:52:26 +010038/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010039#define CONFIG_SYS_NS16550_SERIAL
40/* ns16550 reg in the low bits of cpu reg */
Ian Campbell6efe3692014-05-05 11:52:26 +010041#define CONFIG_SYS_NS16550_CLK 24000000
Thomas Chou00ad1f02015-11-19 21:48:13 +080042#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060043# define CONFIG_SYS_NS16550_REG_SIZE -4
44# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
45# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
46# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
47# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
48# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
49#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010050
Paul Kocialkowskide05f942015-05-16 19:52:11 +020051/* CPU */
Andre Przywara70c78932017-02-16 01:20:19 +000052#define COUNTER_FREQUENCY 24000000
Paul Kocialkowskide05f942015-05-16 19:52:11 +020053
Hans de Goeded241ecf2015-05-19 22:12:31 +020054/*
55 * The DRAM Base differs between some models. We cannot use macros for the
56 * CONFIG_FOO defines which contain the DRAM base address since they end
57 * up unexpanded in include/autoconf.mk .
58 *
59 * So we have to have this #ifdef #else #endif block for these.
60 */
61#ifdef CONFIG_MACH_SUN9I
62#define SDRAM_OFFSET(x) 0x2##x
63#define CONFIG_SYS_SDRAM_BASE 0x20000000
64#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
Jernej Skrabec7654ef82021-03-23 21:27:31 +010065/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
Hans de Goede66ab79d2015-09-13 13:02:48 +020066 * since it needs to fit in with the other values. By also #defining it
67 * we get warnings if the Kconfig value mismatches. */
68#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
Hans de Goeded241ecf2015-05-19 22:12:31 +020069#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
70#else
71#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010072#define CONFIG_SYS_SDRAM_BASE 0x40000000
Hans de Goeded241ecf2015-05-19 22:12:31 +020073#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
Icenowy Zheng52e61882017-04-08 15:30:12 +080074/* V3s do not have enough memory to place code at 0x4a000000 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +010075/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
Hans de Goede66ab79d2015-09-13 13:02:48 +020076 * since it needs to fit in with the other values. By also #defining it
77 * we get warnings if the Kconfig value mismatches. */
78#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
Hans de Goeded241ecf2015-05-19 22:12:31 +020079#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
80#endif
81
82#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
Hans de Goeded241ecf2015-05-19 22:12:31 +020083
Hans de Goede0b95a282015-05-20 15:27:16 +020084/*
85 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
86 * slightly bigger. Note that it is possible to map the first 32 KiB of the
87 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
88 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
89 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080090 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
91 * is known yet.
92 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020093 */
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080094#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
95/* FIXME: this may be larger on some SoCs */
96#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010097
98#define CONFIG_SYS_INIT_SP_OFFSET \
99 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
100#define CONFIG_SYS_INIT_SP_ADDR \
101 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
102
Ian Campbell6efe3692014-05-05 11:52:26 +0100103#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
104#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
105
Ian Campbella2ebf922014-07-18 20:38:41 +0100106#ifdef CONFIG_AHCI
Bernhard Nortmannb4946db2015-06-10 10:51:40 +0200107#define CONFIG_SYS_64BIT_LBA
Ian Campbella2ebf922014-07-18 20:38:41 +0100108#endif
109
Ian Campbell6efe3692014-05-05 11:52:26 +0100110#define CONFIG_SETUP_MEMORY_TAGS
111#define CONFIG_CMDLINE_TAG
112#define CONFIG_INITRD_TAG
Paul Kocialkowski99ae0f62015-03-28 18:35:36 +0100113#define CONFIG_SERIAL_TAG
Ian Campbell6efe3692014-05-05 11:52:26 +0100114
Hans de Goede3ce35f92015-08-16 14:48:22 +0200115#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +0200116#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon57f20382016-06-15 21:09:23 +0200117#define CONFIG_SYS_NAND_ONFI_DETECTION
118#define CONFIG_SYS_MAX_NAND_DEVICE 8
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +0200119#endif
120
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100121/* mmc config */
Maxime Riparde0c7aa42015-10-15 22:04:07 +0200122#ifdef CONFIG_MMC
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100123#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +0100124#endif
125
126#if defined(CONFIG_ENV_IS_IN_MMC)
Maxime Ripard814d82b2018-01-16 09:44:24 +0100127
128#ifdef CONFIG_ARM64
129/*
130 * This is actually (CONFIG_ENV_OFFSET -
131 * (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)), but the value will be used
132 * directly in a makefile, without the preprocessor expansion.
133 */
134#define CONFIG_BOARD_SIZE_LIMIT 0x7e000
135#endif
136
Emmanuel Vadot63b45782016-11-05 20:51:11 +0100137#define CONFIG_SYS_MMC_MAX_DEVICE 4
Chen-Yu Tsaid4ea92b2014-10-22 16:47:42 +0800138#endif
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100139
Icenowy Zheng52e61882017-04-08 15:30:12 +0800140#ifndef CONFIG_MACH_SUN8I_V3S
Hans de Goede9f7dc802015-09-13 17:16:54 +0200141/* 64MB of malloc() pool */
142#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
Icenowy Zheng52e61882017-04-08 15:30:12 +0800143#else
144/* 2MB of malloc() pool */
145#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
146#endif
Ian Campbell6efe3692014-05-05 11:52:26 +0100147
148/*
149 * Miscellaneous configurable options
150 */
Ian Campbell428734e2014-10-07 14:20:30 +0100151#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
152#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbell6efe3692014-05-05 11:52:26 +0100153
Ian Campbell6efe3692014-05-05 11:52:26 +0100154/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +0200155#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +0100156
Ian Campbell6efe3692014-05-05 11:52:26 +0100157/* FLASH and environment organization */
158
Boris Brezillon8646f2a2015-07-27 16:21:26 +0200159#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +0100160
Simon Glass5debe1f2015-02-07 10:47:30 -0700161#define CONFIG_SPL_BOARD_LOAD_IMAGE
162
Icenowy Zheng5e6dd272018-07-21 16:20:20 +0800163/*
164 * We cannot use expressions here, because expressions won't be evaluated in
165 * autoconf.mk.
166 */
167#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100168#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
Andre Przywaracced7482017-04-26 01:32:42 +0100169#ifdef CONFIG_ARM64
170/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
171#define LOW_LEVEL_SRAM_STACK 0x00054000
172#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000173#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100174#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +0800175#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +0100176#ifdef CONFIG_MACH_SUN50I_H616
177#define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */
178#define LOW_LEVEL_SRAM_STACK 0x58000
179#else
Icenowy Zheng73210762018-07-21 16:20:24 +0800180#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
181/* end of SRAM A2 on H6 for now */
182#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +0100183#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200184#else
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100185#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
Andre Przywarade454ec2017-02-16 01:20:23 +0000186#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200187#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100188
Andre Przywarade454ec2017-02-16 01:20:23 +0000189#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
190
Jernej Skrabece638e052021-01-11 21:11:46 +0100191#ifndef CONFIG_MACH_SUN50I_H616
Ian Campbell140d8322014-05-05 11:52:30 +0100192#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
Jernej Skrabece638e052021-01-11 21:11:46 +0100193#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100194
Ian Campbell6efe3692014-05-05 11:52:26 +0100195
Hans de Goede3352b222014-06-13 22:55:49 +0200196/* I2C */
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +0200197#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
198 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
Jelle van der Waa8d3d7c12016-01-14 14:06:26 +0100199 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
Hans de Goede3352b222014-06-13 22:55:49 +0200200#define CONFIG_SYS_I2C_MVTWSI
Igor Opaniukf7c91762021-02-09 13:52:45 +0200201#if !CONFIG_IS_ENABLED(DM_I2C)
Simon Glass0529b592021-07-10 21:14:32 -0600202#define CONFIG_SYS_I2C_LEGACY
Hans de Goede3352b222014-06-13 22:55:49 +0200203#define CONFIG_SYS_I2C_SPEED 400000
204#define CONFIG_SYS_I2C_SLAVE 0x7f
Hans de Goede6ef998d2015-04-23 17:47:22 +0200205#endif
Jernej Skrabec9220d502017-04-27 00:03:36 +0200206#endif
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100207
208#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
209#define CONFIG_SYS_I2C_SOFT
210#define CONFIG_SYS_I2C_SOFT_SPEED 50000
211#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100212/* We use pin names in Kconfig and sunxi_name_to_gpio() */
213#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
214#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
215#ifndef __ASSEMBLY__
216extern int soft_i2c_gpio_sda;
217extern int soft_i2c_gpio_scl;
218#endif
Hans de Goede6de9f762015-03-07 12:00:02 +0100219#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
220#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
221#else
222#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
223#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100224#endif
225
Hans de Goede73d7d422014-06-09 11:37:00 +0200226/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200227
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200228#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede804fa572015-05-10 14:10:27 +0200229#define CONFIG_USB_OHCI_NEW
Hans de Goede804fa572015-05-10 14:10:27 +0200230#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goedef494cad2015-01-11 17:17:00 +0100231#endif
232
Ian Campbell6efe3692014-05-05 11:52:26 +0100233#ifndef CONFIG_SPL_BUILD
Hans de Goede6f2da072014-07-31 23:04:45 +0200234
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100235#ifdef CONFIG_ARM64
236/*
237 * Boards seem to come with at least 512MB of DRAM.
238 * The kernel should go at 512K, which is the default text offset (that will
239 * be adjusted at runtime if needed).
240 * There is no compression for arm64 kernels (yet), so leave some space
241 * for really big kernels, say 256MB for now.
242 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100243 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100244#define BOOTM_SIZE __stringify(0xa000000)
245#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100246#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
247#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100248#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
249#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
250#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
251#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
252#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100253
254#else
Hans de Goede3400a7c2014-12-24 16:08:30 +0100255/*
Hans de Goede9f7dc802015-09-13 17:16:54 +0200256 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100257 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100258 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100259 */
Icenowy Zheng52e61882017-04-08 15:30:12 +0800260#ifndef CONFIG_MACH_SUN8I_V3S
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100261#define BOOTM_SIZE __stringify(0xa000000)
262#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
263#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
264#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
265#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
266#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
267#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
Icenowy Zheng52e61882017-04-08 15:30:12 +0800268#else
269/*
270 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
271 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100272 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Icenowy Zheng52e61882017-04-08 15:30:12 +0800273 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100274#define BOOTM_SIZE __stringify(0x2e00000)
275#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
276#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
277#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
278#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
279#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
280#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
Icenowy Zheng52e61882017-04-08 15:30:12 +0800281#endif
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100282#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200283
Hans de Goede2f60c312014-08-01 09:37:58 +0200284#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800285 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200286 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
287 "fdt_addr_r=" FDT_ADDR_R "\0" \
288 "scriptaddr=" SCRIPT_ADDR_R "\0" \
289 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100290 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200291 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
292
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100293#ifdef CONFIG_ARM64
294
295#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
296 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
297 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
298
299#else
300
301#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
302
303#endif
304
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200305#define DFU_ALT_INFO_RAM \
306 "dfu_alt_info_ram=" \
307 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
308 "fdt ram " FDT_ADDR_R " 0x100000;" \
309 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200310
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800311#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100312#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200313#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
314 BOOTENV_DEV_MMC(MMC, mmc, 0) \
315 BOOTENV_DEV_MMC(MMC, mmc, 1) \
316 "bootcmd_mmc_auto=" \
317 "if test ${mmc_bootdev} -eq 1; then " \
318 "run bootcmd_mmc1; " \
319 "run bootcmd_mmc0; " \
320 "elif test ${mmc_bootdev} -eq 0; then " \
321 "run bootcmd_mmc0; " \
322 "run bootcmd_mmc1; " \
323 "fi\0"
324
325#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
326 "mmc_auto "
327
328#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100329#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200330#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100331#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800332#else
333#define BOOT_TARGET_DEVICES_MMC(func)
334#endif
335
Hans de Goede6f2da072014-07-31 23:04:45 +0200336#ifdef CONFIG_AHCI
337#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
338#else
339#define BOOT_TARGET_DEVICES_SCSI(func)
340#endif
341
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200342#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800343#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
344#else
345#define BOOT_TARGET_DEVICES_USB(func)
346#endif
347
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100348#ifdef CONFIG_CMD_PXE
349#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
350#else
351#define BOOT_TARGET_DEVICES_PXE(func)
352#endif
353
354#ifdef CONFIG_CMD_DHCP
355#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
356#else
357#define BOOT_TARGET_DEVICES_DHCP(func)
358#endif
359
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200360/* FEL boot support, auto-execute boot.scr if a script address was provided */
361#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
362 "bootcmd_fel=" \
363 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
364 "echo '(FEL boot)'; " \
365 "source ${fel_scriptaddr}; " \
366 "fi\0"
367#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
368 "fel "
369
Hans de Goede6f2da072014-07-31 23:04:45 +0200370#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200371 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800372 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200373 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800374 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100375 BOOT_TARGET_DEVICES_PXE(func) \
376 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200377
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100378#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
379#define BOOTCMD_SUNXI_COMPAT \
380 "bootcmd_sunxi_compat=" \
381 "setenv root /dev/mmcblk0p3 rootwait; " \
382 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
383 "echo Loaded environment from uEnv.txt; " \
384 "env import -t 0x44000000 ${filesize}; " \
385 "fi; " \
386 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
387 "ext2load mmc 0 0x43000000 script.bin && " \
388 "ext2load mmc 0 0x48000000 uImage && " \
389 "bootm 0x48000000\0"
390#else
391#define BOOTCMD_SUNXI_COMPAT
392#endif
393
Hans de Goede6f2da072014-07-31 23:04:45 +0200394#include <config_distro_bootcmd.h>
395
Hans de Goede16030822014-09-18 21:03:34 +0200396#ifdef CONFIG_USB_KEYBOARD
397#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200398 "stdin=serial,usbkbd\0"
399#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200400#define CONSOLE_STDIN_SETTINGS \
401 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200402#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200403
Jagan Teki5bc34cb2021-02-22 00:12:34 +0000404#ifdef CONFIG_DM_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200405#define CONSOLE_STDOUT_SETTINGS \
406 "stdout=serial,vidconsole\0" \
407 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200408#else
409#define CONSOLE_STDOUT_SETTINGS \
410 "stdout=serial\0" \
411 "stderr=serial\0"
412#endif
413
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100414#ifdef CONFIG_MTDIDS_DEFAULT
415#define SUNXI_MTDIDS_DEFAULT \
416 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
417#else
418#define SUNXI_MTDIDS_DEFAULT
419#endif
420
421#ifdef CONFIG_MTDPARTS_DEFAULT
422#define SUNXI_MTDPARTS_DEFAULT \
423 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
424#else
425#define SUNXI_MTDPARTS_DEFAULT
426#endif
427
Maxime Ripard32c544d2017-11-14 21:24:00 +0100428#define PARTS_DEFAULT \
429 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
430 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
431 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
432 "name=system,size=-,uuid=${uuid_gpt_system};"
433
434#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
435
436#ifdef CONFIG_ARM64
437#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
438#else
439#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
440#endif
441
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200442#define CONSOLE_ENV_SETTINGS \
443 CONSOLE_STDIN_SETTINGS \
444 CONSOLE_STDOUT_SETTINGS
445
Andreas Färber26f00d22017-04-14 18:44:47 +0200446#ifdef CONFIG_ARM64
447#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
448#else
449#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
450#endif
451
Hans de Goede6f2da072014-07-31 23:04:45 +0200452#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200453 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200454 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100455 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200456 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200457 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200458 "console=ttyS0,115200\0" \
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100459 SUNXI_MTDIDS_DEFAULT \
460 SUNXI_MTDPARTS_DEFAULT \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100461 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
462 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
463 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100464 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200465 BOOTENV
466
467#else /* ifndef CONFIG_SPL_BUILD */
468#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbell6efe3692014-05-05 11:52:26 +0100469#endif
470
471#endif /* _SUNXI_COMMON_CONFIG_H */