blob: 9b8db223bb24f322c2c4019870ad69d68be75220 [file] [log] [blame]
Marcel Ziswiler36a439d2022-02-07 11:54:13 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2022 Toradex
4 */
5
6#ifndef __VERDIN_IMX8MP_H
7#define __VERDIN_IMX8MP_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010012#define CONFIG_SYS_MONITOR_LEN SZ_512K
13#define CONFIG_SYS_UBOOT_BASE \
14 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
15
16#ifdef CONFIG_SPL_BUILD
17/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010018
19/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
20#define CONFIG_MALLOC_F_ADDR 0x184000
21/* For RAW image gives a error info not panic */
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010022
23#define CONFIG_POWER_PCA9450
24
25#define CONFIG_SYS_I2C
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010026#endif /* CONFIG_SPL_BUILD */
27
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010028/* ENET Config */
29/* ENET1 */
30#if defined(CONFIG_CMD_NET)
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010031#define CONFIG_FEC_MXC_PHYADDR 7
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010032
33#define PHY_ANEG_TIMEOUT 20000
34#endif /* CONFIG_CMD_NET */
35
36#define MEM_LAYOUT_ENV_SETTINGS \
Marcel Ziswiler82022f92022-08-22 15:06:00 +020037 "fdt_addr_r=0x50200000\0" \
38 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
39 "kernel_comp_addr_r=0x40200000\0" \
40 "kernel_comp_size=0x08080000\0" \
41 "ramdisk_addr_r=0x50300000\0" \
42 "scriptaddr=0x50280000\0"
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010043
44/* Enable Distro Boot */
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010045#define BOOT_TARGET_DEVICES(func) \
46 func(MMC, mmc, 1) \
47 func(MMC, mmc, 2) \
48 func(DHCP, dhcp, na)
49#include <config_distro_bootcmd.h>
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010050
51#if defined(CONFIG_TDX_EASY_INSTALLER)
52# define BOOT_SCRIPT "boot-tezi.scr"
53#else
54# define BOOT_SCRIPT "boot.scr"
55#endif
56
57/* Initial environment variables */
58#define CONFIG_EXTRA_ENV_SETTINGS \
59 BOOTENV \
60 MEM_LAYOUT_ENV_SETTINGS \
61 "bootcmd_mfg=fastboot 0\0" \
62 "boot_file=Image\0" \
63 "boot_scripts=" BOOT_SCRIPT "\0" \
64 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
65 "console=ttymxc2\0" \
66 "fdt_board=dev\0" \
67 "initrd_addr=0x43800000\0" \
68 "initrd_high=0xffffffffffffffff\0" \
Philippe Schenker827da102022-05-25 09:55:02 +020069 "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010070 "consoleblank=0 earlycon\0" \
71 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
72 "if test \"$confirm\" = \"y\"; then " \
73 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
74 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
75 "${blkcnt}; fi\0"
76
77#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
78#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010079
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010080/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
81#define CONFIG_SYS_SDRAM_BASE 0x40000000
82#define PHYS_SDRAM 0x40000000
83#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
84#define PHYS_SDRAM_2 0x100000000
85#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
86
Marcel Ziswiler36a439d2022-02-07 11:54:13 +010087#endif /* __VERDIN_IMX8MP_H */