Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2014-2015 Freescale Semiconductor, Inc. |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame] | 7 | #include <clock_legacy.h> |
Simon Glass | 1d91ba7 | 2019-11-14 12:57:37 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
Michael Walle | 24bd03a | 2021-03-26 19:40:55 +0100 | [diff] [blame] | 9 | #include <debug_uart.h> |
Simon Glass | 79fd214 | 2019-08-01 09:46:43 -0600 | [diff] [blame] | 10 | #include <env.h> |
Michael Walle | 97aaa98 | 2021-03-26 19:40:56 +0100 | [diff] [blame] | 11 | #include <hang.h> |
Simon Glass | 2dc9c34 | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 12 | #include <image.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 13 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 14 | #include <log.h> |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 15 | #include <spl.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 16 | #include <asm/cache.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 17 | #include <asm/global_data.h> |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 18 | #include <asm/io.h> |
| 19 | #include <fsl_ifc.h> |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 20 | #include <i2c.h> |
York Sun | f2aaf84 | 2017-05-15 08:52:00 -0700 | [diff] [blame] | 21 | #include <fsl_csu.h> |
| 22 | #include <asm/arch/fdt.h> |
| 23 | #include <asm/arch/ppa.h> |
York Sun | bb7d342 | 2018-06-26 14:48:28 -0700 | [diff] [blame] | 24 | #include <asm/arch/soc.h> |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 25 | |
| 26 | DECLARE_GLOBAL_DATA_PTR; |
| 27 | |
| 28 | u32 spl_boot_device(void) |
| 29 | { |
| 30 | #ifdef CONFIG_SPL_MMC_SUPPORT |
| 31 | return BOOT_DEVICE_MMC1; |
| 32 | #endif |
| 33 | #ifdef CONFIG_SPL_NAND_SUPPORT |
| 34 | return BOOT_DEVICE_NAND; |
| 35 | #endif |
York Sun | 3e512d8 | 2018-06-26 14:48:29 -0700 | [diff] [blame] | 36 | #ifdef CONFIG_QSPI_BOOT |
| 37 | return BOOT_DEVICE_NOR; |
| 38 | #endif |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 39 | return 0; |
| 40 | } |
| 41 | |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 42 | #ifdef CONFIG_SPL_BUILD |
Ruchika Gupta | d6b8920 | 2017-04-17 18:07:17 +0530 | [diff] [blame] | 43 | |
Simon Glass | b79ff7c | 2020-12-22 19:30:21 -0700 | [diff] [blame] | 44 | /* Define board data structure */ |
| 45 | static struct bd_info bdata __attribute__ ((section(".data"))); |
| 46 | |
Ruchika Gupta | d6b8920 | 2017-04-17 18:07:17 +0530 | [diff] [blame] | 47 | void spl_board_init(void) |
| 48 | { |
Udit Agarwal | 22ec238 | 2019-11-07 16:11:32 +0000 | [diff] [blame] | 49 | #if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2) |
Ruchika Gupta | d6b8920 | 2017-04-17 18:07:17 +0530 | [diff] [blame] | 50 | /* |
| 51 | * In case of Secure Boot, the IBR configures the SMMU |
| 52 | * to allow only Secure transactions. |
| 53 | * SMMU must be reset in bypass mode. |
| 54 | * Set the ClientPD bit and Clear the USFCFG Bit |
| 55 | */ |
| 56 | u32 val; |
| 57 | val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); |
| 58 | out_le32(SMMU_SCR0, val); |
| 59 | val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK); |
| 60 | out_le32(SMMU_NSCR0, val); |
| 61 | #endif |
York Sun | f2aaf84 | 2017-05-15 08:52:00 -0700 | [diff] [blame] | 62 | #ifdef CONFIG_LAYERSCAPE_NS_ACCESS |
| 63 | enable_layerscape_ns_access(); |
| 64 | #endif |
| 65 | #ifdef CONFIG_SPL_FSL_LS_PPA |
| 66 | ppa_init(); |
| 67 | #endif |
Ruchika Gupta | d6b8920 | 2017-04-17 18:07:17 +0530 | [diff] [blame] | 68 | } |
| 69 | |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 70 | void board_init_f(ulong dummy) |
| 71 | { |
Michael Walle | 97aaa98 | 2021-03-26 19:40:56 +0100 | [diff] [blame] | 72 | int ret; |
| 73 | |
York Sun | afe58b1 | 2018-06-26 14:26:02 -0700 | [diff] [blame] | 74 | icache_enable(); |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 75 | /* Clear global data */ |
| 76 | memset((void *)gd, 0, sizeof(gd_t)); |
Michael Walle | 24bd03a | 2021-03-26 19:40:55 +0100 | [diff] [blame] | 77 | if (IS_ENABLED(CONFIG_DEBUG_UART)) |
| 78 | debug_uart_init(); |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 79 | board_early_init_f(); |
Michael Walle | 97aaa98 | 2021-03-26 19:40:56 +0100 | [diff] [blame] | 80 | ret = spl_early_init(); |
| 81 | if (ret) { |
| 82 | debug("spl_early_init() failed: %d\n", ret); |
| 83 | hang(); |
| 84 | } |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 85 | timer_init(); |
York Sun | 4ce6fbf | 2017-03-27 11:41:01 -0700 | [diff] [blame] | 86 | #ifdef CONFIG_ARCH_LS2080A |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 87 | env_init(); |
| 88 | #endif |
| 89 | get_clocks(); |
| 90 | |
| 91 | preloader_console_init(); |
Simon Glass | b79ff7c | 2020-12-22 19:30:21 -0700 | [diff] [blame] | 92 | gd->bd = &bdata; |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 93 | |
Biwen Li | a8c4e1f | 2019-12-31 15:33:38 +0800 | [diff] [blame] | 94 | #ifdef CONFIG_SYS_I2C |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 95 | #ifdef CONFIG_SPL_I2C_SUPPORT |
| 96 | i2c_init_all(); |
| 97 | #endif |
Biwen Li | a8c4e1f | 2019-12-31 15:33:38 +0800 | [diff] [blame] | 98 | #endif |
Rajesh Bhagat | f771678 | 2018-01-17 16:13:08 +0530 | [diff] [blame] | 99 | #ifdef CONFIG_VID |
| 100 | init_func_vid(); |
| 101 | #endif |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 102 | dram_init(); |
York Sun | f2aaf84 | 2017-05-15 08:52:00 -0700 | [diff] [blame] | 103 | #ifdef CONFIG_SPL_FSL_LS_PPA |
| 104 | #ifndef CONFIG_SYS_MEM_RESERVE_SECURE |
| 105 | #error Need secure RAM for PPA |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 106 | #endif |
York Sun | f2aaf84 | 2017-05-15 08:52:00 -0700 | [diff] [blame] | 107 | /* |
| 108 | * Secure memory location is determined in dram_init_banksize(). |
| 109 | * gd->ram_size is deducted by the size of secure ram. |
| 110 | */ |
| 111 | dram_init_banksize(); |
| 112 | |
| 113 | /* |
| 114 | * After dram_init_bank_size(), we know U-Boot only uses the first |
| 115 | * memory bank regardless how big the memory is. |
| 116 | */ |
| 117 | gd->ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; |
| 118 | |
| 119 | /* |
| 120 | * If PPA is loaded, U-Boot will resume running at EL2. |
| 121 | * Cache and MMU will be enabled. Need a place for TLB. |
| 122 | * U-Boot will be relocated to the end of available memory |
| 123 | * in first bank. At this point, we cannot know how much |
| 124 | * memory U-Boot uses. Put TLB table lower by SPL_TLB_SETBACK |
| 125 | * to avoid overlapping. As soon as the RAM version U-Boot sets |
| 126 | * up new MMU, this space is no longer needed. |
| 127 | */ |
| 128 | gd->ram_top -= SPL_TLB_SETBACK; |
| 129 | gd->arch.tlb_size = PGTABLE_SIZE; |
| 130 | gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1); |
| 131 | gd->arch.tlb_allocated = gd->arch.tlb_addr; |
| 132 | #endif /* CONFIG_SPL_FSL_LS_PPA */ |
York Sun | bb7d342 | 2018-06-26 14:48:28 -0700 | [diff] [blame] | 133 | #if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT) |
| 134 | qspi_ahb_init(); |
| 135 | #endif |
York Sun | f2aaf84 | 2017-05-15 08:52:00 -0700 | [diff] [blame] | 136 | } |
York Sun | ffea3e6 | 2017-09-28 08:42:14 -0700 | [diff] [blame] | 137 | |
| 138 | #ifdef CONFIG_SPL_OS_BOOT |
| 139 | /* |
| 140 | * Return |
| 141 | * 0 if booting into OS is selected |
| 142 | * 1 if booting into U-Boot is selected |
| 143 | */ |
| 144 | int spl_start_uboot(void) |
| 145 | { |
| 146 | env_init(); |
| 147 | if (env_get_yesno("boot_os") != 0) |
| 148 | return 0; |
| 149 | |
| 150 | return 1; |
| 151 | } |
| 152 | #endif /* CONFIG_SPL_OS_BOOT */ |
York Sun | f2aaf84 | 2017-05-15 08:52:00 -0700 | [diff] [blame] | 153 | #endif /* CONFIG_SPL_BUILD */ |