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Wolfgang Denk0cbaf642005-09-25 00:53:22 +02001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Denk0cbaf642005-09-25 00:53:22 +02006 */
7
8/*
9 * This file contains the configuration parameters for the dbau1x00 board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020015#define CONFIG_PB1X00 1
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090016#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020017
18#ifdef CONFIG_PB1000
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090019#define CONFIG_SOC_AU1000 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020020#else
21#ifdef CONFIG_PB1100
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090022#define CONFIG_SOC_AU1100 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020023#else
24#ifdef CONFIG_PB1500
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090025#define CONFIG_SOC_AU1500 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020026#else
27#error "No valid board set"
28#endif
29#endif
30#endif
31
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020032#define CONFIG_TIMESTAMP /* Print image info with timestamp */
33#undef CONFIG_BOOTARGS
34
35#define CONFIG_EXTRA_ENV_SETTINGS \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010036 "addmisc=setenv bootargs ${bootargs} " \
37 "console=ttyS0,${baudrate} " \
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020038 "panic=1\0" \
39 "bootfile=/vmlinux.img\0" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010040 "load=tftp 80500000 ${u-boot}\0" \
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020041 ""
42/* Boot from NFS root */
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010043#define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020044
45/*
46 * Miscellaneous configurable options
47 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020048#define CONFIG_SYS_LONGHELP /* undef to save memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020049#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
50#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
51#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020052
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020053#define CONFIG_SYS_MALLOC_LEN 128*1024
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020054
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020055#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020056
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020057#define CONFIG_SYS_MIPS_TIMER_FREQ 396000000
Shinya Kuribayashi5d374e02008-06-05 22:29:00 +090058
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020059#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020060
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020061#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020062
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020063#define CONFIG_SYS_MEMTEST_START 0x80100000
64#undef CONFIG_SYS_MEMTEST_START
65#define CONFIG_SYS_MEMTEST_START 0x80200000
66#define CONFIG_SYS_MEMTEST_END 0x83800000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020067
68/*-----------------------------------------------------------------------
69 * FLASH and environment organization
70 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020071#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
72#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020073
74#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
75#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
76
Wolfgang Denk0708bc62010-10-07 21:51:12 +020077#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020078#define CONFIG_SYS_MONITOR_LEN (192 << 10)
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020079
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020080#define CONFIG_SYS_INIT_SP_OFFSET 0x4000000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020081
82/* We boot from this flash, selected with dip switch */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020083#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020084
85/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020086#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
87#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020088
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020089/* Address and size of Primary Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020090#define CONFIG_ENV_ADDR 0xB0030000
91#define CONFIG_ENV_SIZE 0x10000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020092
93#define CONFIG_FLASH_16BIT
94
95#define CONFIG_NR_DRAM_BANKS 2
96
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020097#define CONFIG_MEMSIZE_IN_BYTES
98
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020099/*---USB -------------------------------------------*/
100#if 0
101#define CONFIG_USB_OHCI
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200102#endif
103
104/*---ATA PCMCIA ------------------------------------*/
105#if 0
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200106#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
107#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200108#define CONFIG_PCMCIA_SLOT_A
109
110#define CONFIG_ATAPI 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200111
112/* We run CF in "true ide" mode or a harddrive via pcmcia */
113#define CONFIG_IDE_PCMCIA 1
114
115/* We only support one slot for now */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200116#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
117#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200118
119#undef CONFIG_IDE_LED /* LED for ide not supported */
120#undef CONFIG_IDE_RESET /* reset for ide not supported */
121
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200122#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200123
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200124#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200125
126/* Offset for data I/O */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127#define CONFIG_SYS_ATA_DATA_OFFSET 8
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200128
129/* Offset for normal register accesses */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200130#define CONFIG_SYS_ATA_REG_OFFSET 0
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200131
132/* Offset for alternate registers */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200134
135#endif
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200136
Jon Loeligeraa2d2c22007-07-04 22:33:17 -0500137/*
Jon Loeliger5c4ddae2007-07-10 10:12:10 -0500138 * BOOTP options
139 */
140#define CONFIG_BOOTP_BOOTFILESIZE
141#define CONFIG_BOOTP_BOOTPATH
142#define CONFIG_BOOTP_GATEWAY
143#define CONFIG_BOOTP_HOSTNAME
144
Jon Loeliger5c4ddae2007-07-10 10:12:10 -0500145/*
Jon Loeligeraa2d2c22007-07-04 22:33:17 -0500146 * Command line configuration.
147 */
Jon Loeligeraa2d2c22007-07-04 22:33:17 -0500148
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200149#endif /* __CONFIG_H */