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Wolfgang Denk0cbaf642005-09-25 00:53:22 +02001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Denk0cbaf642005-09-25 00:53:22 +02006 */
7
8/*
9 * This file contains the configuration parameters for the dbau1x00 board.
10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
16#define CONFIG_PB1X00 1
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090017#define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020018
19#ifdef CONFIG_PB1000
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090020#define CONFIG_SOC_AU1000 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020021#else
22#ifdef CONFIG_PB1100
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090023#define CONFIG_SOC_AU1100 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020024#else
25#ifdef CONFIG_PB1500
Shinya Kuribayashied49a6a2008-06-07 20:51:56 +090026#define CONFIG_SOC_AU1500 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020027#else
28#error "No valid board set"
29#endif
30#endif
31#endif
32
Daniel Schwierzeckd8a49ca2012-04-02 02:57:56 +000033#define CONFIG_SYS_LITTLE_ENDIAN
34
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020035#define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */
36
37#define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */
38
39#define CONFIG_BAUDRATE 115200
40
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020041#define CONFIG_TIMESTAMP /* Print image info with timestamp */
42#undef CONFIG_BOOTARGS
43
44#define CONFIG_EXTRA_ENV_SETTINGS \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010045 "addmisc=setenv bootargs ${bootargs} " \
46 "console=ttyS0,${baudrate} " \
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020047 "panic=1\0" \
48 "bootfile=/vmlinux.img\0" \
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010049 "load=tftp 80500000 ${u-boot}\0" \
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020050 ""
51/* Boot from NFS root */
Wolfgang Denk86eb3b72005-11-20 21:40:11 +010052#define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm"
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020053
54/*
55 * Miscellaneous configurable options
56 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020057#define CONFIG_SYS_LONGHELP /* undef to save memory */
58#define CONFIG_SYS_PROMPT "Pb1x00 # " /* Monitor Command Prompt */
59#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
60#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
61#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020062
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020063#define CONFIG_SYS_MALLOC_LEN 128*1024
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020064
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020065#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020066
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020067#define CONFIG_SYS_MIPS_TIMER_FREQ 396000000
Shinya Kuribayashi5d374e02008-06-05 22:29:00 +090068
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020069#define CONFIG_SYS_HZ 1000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020070
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020071#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020072
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020073#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020074
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020075#define CONFIG_SYS_MEMTEST_START 0x80100000
76#undef CONFIG_SYS_MEMTEST_START
77#define CONFIG_SYS_MEMTEST_START 0x80200000
78#define CONFIG_SYS_MEMTEST_END 0x83800000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020079
80/*-----------------------------------------------------------------------
81 * FLASH and environment organization
82 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020083#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
84#define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020085
86#define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
87#define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
88
89/* The following #defines are needed to get flash environment right */
Wolfgang Denk0708bc62010-10-07 21:51:12 +020090#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020091#define CONFIG_SYS_MONITOR_LEN (192 << 10)
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020092
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020093#define CONFIG_SYS_INIT_SP_OFFSET 0x4000000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020094
95/* We boot from this flash, selected with dip switch */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
Wolfgang Denk0cbaf642005-09-25 00:53:22 +020097
98/* timeout values are in ticks */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020099#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
100#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200101
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200102#define CONFIG_ENV_IS_NOWHERE 1
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200103
104/* Address and size of Primary Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200105#define CONFIG_ENV_ADDR 0xB0030000
106#define CONFIG_ENV_SIZE 0x10000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200107
108#define CONFIG_FLASH_16BIT
109
110#define CONFIG_NR_DRAM_BANKS 2
111
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200112
113#define CONFIG_MEMSIZE_IN_BYTES
114
115
116/*---USB -------------------------------------------*/
117#if 0
118#define CONFIG_USB_OHCI
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200119#define CONFIG_USB_STORAGE
120#define CONFIG_DOS_PARTITION
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200121#endif
122
123/*---ATA PCMCIA ------------------------------------*/
124#if 0
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200125#define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
126#define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200127#define CONFIG_PCMCIA_SLOT_A
128
129#define CONFIG_ATAPI 1
130#define CONFIG_MAC_PARTITION 1
131
132/* We run CF in "true ide" mode or a harddrive via pcmcia */
133#define CONFIG_IDE_PCMCIA 1
134
135/* We only support one slot for now */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200136#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
137#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200138
139#undef CONFIG_IDE_LED /* LED for ide not supported */
140#undef CONFIG_IDE_RESET /* reset for ide not supported */
141
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200142#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200143
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200144#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200145
146/* Offset for data I/O */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200147#define CONFIG_SYS_ATA_DATA_OFFSET 8
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200148
149/* Offset for normal register accesses */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200150#define CONFIG_SYS_ATA_REG_OFFSET 0
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200151
152/* Offset for alternate registers */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200153#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200154
155#endif
156/*-----------------------------------------------------------------------
157 * Cache Configuration
158 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200159#define CONFIG_SYS_DCACHE_SIZE 16384
160#define CONFIG_SYS_ICACHE_SIZE 16384
161#define CONFIG_SYS_CACHELINE_SIZE 32
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200162
Jon Loeligeraa2d2c22007-07-04 22:33:17 -0500163
164/*
Jon Loeliger5c4ddae2007-07-10 10:12:10 -0500165 * BOOTP options
166 */
167#define CONFIG_BOOTP_BOOTFILESIZE
168#define CONFIG_BOOTP_BOOTPATH
169#define CONFIG_BOOTP_GATEWAY
170#define CONFIG_BOOTP_HOSTNAME
171
172
173/*
Jon Loeligeraa2d2c22007-07-04 22:33:17 -0500174 * Command line configuration.
175 */
176#include <config_cmd_default.h>
177
178#define CONFIG_CMD_DHCP
179#define CONFIG_CMD_ELF
180#define CONFIG_CMD_MII
181#define CONFIG_CMD_PING
182
Mike Frysinger78dcaf42009-01-28 19:08:14 -0500183#undef CONFIG_CMD_SAVEENV
Jon Loeligeraa2d2c22007-07-04 22:33:17 -0500184#undef CONFIG_CMD_FAT
185#undef CONFIG_CMD_FLASH
186#undef CONFIG_CMD_FPGA
187#undef CONFIG_CMD_IDE
188#undef CONFIG_CMD_LOADS
189#undef CONFIG_CMD_RUN
190#undef CONFIG_CMD_LOADB
191#undef CONFIG_CMD_ELF
192#undef CONFIG_CMD_BDI
193#undef CONFIG_CMD_BEDBUG
Wolfgang Denk0cbaf642005-09-25 00:53:22 +0200194
195#endif /* __CONFIG_H */