Jagannadha Sutradharudu Teki | fc0d22b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Xilinx ZC770 XM013 board DTS |
| 3 | * |
| 4 | * Copyright (C) 2013 Xilinx, Inc. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | /dts-v1/; |
| 9 | #include "zynq-7000.dtsi" |
| 10 | |
| 11 | / { |
Jagannadha Sutradharudu Teki | fc0d22b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 12 | compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000"; |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 13 | model = "Xilinx Zynq"; |
Masahiro Yamada | d6367a2 | 2014-05-15 20:37:54 +0900 | [diff] [blame] | 14 | |
Masahiro Yamada | 87f645e | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 15 | aliases { |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 16 | ethernet0 = &gem1; |
| 17 | i2c0 = &i2c1; |
Masahiro Yamada | 87f645e | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 18 | serial0 = &uart0; |
Michal Simek | 48d4def | 2016-04-07 13:08:35 +0200 | [diff] [blame] | 19 | spi0 = &qspi; |
| 20 | spi1 = &spi0; |
Masahiro Yamada | 87f645e | 2014-05-15 20:37:55 +0900 | [diff] [blame] | 21 | }; |
| 22 | |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 23 | chosen { |
Michal Simek | 8073b86 | 2016-04-07 11:15:00 +0200 | [diff] [blame] | 24 | bootargs = ""; |
Michal Simek | c9af95a | 2016-01-12 13:56:44 +0100 | [diff] [blame] | 25 | stdout-path = "serial0:115200n8"; |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 26 | }; |
| 27 | |
Michal Simek | a8d362f | 2015-08-12 11:25:05 +0200 | [diff] [blame] | 28 | memory { |
Masahiro Yamada | d6367a2 | 2014-05-15 20:37:54 +0900 | [diff] [blame] | 29 | device_type = "memory"; |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 30 | reg = <0x0 0x40000000>; |
Masahiro Yamada | d6367a2 | 2014-05-15 20:37:54 +0900 | [diff] [blame] | 31 | }; |
Jagannadha Sutradharudu Teki | fc0d22b | 2014-01-09 01:48:29 +0530 | [diff] [blame] | 32 | }; |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 33 | |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 34 | &can1 { |
| 35 | status = "okay"; |
| 36 | }; |
| 37 | |
| 38 | &gem1 { |
| 39 | status = "okay"; |
| 40 | phy-mode = "rgmii-id"; |
| 41 | phy-handle = <ðernet_phy>; |
| 42 | |
| 43 | ethernet_phy: ethernet-phy@7 { |
| 44 | reg = <7>; |
| 45 | }; |
| 46 | }; |
| 47 | |
| 48 | &i2c1 { |
| 49 | status = "okay"; |
| 50 | clock-frequency = <400000>; |
| 51 | |
| 52 | si570: clock-generator@55 { |
| 53 | #clock-cells = <0>; |
| 54 | compatible = "silabs,si570"; |
| 55 | temperature-stability = <50>; |
| 56 | reg = <0x55>; |
| 57 | factory-fout = <156250000>; |
| 58 | clock-frequency = <148500000>; |
| 59 | }; |
| 60 | }; |
| 61 | |
Michal Simek | 48d4def | 2016-04-07 13:08:35 +0200 | [diff] [blame] | 62 | &qspi { |
| 63 | status = "okay"; |
| 64 | }; |
| 65 | |
Michal Simek | 49f44b9 | 2016-01-14 13:09:16 +0100 | [diff] [blame] | 66 | &spi0 { |
| 67 | status = "okay"; |
| 68 | num-cs = <4>; |
| 69 | is-decoded-cs = <0>; |
| 70 | eeprom: at25@0 { |
| 71 | at25,byte-len = <8192>; |
| 72 | at25,addr-mode = <2>; |
| 73 | at25,page-size = <32>; |
| 74 | |
| 75 | compatible = "atmel,at25"; |
| 76 | reg = <2>; |
| 77 | spi-max-frequency = <1000000>; |
| 78 | }; |
| 79 | }; |
| 80 | |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 81 | &uart0 { |
Simon Glass | 8c7323a | 2015-10-17 19:41:24 -0600 | [diff] [blame] | 82 | u-boot,dm-pre-reloc; |
Michal Simek | 1b27e66 | 2015-07-22 11:36:32 +0200 | [diff] [blame] | 83 | status = "okay"; |
| 84 | }; |