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Daniel Gorsulowski6e02da52010-01-25 10:50:41 +01001/*
Daniel Gorsulowski6f897102011-04-18 04:15:02 +00002 * (C) Copyright 2010-2011
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +01003 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
4 * esd electronic system design gmbh <www.esd.eu>
5 *
6 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01007 * Stelian Pop <stelian@popies.net>
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +01008 * Lead Tech Design <www.leadtechdesign.com>
9 *
10 * Configuation settings for the esd OTC570 board.
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#ifndef __CONFIG_H
32#define __CONFIG_H
33
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000034/*
35 * SoC must be defined first, before hardware.h is included.
36 * In this case SoC is defined in boards.cfg.
37 */
38#include <asm/hardware.h>
39
40/*
41 * Warning: changing CONFIG_SYS_TEXT_BASE requires
42 * adapting the initial boot program.
43 * Since the linker has to swallow that define, we must use a pure
44 * hex number here!
45 */
46#define CONFIG_SYS_TEXT_BASE 0x20002000
47
Daniel Gorsulowski24a21f02011-10-30 22:52:29 +000048/*
49 * since a number of boards are not being listed in linux
50 * arch/arm/tools/mach-types any more, the mach-types have to be
51 * defined here
52 */
53#define MACH_TYPE_OTC570 2166
54
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000055/* ARM asynchronous clock */
56#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
Daniel Gorsulowski847726c2010-08-09 11:17:13 +020057#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010058#define CONFIG_SYS_HZ 1000 /* decrementer freq */
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010059
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000060/* Misc CPU related */
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010061#define CONFIG_SKIP_LOWLEVEL_INIT
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010062#define CONFIG_ARCH_CPU_INIT
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000063#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
64#define CONFIG_SETUP_MEMORY_TAGS
65#define CONFIG_INITRD_TAG
66#define CONFIG_SERIAL_TAG
67#define CONFIG_REVISION_TAG
68#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
69#define CONFIG_MISC_INIT_R /* Call misc_init_r */
70#undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */
71
72#define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */
73#define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */
74#define CONFIG_PREBOOT /* enable preboot variable */
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010075
76/*
77 * Hardware drivers
78 */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000079
80/* required until arch/arm/include/asm/arch-at91/at91sam9263.h is reworked */
81#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
82
83/* general purpose I/O */
84#define CONFIG_AT91_GPIO
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010085
86/* Console output */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000087#define CONFIG_ATMEL_USART
88#define CONFIG_USART_BASE ATMEL_BASE_DBGU
89#define CONFIG_USART_ID ATMEL_ID_SYS
90#define CONFIG_BAUDRATE 115200
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010091
92#define CONFIG_BOOTDELAY 3
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000093#define CONFIG_ZERO_BOOTDELAY_CHECK
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010094
95/* LCD */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000096#define CONFIG_LCD
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +010097#undef CONFIG_SPLASH_SCREEN
98
Daniel Gorsulowski6f897102011-04-18 04:15:02 +000099#ifdef CONFIG_LCD
100# define LCD_BPP LCD_COLOR8
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100101
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000102# ifndef CONFIG_SPLASH_SCREEN
103# define CONFIG_LCD_LOGO
104# define CONFIG_LCD_INFO
105# undef CONFIG_LCD_INFO_BELOW_LOGO
106# endif /* CONFIG_SPLASH_SCREEN */
107
108# undef LCD_TEST_PATTERN
109# define CONFIG_SYS_WHITE_ON_BLACK
110# define CONFIG_ATMEL_LCD
111# define CONFIG_SYS_CONSOLE_IS_IN_ENV
112# define CONFIG_OTC570_LCD_BASE (CONFIG_SYS_SDRAM_BASE + 0x03fa5000)
113# define CONFIG_CMD_BMP
114#endif /* CONFIG_LCD */
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100115
116/* RTC and I2C stuff */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000117#define CONFIG_RTC_DS1338
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100118#define CONFIG_SYS_I2C_RTC_ADDR 0x68
119#undef CONFIG_HARD_I2C
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000120#define CONFIG_SOFT_I2C
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100121#define CONFIG_SYS_I2C_SPEED 100000
122#define CONFIG_SYS_I2C_SLAVE 0x7F
123
124#ifdef CONFIG_SOFT_I2C
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000125# define CONFIG_I2C_CMD_TREE
126# define CONFIG_I2C_MULTI_BUS
Daniel Gorsulowskib5faaf72010-02-11 14:57:04 +0100127/* Configure data and clock pins for pio */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000128# define I2C_INIT { \
Daniel Gorsulowskib5faaf72010-02-11 14:57:04 +0100129 at91_set_pio_output(AT91_PIO_PORTB, 4, 0); \
130 at91_set_pio_output(AT91_PIO_PORTB, 5, 0); \
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100131}
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000132# define I2C_SOFT_DECLARATIONS
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100133/* Configure data pin as output */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000134# define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTB, 4, 0)
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100135/* Configure data pin as input */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000136# define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTB, 4, 0)
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100137/* Read data pin */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000138# define I2C_READ at91_get_pio_value(AT91_PIO_PORTB, 4)
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100139/* Set data pin */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000140# define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTB, 4, bit)
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100141/* Set clock pin */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000142# define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTB, 5, bit)
143# define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100144#endif /* CONFIG_SOFT_I2C */
145
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100146/*
147 * BOOTP options
148 */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000149#define CONFIG_BOOTP_BOOTFILESIZE
150#define CONFIG_BOOTP_BOOTPATH
151#define CONFIG_BOOTP_GATEWAY
152#define CONFIG_BOOTP_HOSTNAME
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100153
154/*
155 * Command line configuration.
156 */
157#include <config_cmd_default.h>
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100158#undef CONFIG_CMD_FPGA
159#undef CONFIG_CMD_LOADS
160#undef CONFIG_CMD_IMLS
161
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000162#define CONFIG_CMD_PING
163#define CONFIG_CMD_DHCP
164#define CONFIG_CMD_NAND
165#define CONFIG_CMD_USB
166#define CONFIG_CMD_I2C
167#define CONFIG_CMD_DATE
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100168
169/* LED */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000170#define CONFIG_AT91_LED
171
172/*
173 * SDRAM: 1 bank, min 32, max 128 MB
174 * Initialized before u-boot gets started.
175 */
176#define CONFIG_NR_DRAM_BANKS 1
177#define CONFIG_SYS_SDRAM_BASE 0x20000000 /* ATMEL_BASE_CS1 */
178#define CONFIG_SYS_SDRAM_SIZE 0x04000000
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100179
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000180#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
181#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
182#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
183
184/*
185 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
186 * leaving the correct space for initial global data structure above
187 * that address while providing maximum stack area below.
188 */
189#define CONFIG_SYS_INIT_SP_ADDR \
190 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100191
192/* DataFlash */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000193#ifdef CONFIG_SYS_USE_DATAFLASH
194# define CONFIG_ATMEL_DATAFLASH_SPI
195# define CONFIG_HAS_DATAFLASH
196# define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
197# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
198# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
199# define AT91_SPI_CLK 15000000
200# define DATAFLASH_TCSS (0x1a << 16)
201# define DATAFLASH_TCHS (0x1 << 24)
202#endif
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100203
204/* NOR flash is not populated, disable it */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000205#define CONFIG_SYS_NO_FLASH
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100206
207/* NAND flash */
208#ifdef CONFIG_CMD_NAND
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000209# define CONFIG_NAND_ATMEL
210# define CONFIG_SYS_MAX_NAND_DEVICE 1
211# define CONFIG_SYS_NAND_BASE 0x40000000 /* ATMEL_BASE_CS3 */
212# define CONFIG_SYS_NAND_DBW_8
213# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
214# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
215# define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
216# define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100217#endif
218
219/* Ethernet */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000220#define CONFIG_MACB
221#define CONFIG_RMII
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000222#define CONFIG_FIT
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100223#define CONFIG_NET_RETRY_COUNT 20
224#undef CONFIG_RESET_PHY_R
225
226/* USB */
227#define CONFIG_USB_ATMEL
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000228#define CONFIG_USB_OHCI_NEW
229#define CONFIG_DOS_PARTITION
230#define CONFIG_SYS_USB_OHCI_CPU_INIT
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100231#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000
232#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
233#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000234#define CONFIG_USB_STORAGE
235#define CONFIG_CMD_FAT
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100236
237/* CAN */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000238#define CONFIG_AT91_CAN
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100239
240/* hw-controller addresses */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000241#define CONFIG_ET1100_BASE 0x70000000 /* ATMEL_BASE_CS6 */
242
243#ifdef CONFIG_SYS_USE_DATAFLASH
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100244
245/* bootstrap + u-boot + env in dataflash on CS0 */
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000246# define CONFIG_ENV_IS_IN_DATAFLASH
247# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100248 0x8400)
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000249# define CONFIG_ENV_OFFSET 0x4200
250# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100251 CONFIG_ENV_OFFSET)
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000252# define CONFIG_ENV_SIZE 0x4200
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100253
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000254#elif CONFIG_SYS_USE_NANDFLASH
255
256/* bootstrap + u-boot + env + linux in nandflash */
257# define CONFIG_ENV_IS_IN_NAND 1
258# define CONFIG_ENV_OFFSET 0xC0000
259# define CONFIG_ENV_SIZE 0x20000
260
261#endif
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100262
263#define CONFIG_SYS_PROMPT "=> "
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000264#define CONFIG_SYS_CBSIZE 512
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100265#define CONFIG_SYS_MAXARGS 16
266#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
267 sizeof(CONFIG_SYS_PROMPT) + 16)
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000268#define CONFIG_SYS_LONGHELP
269#define CONFIG_CMDLINE_EDITING
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100270
271/*
272 * Size of malloc() pool
273 */
274#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
275 128*1024, 0x1000)
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100276
277#define CONFIG_STACKSIZE (32 * 1024) /* regular stack */
278
279#ifdef CONFIG_USE_IRQ
Daniel Gorsulowski6f897102011-04-18 04:15:02 +0000280# error CONFIG_USE_IRQ not supported
Daniel Gorsulowski6e02da52010-01-25 10:50:41 +0100281#endif
282
283#endif