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Dirk Behme7d75a102008-12-14 09:47:13 +01001/*
2 * (C) Copyright 2008 Texas Insturments
3 *
4 * (C) Copyright 2002
5 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
7 *
8 * (C) Copyright 2002
Detlev Zundelf1b3f2b2009-05-13 10:54:10 +02009 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
Dirk Behme7d75a102008-12-14 09:47:13 +010010 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020011 * SPDX-License-Identifier: GPL-2.0+
Dirk Behme7d75a102008-12-14 09:47:13 +010012 */
13
14/*
15 * CPU specific code
16 */
17
18#include <common.h>
19#include <command.h>
Jean-Christophe PLAGNIOL-VILLARD9053b5a2009-04-05 13:02:43 +020020#include <asm/system.h>
Kim, Heung Jun3b5ac952009-06-20 11:02:17 +020021#include <asm/cache.h>
Aneesh V3e3bc1e2011-06-16 23:30:49 +000022#include <asm/armv7.h>
Mathieu J. Poirier4d81b2de2012-07-31 08:59:32 +000023#include <linux/compiler.h>
Dirk Behme7d75a102008-12-14 09:47:13 +010024
Mathieu J. Poirier4d81b2de2012-07-31 08:59:32 +000025void __weak cpu_cache_initialization(void){}
26
Dirk Behme7d75a102008-12-14 09:47:13 +010027int cleanup_before_linux(void)
28{
Dirk Behme7d75a102008-12-14 09:47:13 +010029 /*
30 * this function is called just before we call linux
31 * it prepares the processor for linux
32 *
33 * we turn off caches etc ...
34 */
Stefano Babic84fb0dd2012-03-15 04:01:41 +000035#ifndef CONFIG_SPL_BUILD
Dirk Behme7d75a102008-12-14 09:47:13 +010036 disable_interrupts();
Stefano Babic84fb0dd2012-03-15 04:01:41 +000037#endif
Dirk Behme7d75a102008-12-14 09:47:13 +010038
Aneesh V3e3bc1e2011-06-16 23:30:49 +000039 /*
40 * Turn off I-cache and invalidate it
41 */
Dirk Behme7d75a102008-12-14 09:47:13 +010042 icache_disable();
Aneesh V3e3bc1e2011-06-16 23:30:49 +000043 invalidate_icache_all();
Dirk Behme7d75a102008-12-14 09:47:13 +010044
Aneesh V3e3bc1e2011-06-16 23:30:49 +000045 /*
46 * turn off D-cache
47 * dcache_disable() in turn flushes the d-cache and disables MMU
48 */
49 dcache_disable();
Aneesh V98a5dc72011-11-21 23:33:58 +000050 v7_outer_cache_disable();
Dirk Behme7d75a102008-12-14 09:47:13 +010051
Aneesh V3e3bc1e2011-06-16 23:30:49 +000052 /*
53 * After D-cache is flushed and before it is disabled there may
54 * be some new valid entries brought into the cache. We are sure
55 * that these lines are not dirty and will not affect our execution.
56 * (because unwinding the call-stack and setting a bit in CP15 SCTRL
57 * is all we did during this. We have not pushed anything on to the
58 * stack. Neither have we affected any static data)
59 * So just invalidate the entire d-cache again to avoid coherency
60 * problems for kernel
61 */
62 invalidate_dcache_all();
Dirk Behme7d75a102008-12-14 09:47:13 +010063
Mathieu J. Poirier4d81b2de2012-07-31 08:59:32 +000064 /*
65 * Some CPU need more cache attention before starting the kernel.
66 */
67 cpu_cache_initialization();
68
Dirk Behme7d75a102008-12-14 09:47:13 +010069 return 0;
70}