Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 Texas Insturments |
| 3 | * |
| 4 | * (C) Copyright 2002 |
| 5 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 6 | * Marius Groeger <mgroeger@sysgo.de> |
| 7 | * |
| 8 | * (C) Copyright 2002 |
Detlev Zundel | f1b3f2b | 2009-05-13 10:54:10 +0200 | [diff] [blame] | 9 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 10 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame^] | 11 | * SPDX-License-Identifier: GPL-2.0+ |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 12 | */ |
| 13 | |
| 14 | /* |
| 15 | * CPU specific code |
| 16 | */ |
| 17 | |
| 18 | #include <common.h> |
| 19 | #include <command.h> |
Jean-Christophe PLAGNIOL-VILLARD | 9053b5a | 2009-04-05 13:02:43 +0200 | [diff] [blame] | 20 | #include <asm/system.h> |
Kim, Heung Jun | 3b5ac95 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 21 | #include <asm/cache.h> |
Aneesh V | 3e3bc1e | 2011-06-16 23:30:49 +0000 | [diff] [blame] | 22 | #include <asm/armv7.h> |
Mathieu J. Poirier | 4d81b2de | 2012-07-31 08:59:32 +0000 | [diff] [blame] | 23 | #include <linux/compiler.h> |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 24 | |
Mathieu J. Poirier | 4d81b2de | 2012-07-31 08:59:32 +0000 | [diff] [blame] | 25 | void __weak cpu_cache_initialization(void){} |
| 26 | |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 27 | int cleanup_before_linux(void) |
| 28 | { |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 29 | /* |
| 30 | * this function is called just before we call linux |
| 31 | * it prepares the processor for linux |
| 32 | * |
| 33 | * we turn off caches etc ... |
| 34 | */ |
Stefano Babic | 84fb0dd | 2012-03-15 04:01:41 +0000 | [diff] [blame] | 35 | #ifndef CONFIG_SPL_BUILD |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 36 | disable_interrupts(); |
Stefano Babic | 84fb0dd | 2012-03-15 04:01:41 +0000 | [diff] [blame] | 37 | #endif |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 38 | |
Aneesh V | 3e3bc1e | 2011-06-16 23:30:49 +0000 | [diff] [blame] | 39 | /* |
| 40 | * Turn off I-cache and invalidate it |
| 41 | */ |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 42 | icache_disable(); |
Aneesh V | 3e3bc1e | 2011-06-16 23:30:49 +0000 | [diff] [blame] | 43 | invalidate_icache_all(); |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 44 | |
Aneesh V | 3e3bc1e | 2011-06-16 23:30:49 +0000 | [diff] [blame] | 45 | /* |
| 46 | * turn off D-cache |
| 47 | * dcache_disable() in turn flushes the d-cache and disables MMU |
| 48 | */ |
| 49 | dcache_disable(); |
Aneesh V | 98a5dc7 | 2011-11-21 23:33:58 +0000 | [diff] [blame] | 50 | v7_outer_cache_disable(); |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 51 | |
Aneesh V | 3e3bc1e | 2011-06-16 23:30:49 +0000 | [diff] [blame] | 52 | /* |
| 53 | * After D-cache is flushed and before it is disabled there may |
| 54 | * be some new valid entries brought into the cache. We are sure |
| 55 | * that these lines are not dirty and will not affect our execution. |
| 56 | * (because unwinding the call-stack and setting a bit in CP15 SCTRL |
| 57 | * is all we did during this. We have not pushed anything on to the |
| 58 | * stack. Neither have we affected any static data) |
| 59 | * So just invalidate the entire d-cache again to avoid coherency |
| 60 | * problems for kernel |
| 61 | */ |
| 62 | invalidate_dcache_all(); |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 63 | |
Mathieu J. Poirier | 4d81b2de | 2012-07-31 08:59:32 +0000 | [diff] [blame] | 64 | /* |
| 65 | * Some CPU need more cache attention before starting the kernel. |
| 66 | */ |
| 67 | cpu_cache_initialization(); |
| 68 | |
Dirk Behme | 7d75a10 | 2008-12-14 09:47:13 +0100 | [diff] [blame] | 69 | return 0; |
| 70 | } |