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wdenk2cefd152004-02-08 22:55:38 +00001/*
wdenke65527f2004-02-12 00:47:09 +00002 * (C) Copyright 2002-2004
wdenk2cefd152004-02-08 22:55:38 +00003 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 * Modified to work with AMD flashes
8 *
wdenke65527f2004-02-12 00:47:09 +00009 * Copyright (C) 2004
10 * Ed Okerson
11 * Modified to work with little-endian systems.
12 *
wdenk2cefd152004-02-08 22:55:38 +000013 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 *
31 * History
32 * 01/20/2004 - combined variants of original driver.
wdenke65527f2004-02-12 00:47:09 +000033 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
34 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
35 * 01/27/2004 - Little endian support Ed Okerson
wdenk2cefd152004-02-08 22:55:38 +000036 *
37 * Tested Architectures
wdenke65527f2004-02-12 00:47:09 +000038 * Port Width Chip Width # of banks Flash Chip Board
wdenk2ebee312004-02-23 19:30:57 +000039 * 32 16 1 28F128J3 seranoa/eagle
40 * 64 16 1 28F128J3 seranoa/falcon
wdenk6cfa84e2004-02-10 00:03:41 +000041 *
wdenk2cefd152004-02-08 22:55:38 +000042 */
43
44/* The DEBUG define must be before common to enable debugging */
wdenk2ebee312004-02-23 19:30:57 +000045/* #define DEBUG */
46
wdenk2cefd152004-02-08 22:55:38 +000047#include <common.h>
48#include <asm/processor.h>
wdenkaeba06f2004-06-09 17:34:58 +000049#include <asm/byteorder.h>
wdenkd0245fc2005-04-13 10:02:42 +000050#include <environment.h>
wdenke65527f2004-02-12 00:47:09 +000051#ifdef CFG_FLASH_CFI_DRIVER
wdenke537b3b2004-02-23 23:54:43 +000052
wdenk2cefd152004-02-08 22:55:38 +000053/*
54 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
55 * The width of the port and the width of the chips are determined at initialization.
56 * These widths are used to calculate the address for access CFI data structures.
57 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
58 *
59 * References
60 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
61 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
62 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
63 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
64 *
65 * TODO
66 *
67 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
68 * Table (ALT) to determine if protection is available
69 *
70 * Add support for other command sets Use the PRI and ALT to determine command set
71 * Verify erase and program timeouts.
72 */
73
wdenke65527f2004-02-12 00:47:09 +000074#ifndef CFG_FLASH_BANKS_LIST
75#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
76#endif
77
wdenk2cefd152004-02-08 22:55:38 +000078#define FLASH_CMD_CFI 0x98
79#define FLASH_CMD_READ_ID 0x90
80#define FLASH_CMD_RESET 0xff
81#define FLASH_CMD_BLOCK_ERASE 0x20
82#define FLASH_CMD_ERASE_CONFIRM 0xD0
83#define FLASH_CMD_WRITE 0x40
84#define FLASH_CMD_PROTECT 0x60
85#define FLASH_CMD_PROTECT_SET 0x01
86#define FLASH_CMD_PROTECT_CLEAR 0xD0
87#define FLASH_CMD_CLEAR_STATUS 0x50
wdenke65527f2004-02-12 00:47:09 +000088#define FLASH_CMD_WRITE_TO_BUFFER 0xE8
89#define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
wdenk2cefd152004-02-08 22:55:38 +000090
91#define FLASH_STATUS_DONE 0x80
92#define FLASH_STATUS_ESS 0x40
93#define FLASH_STATUS_ECLBS 0x20
94#define FLASH_STATUS_PSLBS 0x10
95#define FLASH_STATUS_VPENS 0x08
96#define FLASH_STATUS_PSS 0x04
97#define FLASH_STATUS_DPS 0x02
98#define FLASH_STATUS_R 0x01
99#define FLASH_STATUS_PROTECT 0x01
100
101#define AMD_CMD_RESET 0xF0
102#define AMD_CMD_WRITE 0xA0
103#define AMD_CMD_ERASE_START 0x80
104#define AMD_CMD_ERASE_SECTOR 0x30
wdenked2ac4b2004-03-14 18:23:55 +0000105#define AMD_CMD_UNLOCK_START 0xAA
106#define AMD_CMD_UNLOCK_ACK 0x55
wdenk2cefd152004-02-08 22:55:38 +0000107
108#define AMD_STATUS_TOGGLE 0x40
109#define AMD_STATUS_ERROR 0x20
wdenked2ac4b2004-03-14 18:23:55 +0000110#define AMD_ADDR_ERASE_START 0x555
111#define AMD_ADDR_START 0x555
112#define AMD_ADDR_ACK 0x2AA
wdenk2cefd152004-02-08 22:55:38 +0000113
114#define FLASH_OFFSET_CFI 0x55
115#define FLASH_OFFSET_CFI_RESP 0x10
wdenke65527f2004-02-12 00:47:09 +0000116#define FLASH_OFFSET_PRIMARY_VENDOR 0x13
wdenk2cefd152004-02-08 22:55:38 +0000117#define FLASH_OFFSET_WTOUT 0x1F
wdenke65527f2004-02-12 00:47:09 +0000118#define FLASH_OFFSET_WBTOUT 0x20
wdenk2cefd152004-02-08 22:55:38 +0000119#define FLASH_OFFSET_ETOUT 0x21
wdenke65527f2004-02-12 00:47:09 +0000120#define FLASH_OFFSET_CETOUT 0x22
wdenk2cefd152004-02-08 22:55:38 +0000121#define FLASH_OFFSET_WMAX_TOUT 0x23
wdenke65527f2004-02-12 00:47:09 +0000122#define FLASH_OFFSET_WBMAX_TOUT 0x24
wdenk2cefd152004-02-08 22:55:38 +0000123#define FLASH_OFFSET_EMAX_TOUT 0x25
wdenke65527f2004-02-12 00:47:09 +0000124#define FLASH_OFFSET_CEMAX_TOUT 0x26
wdenk2cefd152004-02-08 22:55:38 +0000125#define FLASH_OFFSET_SIZE 0x27
wdenke65527f2004-02-12 00:47:09 +0000126#define FLASH_OFFSET_INTERFACE 0x28
127#define FLASH_OFFSET_BUFFER_SIZE 0x2A
wdenk2cefd152004-02-08 22:55:38 +0000128#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
129#define FLASH_OFFSET_ERASE_REGIONS 0x2D
130#define FLASH_OFFSET_PROTECT 0x02
wdenke65527f2004-02-12 00:47:09 +0000131#define FLASH_OFFSET_USER_PROTECTION 0x85
132#define FLASH_OFFSET_INTEL_PROTECTION 0x81
wdenk2cefd152004-02-08 22:55:38 +0000133
134
135#define FLASH_MAN_CFI 0x01000000
136
wdenke65527f2004-02-12 00:47:09 +0000137#define CFI_CMDSET_NONE 0
wdenk2cefd152004-02-08 22:55:38 +0000138#define CFI_CMDSET_INTEL_EXTENDED 1
wdenke65527f2004-02-12 00:47:09 +0000139#define CFI_CMDSET_AMD_STANDARD 2
wdenk2cefd152004-02-08 22:55:38 +0000140#define CFI_CMDSET_INTEL_STANDARD 3
wdenke65527f2004-02-12 00:47:09 +0000141#define CFI_CMDSET_AMD_EXTENDED 4
wdenk2cefd152004-02-08 22:55:38 +0000142#define CFI_CMDSET_MITSU_STANDARD 256
143#define CFI_CMDSET_MITSU_EXTENDED 257
wdenke65527f2004-02-12 00:47:09 +0000144#define CFI_CMDSET_SST 258
wdenk2cefd152004-02-08 22:55:38 +0000145
146
wdenk51242782004-12-18 22:35:43 +0000147#ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
148# undef FLASH_CMD_RESET
149# define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
150#endif
151
152
wdenk2cefd152004-02-08 22:55:38 +0000153typedef union {
154 unsigned char c;
155 unsigned short w;
156 unsigned long l;
157 unsigned long long ll;
158} cfiword_t;
159
160typedef union {
wdenke65527f2004-02-12 00:47:09 +0000161 volatile unsigned char *cp;
wdenk2cefd152004-02-08 22:55:38 +0000162 volatile unsigned short *wp;
wdenke65527f2004-02-12 00:47:09 +0000163 volatile unsigned long *lp;
wdenk2cefd152004-02-08 22:55:38 +0000164 volatile unsigned long long *llp;
165} cfiptr_t;
166
167#define NUM_ERASE_REGIONS 4
168
Marian Balakowicz513b4a12005-10-11 19:09:42 +0200169/* use CFG_MAX_FLASH_BANKS_DETECT if defined */
170#ifdef CFG_MAX_FLASH_BANKS_DETECT
171static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
172flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
173#else
wdenk2cefd152004-02-08 22:55:38 +0000174static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
Marian Balakowicz513b4a12005-10-11 19:09:42 +0200175flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
176#endif
wdenk2cefd152004-02-08 22:55:38 +0000177
wdenk2cefd152004-02-08 22:55:38 +0000178
179/*-----------------------------------------------------------------------
180 * Functions
181 */
182
183typedef unsigned long flash_sect_t;
184
wdenke65527f2004-02-12 00:47:09 +0000185static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
186static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
wdenke537b3b2004-02-23 23:54:43 +0000187static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
wdenke65527f2004-02-12 00:47:09 +0000188static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
wdenke537b3b2004-02-23 23:54:43 +0000189static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
190static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
191static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
wdenke65527f2004-02-12 00:47:09 +0000192static int flash_detect_cfi (flash_info_t * info);
Marian Balakowicz513b4a12005-10-11 19:09:42 +0200193ulong flash_get_size (ulong base, int banknum);
wdenke537b3b2004-02-23 23:54:43 +0000194static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
wdenke65527f2004-02-12 00:47:09 +0000195static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
196 ulong tout, char *prompt);
Wolfgang Denkbc650fa2005-10-05 01:51:29 +0200197#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
wdenk5c71a7a2005-05-16 15:23:22 +0000198static flash_info_t *flash_get_info(ulong base);
Wolfgang Denkbc650fa2005-10-05 01:51:29 +0200199#endif
wdenk2cefd152004-02-08 22:55:38 +0000200#ifdef CFG_FLASH_USE_BUFFER_WRITE
wdenke537b3b2004-02-23 23:54:43 +0000201static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
wdenk2cefd152004-02-08 22:55:38 +0000202#endif
203
wdenke65527f2004-02-12 00:47:09 +0000204/*-----------------------------------------------------------------------
205 * create an address based on the offset and the port width
206 */
wdenke537b3b2004-02-23 23:54:43 +0000207inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
wdenke65527f2004-02-12 00:47:09 +0000208{
209 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
210}
211
wdenk2cefd152004-02-08 22:55:38 +0000212#ifdef DEBUG
wdenke65527f2004-02-12 00:47:09 +0000213/*-----------------------------------------------------------------------
214 * Debug support
215 */
216void print_longlong (char *str, unsigned long long data)
wdenk2cefd152004-02-08 22:55:38 +0000217{
218 int i;
219 char *cp;
wdenke65527f2004-02-12 00:47:09 +0000220
221 cp = (unsigned char *) &data;
222 for (i = 0; i < 8; i++)
223 sprintf (&str[i * 2], "%2.2x", *cp++);
wdenk2cefd152004-02-08 22:55:38 +0000224}
wdenke65527f2004-02-12 00:47:09 +0000225static void flash_printqry (flash_info_t * info, flash_sect_t sect)
226{
227 cfiptr_t cptr;
228 int x, y;
229
Wolfgang Denk23f0d172005-10-09 00:25:58 +0200230 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
wdenke65527f2004-02-12 00:47:09 +0000231 cptr.cp =
232 flash_make_addr (info, sect,
233 x + FLASH_OFFSET_CFI_RESP);
234 debug ("%p : ", cptr.cp);
235 for (y = 0; y < 16; y++) {
236 debug ("%2.2x ", cptr.cp[y]);
237 }
238 debug (" ");
239 for (y = 0; y < 16; y++) {
240 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
241 debug ("%c", cptr.cp[y]);
242 } else {
243 debug (".");
244 }
245 }
246 debug ("\n");
247 }
248}
wdenk2cefd152004-02-08 22:55:38 +0000249#endif
250
251
252/*-----------------------------------------------------------------------
wdenk2cefd152004-02-08 22:55:38 +0000253 * read a character at a port width address
254 */
wdenke65527f2004-02-12 00:47:09 +0000255inline uchar flash_read_uchar (flash_info_t * info, uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000256{
257 uchar *cp;
wdenke65527f2004-02-12 00:47:09 +0000258
259 cp = flash_make_addr (info, 0, offset);
260#if defined(__LITTLE_ENDIAN)
261 return (cp[0]);
262#else
wdenk2cefd152004-02-08 22:55:38 +0000263 return (cp[info->portwidth - 1]);
wdenke65527f2004-02-12 00:47:09 +0000264#endif
wdenk2cefd152004-02-08 22:55:38 +0000265}
266
267/*-----------------------------------------------------------------------
268 * read a short word by swapping for ppc format.
269 */
wdenke65527f2004-02-12 00:47:09 +0000270ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000271{
wdenke65527f2004-02-12 00:47:09 +0000272 uchar *addr;
273 ushort retval;
wdenk2cefd152004-02-08 22:55:38 +0000274
wdenke65527f2004-02-12 00:47:09 +0000275#ifdef DEBUG
276 int x;
277#endif
278 addr = flash_make_addr (info, sect, offset);
wdenk2cefd152004-02-08 22:55:38 +0000279
wdenke65527f2004-02-12 00:47:09 +0000280#ifdef DEBUG
281 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
282 info->portwidth);
283 for (x = 0; x < 2 * info->portwidth; x++) {
284 debug ("addr[%x] = 0x%x\n", x, addr[x]);
285 }
286#endif
287#if defined(__LITTLE_ENDIAN)
288 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
289#else
290 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
291 addr[info->portwidth - 1]);
292#endif
293
294 debug ("retval = 0x%x\n", retval);
295 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000296}
297
298/*-----------------------------------------------------------------------
299 * read a long word by picking the least significant byte of each maiximum
300 * port size word. Swap for ppc format.
301 */
wdenke65527f2004-02-12 00:47:09 +0000302ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
wdenk2cefd152004-02-08 22:55:38 +0000303{
wdenke65527f2004-02-12 00:47:09 +0000304 uchar *addr;
305 ulong retval;
306
307#ifdef DEBUG
308 int x;
309#endif
310 addr = flash_make_addr (info, sect, offset);
wdenk2cefd152004-02-08 22:55:38 +0000311
wdenke65527f2004-02-12 00:47:09 +0000312#ifdef DEBUG
313 debug ("long addr is at %p info->portwidth = %d\n", addr,
314 info->portwidth);
315 for (x = 0; x < 4 * info->portwidth; x++) {
316 debug ("addr[%x] = 0x%x\n", x, addr[x]);
317 }
318#endif
319#if defined(__LITTLE_ENDIAN)
320 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
wdenke537b3b2004-02-23 23:54:43 +0000321 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
wdenke65527f2004-02-12 00:47:09 +0000322#else
323 retval = (addr[(2 * info->portwidth) - 1] << 24) |
324 (addr[(info->portwidth) - 1] << 16) |
325 (addr[(4 * info->portwidth) - 1] << 8) |
326 addr[(3 * info->portwidth) - 1];
327#endif
328 return retval;
wdenk2cefd152004-02-08 22:55:38 +0000329}
330
331/*-----------------------------------------------------------------------
332 */
333unsigned long flash_init (void)
334{
335 unsigned long size = 0;
336 int i;
337
338 /* Init: no FLASHes known */
wdenke65527f2004-02-12 00:47:09 +0000339 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
wdenk2cefd152004-02-08 22:55:38 +0000340 flash_info[i].flash_id = FLASH_UNKNOWN;
wdenke65527f2004-02-12 00:47:09 +0000341 size += flash_info[i].size = flash_get_size (bank_base[i], i);
wdenk2cefd152004-02-08 22:55:38 +0000342 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
Stefan Roesec443fe92005-11-22 13:20:42 +0100343#ifndef CFG_FLASH_QUIET_TEST
wdenke537b3b2004-02-23 23:54:43 +0000344 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
345 i, flash_info[i].size, flash_info[i].size << 20);
Stefan Roesec443fe92005-11-22 13:20:42 +0100346#endif /* CFG_FLASH_QUIET_TEST */
wdenk2cefd152004-02-08 22:55:38 +0000347 }
348 }
349
350 /* Monitor protection ON by default */
351#if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
wdenke65527f2004-02-12 00:47:09 +0000352 flash_protect (FLAG_PROTECT_SET,
353 CFG_MONITOR_BASE,
wdenk5c71a7a2005-05-16 15:23:22 +0000354 CFG_MONITOR_BASE + monitor_flash_len - 1,
355 flash_get_info(CFG_MONITOR_BASE));
wdenk2cefd152004-02-08 22:55:38 +0000356#endif
357
wdenke85b7a52004-10-10 22:16:06 +0000358 /* Environment protection ON by default */
359#ifdef CFG_ENV_IS_IN_FLASH
360 flash_protect (FLAG_PROTECT_SET,
361 CFG_ENV_ADDR,
362 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
wdenk5c71a7a2005-05-16 15:23:22 +0000363 flash_get_info(CFG_ENV_ADDR));
wdenke85b7a52004-10-10 22:16:06 +0000364#endif
365
366 /* Redundant environment protection ON by default */
367#ifdef CFG_ENV_ADDR_REDUND
368 flash_protect (FLAG_PROTECT_SET,
369 CFG_ENV_ADDR_REDUND,
370 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
wdenk5c71a7a2005-05-16 15:23:22 +0000371 flash_get_info(CFG_ENV_ADDR_REDUND));
wdenke85b7a52004-10-10 22:16:06 +0000372#endif
wdenk2cefd152004-02-08 22:55:38 +0000373 return (size);
374}
375
376/*-----------------------------------------------------------------------
377 */
Wolfgang Denkbc650fa2005-10-05 01:51:29 +0200378#if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
wdenk5c71a7a2005-05-16 15:23:22 +0000379static flash_info_t *flash_get_info(ulong base)
380{
381 int i;
Marian Balakowicz513b4a12005-10-11 19:09:42 +0200382 flash_info_t * info = 0;
wdenk5c71a7a2005-05-16 15:23:22 +0000383
384 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
385 info = & flash_info[i];
386 if (info->size && info->start[0] <= base &&
387 base <= info->start[0] + info->size - 1)
388 break;
389 }
390
391 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
392}
Wolfgang Denkbc650fa2005-10-05 01:51:29 +0200393#endif
wdenk5c71a7a2005-05-16 15:23:22 +0000394
395/*-----------------------------------------------------------------------
396 */
wdenke65527f2004-02-12 00:47:09 +0000397int flash_erase (flash_info_t * info, int s_first, int s_last)
wdenk2cefd152004-02-08 22:55:38 +0000398{
399 int rcode = 0;
400 int prot;
401 flash_sect_t sect;
402
wdenke65527f2004-02-12 00:47:09 +0000403 if (info->flash_id != FLASH_MAN_CFI) {
wdenk42c05472004-03-23 22:14:11 +0000404 puts ("Can't erase unknown flash type - aborted\n");
wdenk2cefd152004-02-08 22:55:38 +0000405 return 1;
406 }
407 if ((s_first < 0) || (s_first > s_last)) {
wdenk42c05472004-03-23 22:14:11 +0000408 puts ("- no sectors to erase\n");
wdenk2cefd152004-02-08 22:55:38 +0000409 return 1;
410 }
411
412 prot = 0;
wdenke65527f2004-02-12 00:47:09 +0000413 for (sect = s_first; sect <= s_last; ++sect) {
wdenk2cefd152004-02-08 22:55:38 +0000414 if (info->protect[sect]) {
415 prot++;
416 }
417 }
418 if (prot) {
wdenke65527f2004-02-12 00:47:09 +0000419 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
wdenk2cefd152004-02-08 22:55:38 +0000420 } else {
wdenk42c05472004-03-23 22:14:11 +0000421 putc ('\n');
wdenk2cefd152004-02-08 22:55:38 +0000422 }
423
424
wdenke65527f2004-02-12 00:47:09 +0000425 for (sect = s_first; sect <= s_last; sect++) {
wdenk2cefd152004-02-08 22:55:38 +0000426 if (info->protect[sect] == 0) { /* not protected */
wdenke65527f2004-02-12 00:47:09 +0000427 switch (info->vendor) {
wdenk2cefd152004-02-08 22:55:38 +0000428 case CFI_CMDSET_INTEL_STANDARD:
429 case CFI_CMDSET_INTEL_EXTENDED:
wdenke537b3b2004-02-23 23:54:43 +0000430 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
431 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
432 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
wdenk2cefd152004-02-08 22:55:38 +0000433 break;
434 case CFI_CMDSET_AMD_STANDARD:
435 case CFI_CMDSET_AMD_EXTENDED:
wdenke65527f2004-02-12 00:47:09 +0000436 flash_unlock_seq (info, sect);
wdenked2ac4b2004-03-14 18:23:55 +0000437 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
438 AMD_CMD_ERASE_START);
wdenke65527f2004-02-12 00:47:09 +0000439 flash_unlock_seq (info, sect);
wdenke537b3b2004-02-23 23:54:43 +0000440 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
wdenk2cefd152004-02-08 22:55:38 +0000441 break;
442 default:
wdenke65527f2004-02-12 00:47:09 +0000443 debug ("Unkown flash vendor %d\n",
444 info->vendor);
wdenk2cefd152004-02-08 22:55:38 +0000445 break;
446 }
447
wdenke65527f2004-02-12 00:47:09 +0000448 if (flash_full_status_check
449 (info, sect, info->erase_blk_tout, "erase")) {
wdenk2cefd152004-02-08 22:55:38 +0000450 rcode = 1;
451 } else
wdenk42c05472004-03-23 22:14:11 +0000452 putc ('.');
wdenk2cefd152004-02-08 22:55:38 +0000453 }
454 }
wdenk42c05472004-03-23 22:14:11 +0000455 puts (" done\n");
wdenk2cefd152004-02-08 22:55:38 +0000456 return rcode;
457}
458
459/*-----------------------------------------------------------------------
460 */
wdenke65527f2004-02-12 00:47:09 +0000461void flash_print_info (flash_info_t * info)
wdenk2cefd152004-02-08 22:55:38 +0000462{
463 int i;
464
465 if (info->flash_id != FLASH_MAN_CFI) {
wdenk42c05472004-03-23 22:14:11 +0000466 puts ("missing or unknown FLASH type\n");
wdenk2cefd152004-02-08 22:55:38 +0000467 return;
468 }
469
wdenke65527f2004-02-12 00:47:09 +0000470 printf ("CFI conformant FLASH (%d x %d)",
471 (info->portwidth << 3), (info->chipwidth << 3));
wdenk2cefd152004-02-08 22:55:38 +0000472 printf (" Size: %ld MB in %d Sectors\n",
473 info->size >> 20, info->sector_count);
wdenke537b3b2004-02-23 23:54:43 +0000474 printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
475 info->erase_blk_tout,
476 info->write_tout,
477 info->buffer_write_tout,
478 info->buffer_size);
wdenk2cefd152004-02-08 22:55:38 +0000479
wdenk42c05472004-03-23 22:14:11 +0000480 puts (" Sector Start Addresses:");
wdenke65527f2004-02-12 00:47:09 +0000481 for (i = 0; i < info->sector_count; ++i) {
wdenk2cefd152004-02-08 22:55:38 +0000482#ifdef CFG_FLASH_EMPTY_INFO
483 int k;
484 int size;
485 int erased;
486 volatile unsigned long *flash;
487
488 /*
489 * Check if whole sector is erased
490 */
wdenke65527f2004-02-12 00:47:09 +0000491 if (i != (info->sector_count - 1))
492 size = info->start[i + 1] - info->start[i];
wdenk2cefd152004-02-08 22:55:38 +0000493 else
wdenke65527f2004-02-12 00:47:09 +0000494 size = info->start[0] + info->size - info->start[i];
wdenk2cefd152004-02-08 22:55:38 +0000495 erased = 1;
wdenke65527f2004-02-12 00:47:09 +0000496 flash = (volatile unsigned long *) info->start[i];
497 size = size >> 2; /* divide by 4 for longword access */
498 for (k = 0; k < size; k++) {
499 if (*flash++ != 0xffffffff) {
500 erased = 0;
501 break;
502 }
503 }
wdenk2cefd152004-02-08 22:55:38 +0000504
505 if ((i % 5) == 0)
506 printf ("\n");
507 /* print empty and read-only info */
508 printf (" %08lX%s%s",
509 info->start[i],
510 erased ? " E" : " ",
511 info->protect[i] ? "RO " : " ");
Wolfgang Denkd3abe5a2005-09-25 00:23:05 +0200512#else /* ! CFG_FLASH_EMPTY_INFO */
wdenk2cefd152004-02-08 22:55:38 +0000513 if ((i % 5) == 0)
514 printf ("\n ");
515 printf (" %08lX%s",
Wolfgang Denkd3abe5a2005-09-25 00:23:05 +0200516 info->start[i], info->protect[i] ? " (RO)" : " ");
wdenk2cefd152004-02-08 22:55:38 +0000517#endif
518 }
wdenk42c05472004-03-23 22:14:11 +0000519 putc ('\n');
wdenk2cefd152004-02-08 22:55:38 +0000520 return;
521}
522
523/*-----------------------------------------------------------------------
524 * Copy memory to flash, returns:
525 * 0 - OK
526 * 1 - write timeout
527 * 2 - Flash not erased
528 */
wdenke65527f2004-02-12 00:47:09 +0000529int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
wdenk2cefd152004-02-08 22:55:38 +0000530{
531 ulong wp;
532 ulong cp;
533 int aln;
534 cfiword_t cword;
535 int i, rc;
536
wdenke65527f2004-02-12 00:47:09 +0000537#ifdef CFG_FLASH_USE_BUFFER_WRITE
538 int buffered_size;
539#endif
wdenke65527f2004-02-12 00:47:09 +0000540 /* get lower aligned address */
wdenk2cefd152004-02-08 22:55:38 +0000541 /* get lower aligned address */
542 wp = (addr & ~(info->portwidth - 1));
543
544 /* handle unaligned start */
wdenke65527f2004-02-12 00:47:09 +0000545 if ((aln = addr - wp) != 0) {
wdenk2cefd152004-02-08 22:55:38 +0000546 cword.l = 0;
547 cp = wp;
wdenke65527f2004-02-12 00:47:09 +0000548 for (i = 0; i < aln; ++i, ++cp)
549 flash_add_byte (info, &cword, (*(uchar *) cp));
wdenk2cefd152004-02-08 22:55:38 +0000550
wdenke65527f2004-02-12 00:47:09 +0000551 for (; (i < info->portwidth) && (cnt > 0); i++) {
552 flash_add_byte (info, &cword, *src++);
wdenk2cefd152004-02-08 22:55:38 +0000553 cnt--;
554 cp++;
555 }
wdenke65527f2004-02-12 00:47:09 +0000556 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
557 flash_add_byte (info, &cword, (*(uchar *) cp));
558 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk2cefd152004-02-08 22:55:38 +0000559 return rc;
560 wp = cp;
561 }
562
wdenke65527f2004-02-12 00:47:09 +0000563 /* handle the aligned part */
wdenk2cefd152004-02-08 22:55:38 +0000564#ifdef CFG_FLASH_USE_BUFFER_WRITE
wdenke65527f2004-02-12 00:47:09 +0000565 buffered_size = (info->portwidth / info->chipwidth);
566 buffered_size *= info->buffer_size;
567 while (cnt >= info->portwidth) {
568 i = buffered_size > cnt ? cnt : buffered_size;
569 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
wdenk2cefd152004-02-08 22:55:38 +0000570 return rc;
Wolfgang Denke25f0522005-08-12 22:35:59 +0200571 i -= i & (info->portwidth - 1);
wdenk2cefd152004-02-08 22:55:38 +0000572 wp += i;
573 src += i;
wdenke65527f2004-02-12 00:47:09 +0000574 cnt -= i;
wdenk2cefd152004-02-08 22:55:38 +0000575 }
576#else
wdenke65527f2004-02-12 00:47:09 +0000577 while (cnt >= info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +0000578 cword.l = 0;
wdenke65527f2004-02-12 00:47:09 +0000579 for (i = 0; i < info->portwidth; i++) {
580 flash_add_byte (info, &cword, *src++);
wdenk2cefd152004-02-08 22:55:38 +0000581 }
wdenke65527f2004-02-12 00:47:09 +0000582 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
wdenk2cefd152004-02-08 22:55:38 +0000583 return rc;
584 wp += info->portwidth;
585 cnt -= info->portwidth;
586 }
587#endif /* CFG_FLASH_USE_BUFFER_WRITE */
588 if (cnt == 0) {
589 return (0);
590 }
591
592 /*
593 * handle unaligned tail bytes
594 */
595 cword.l = 0;
wdenke65527f2004-02-12 00:47:09 +0000596 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
597 flash_add_byte (info, &cword, *src++);
wdenk2cefd152004-02-08 22:55:38 +0000598 --cnt;
599 }
wdenke65527f2004-02-12 00:47:09 +0000600 for (; i < info->portwidth; ++i, ++cp) {
601 flash_add_byte (info, &cword, (*(uchar *) cp));
wdenk2cefd152004-02-08 22:55:38 +0000602 }
603
wdenke65527f2004-02-12 00:47:09 +0000604 return flash_write_cfiword (info, wp, cword);
wdenk2cefd152004-02-08 22:55:38 +0000605}
606
607/*-----------------------------------------------------------------------
608 */
609#ifdef CFG_FLASH_PROTECTION
610
wdenke65527f2004-02-12 00:47:09 +0000611int flash_real_protect (flash_info_t * info, long sector, int prot)
wdenk2cefd152004-02-08 22:55:38 +0000612{
613 int retcode = 0;
614
wdenke65527f2004-02-12 00:47:09 +0000615 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
616 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
617 if (prot)
618 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
wdenk2cefd152004-02-08 22:55:38 +0000619 else
wdenke65527f2004-02-12 00:47:09 +0000620 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
wdenk2cefd152004-02-08 22:55:38 +0000621
wdenke65527f2004-02-12 00:47:09 +0000622 if ((retcode =
623 flash_full_status_check (info, sector, info->erase_blk_tout,
624 prot ? "protect" : "unprotect")) == 0) {
wdenk2cefd152004-02-08 22:55:38 +0000625
626 info->protect[sector] = prot;
627 /* Intel's unprotect unprotects all locking */
wdenke65527f2004-02-12 00:47:09 +0000628 if (prot == 0) {
wdenk2cefd152004-02-08 22:55:38 +0000629 flash_sect_t i;
wdenke65527f2004-02-12 00:47:09 +0000630
631 for (i = 0; i < info->sector_count; i++) {
632 if (info->protect[i])
633 flash_real_protect (info, i, 1);
wdenk2cefd152004-02-08 22:55:38 +0000634 }
635 }
636 }
wdenk2cefd152004-02-08 22:55:38 +0000637 return retcode;
wdenke65527f2004-02-12 00:47:09 +0000638}
639
wdenk2cefd152004-02-08 22:55:38 +0000640/*-----------------------------------------------------------------------
641 * flash_read_user_serial - read the OneTimeProgramming cells
642 */
wdenke65527f2004-02-12 00:47:09 +0000643void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
644 int len)
wdenk2cefd152004-02-08 22:55:38 +0000645{
wdenke65527f2004-02-12 00:47:09 +0000646 uchar *src;
647 uchar *dst;
wdenk2cefd152004-02-08 22:55:38 +0000648
649 dst = buffer;
wdenke65527f2004-02-12 00:47:09 +0000650 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
651 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
652 memcpy (dst, src + offset, len);
Wolfgang Denka205a8f2005-09-25 16:41:22 +0200653 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk2cefd152004-02-08 22:55:38 +0000654}
wdenke65527f2004-02-12 00:47:09 +0000655
wdenk2cefd152004-02-08 22:55:38 +0000656/*
657 * flash_read_factory_serial - read the device Id from the protection area
658 */
wdenke65527f2004-02-12 00:47:09 +0000659void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
660 int len)
wdenk2cefd152004-02-08 22:55:38 +0000661{
wdenke65527f2004-02-12 00:47:09 +0000662 uchar *src;
wdenk6cfa84e2004-02-10 00:03:41 +0000663
wdenke65527f2004-02-12 00:47:09 +0000664 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
665 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
666 memcpy (buffer, src + offset, len);
Wolfgang Denka205a8f2005-09-25 16:41:22 +0200667 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenk2cefd152004-02-08 22:55:38 +0000668}
669
670#endif /* CFG_FLASH_PROTECTION */
671
wdenke65527f2004-02-12 00:47:09 +0000672/*
673 * flash_is_busy - check to see if the flash is busy
674 * This routine checks the status of the chip and returns true if the chip is busy
675 */
676static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
wdenk2cefd152004-02-08 22:55:38 +0000677{
678 int retval;
wdenke65527f2004-02-12 00:47:09 +0000679
680 switch (info->vendor) {
wdenk2cefd152004-02-08 22:55:38 +0000681 case CFI_CMDSET_INTEL_STANDARD:
682 case CFI_CMDSET_INTEL_EXTENDED:
wdenke65527f2004-02-12 00:47:09 +0000683 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
wdenk2cefd152004-02-08 22:55:38 +0000684 break;
685 case CFI_CMDSET_AMD_STANDARD:
686 case CFI_CMDSET_AMD_EXTENDED:
wdenke65527f2004-02-12 00:47:09 +0000687 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
wdenk2cefd152004-02-08 22:55:38 +0000688 break;
689 default:
690 retval = 0;
691 }
wdenke65527f2004-02-12 00:47:09 +0000692 debug ("flash_is_busy: %d\n", retval);
wdenk2cefd152004-02-08 22:55:38 +0000693 return retval;
694}
wdenke65527f2004-02-12 00:47:09 +0000695
wdenk2cefd152004-02-08 22:55:38 +0000696/*-----------------------------------------------------------------------
697 * wait for XSR.7 to be set. Time out with an error if it does not.
698 * This routine does not set the flash to read-array mode.
699 */
wdenke65527f2004-02-12 00:47:09 +0000700static int flash_status_check (flash_info_t * info, flash_sect_t sector,
701 ulong tout, char *prompt)
wdenk2cefd152004-02-08 22:55:38 +0000702{
703 ulong start;
704
705 /* Wait for command completion */
706 start = get_timer (0);
wdenke65527f2004-02-12 00:47:09 +0000707 while (flash_is_busy (info, sector)) {
708 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
709 printf ("Flash %s timeout at address %lx data %lx\n",
710 prompt, info->start[sector],
711 flash_read_long (info, sector, 0));
712 flash_write_cmd (info, sector, 0, info->cmd_reset);
wdenk2cefd152004-02-08 22:55:38 +0000713 return ERR_TIMOUT;
714 }
715 }
716 return ERR_OK;
717}
wdenke65527f2004-02-12 00:47:09 +0000718
wdenk2cefd152004-02-08 22:55:38 +0000719/*-----------------------------------------------------------------------
720 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
721 * This routine sets the flash to read-array mode.
722 */
wdenke65527f2004-02-12 00:47:09 +0000723static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
724 ulong tout, char *prompt)
wdenk2cefd152004-02-08 22:55:38 +0000725{
726 int retcode;
wdenke65527f2004-02-12 00:47:09 +0000727
728 retcode = flash_status_check (info, sector, tout, prompt);
729 switch (info->vendor) {
wdenk2cefd152004-02-08 22:55:38 +0000730 case CFI_CMDSET_INTEL_EXTENDED:
731 case CFI_CMDSET_INTEL_STANDARD:
wdenke65527f2004-02-12 00:47:09 +0000732 if ((retcode != ERR_OK)
733 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
wdenk2cefd152004-02-08 22:55:38 +0000734 retcode = ERR_INVAL;
wdenke65527f2004-02-12 00:47:09 +0000735 printf ("Flash %s error at address %lx\n", prompt,
736 info->start[sector]);
wdenke537b3b2004-02-23 23:54:43 +0000737 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
wdenk42c05472004-03-23 22:14:11 +0000738 puts ("Command Sequence Error.\n");
wdenke537b3b2004-02-23 23:54:43 +0000739 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
wdenk42c05472004-03-23 22:14:11 +0000740 puts ("Block Erase Error.\n");
wdenk2cefd152004-02-08 22:55:38 +0000741 retcode = ERR_NOT_ERASED;
wdenke537b3b2004-02-23 23:54:43 +0000742 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
wdenk42c05472004-03-23 22:14:11 +0000743 puts ("Locking Error\n");
wdenk2cefd152004-02-08 22:55:38 +0000744 }
wdenke65527f2004-02-12 00:47:09 +0000745 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
wdenk42c05472004-03-23 22:14:11 +0000746 puts ("Block locked.\n");
wdenke65527f2004-02-12 00:47:09 +0000747 retcode = ERR_PROTECTED;
748 }
749 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
wdenk42c05472004-03-23 22:14:11 +0000750 puts ("Vpp Low Error.\n");
wdenk2cefd152004-02-08 22:55:38 +0000751 }
Wolfgang Denka205a8f2005-09-25 16:41:22 +0200752 flash_write_cmd (info, sector, 0, info->cmd_reset);
wdenk2cefd152004-02-08 22:55:38 +0000753 break;
754 default:
755 break;
756 }
757 return retcode;
758}
wdenke65527f2004-02-12 00:47:09 +0000759
wdenk2cefd152004-02-08 22:55:38 +0000760/*-----------------------------------------------------------------------
761 */
wdenke65527f2004-02-12 00:47:09 +0000762static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
wdenk2cefd152004-02-08 22:55:38 +0000763{
wdenk369d43d2004-03-14 14:09:05 +0000764#if defined(__LITTLE_ENDIAN)
765 unsigned short w;
766 unsigned int l;
767 unsigned long long ll;
768#endif
769
wdenke65527f2004-02-12 00:47:09 +0000770 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +0000771 case FLASH_CFI_8BIT:
772 cword->c = c;
773 break;
774 case FLASH_CFI_16BIT:
wdenk369d43d2004-03-14 14:09:05 +0000775#if defined(__LITTLE_ENDIAN)
776 w = c;
777 w <<= 8;
778 cword->w = (cword->w >> 8) | w;
779#else
wdenk2cefd152004-02-08 22:55:38 +0000780 cword->w = (cword->w << 8) | c;
wdenk369d43d2004-03-14 14:09:05 +0000781#endif
wdenk2cefd152004-02-08 22:55:38 +0000782 break;
783 case FLASH_CFI_32BIT:
wdenk369d43d2004-03-14 14:09:05 +0000784#if defined(__LITTLE_ENDIAN)
785 l = c;
786 l <<= 24;
787 cword->l = (cword->l >> 8) | l;
788#else
wdenk2cefd152004-02-08 22:55:38 +0000789 cword->l = (cword->l << 8) | c;
wdenk369d43d2004-03-14 14:09:05 +0000790#endif
wdenk2cefd152004-02-08 22:55:38 +0000791 break;
792 case FLASH_CFI_64BIT:
wdenk369d43d2004-03-14 14:09:05 +0000793#if defined(__LITTLE_ENDIAN)
794 ll = c;
795 ll <<= 56;
796 cword->ll = (cword->ll >> 8) | ll;
797#else
wdenk2cefd152004-02-08 22:55:38 +0000798 cword->ll = (cword->ll << 8) | c;
wdenk369d43d2004-03-14 14:09:05 +0000799#endif
wdenk2cefd152004-02-08 22:55:38 +0000800 break;
801 }
802}
803
804
805/*-----------------------------------------------------------------------
806 * make a proper sized command based on the port and chip widths
807 */
wdenke65527f2004-02-12 00:47:09 +0000808static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
wdenk2cefd152004-02-08 22:55:38 +0000809{
810 int i;
wdenke65527f2004-02-12 00:47:09 +0000811 uchar *cp = (uchar *) cmdbuf;
812
wdenke65527f2004-02-12 00:47:09 +0000813#if defined(__LITTLE_ENDIAN)
Wolfgang Denk07bdb022005-09-24 23:32:48 +0200814 for (i = info->portwidth; i > 0; i--)
815#else
816 for (i = 1; i <= info->portwidth; i++)
wdenke65527f2004-02-12 00:47:09 +0000817#endif
Wolfgang Denk23f0d172005-10-09 00:25:58 +0200818 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
wdenk2cefd152004-02-08 22:55:38 +0000819}
820
821/*
822 * Write a proper sized command to the correct address
823 */
wdenke537b3b2004-02-23 23:54:43 +0000824static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
wdenk2cefd152004-02-08 22:55:38 +0000825{
826
827 volatile cfiptr_t addr;
828 cfiword_t cword;
wdenke65527f2004-02-12 00:47:09 +0000829
830 addr.cp = flash_make_addr (info, sect, offset);
831 flash_make_cmd (info, cmd, &cword);
832 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +0000833 case FLASH_CFI_8BIT:
wdenke65527f2004-02-12 00:47:09 +0000834 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
835 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
wdenk2cefd152004-02-08 22:55:38 +0000836 *addr.cp = cword.c;
837 break;
838 case FLASH_CFI_16BIT:
wdenke65527f2004-02-12 00:47:09 +0000839 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
840 cmd, cword.w,
wdenk2cefd152004-02-08 22:55:38 +0000841 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
842 *addr.wp = cword.w;
843 break;
844 case FLASH_CFI_32BIT:
wdenke65527f2004-02-12 00:47:09 +0000845 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
846 cmd, cword.l,
wdenk2cefd152004-02-08 22:55:38 +0000847 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
848 *addr.lp = cword.l;
849 break;
850 case FLASH_CFI_64BIT:
851#ifdef DEBUG
wdenke65527f2004-02-12 00:47:09 +0000852 {
wdenk2cefd152004-02-08 22:55:38 +0000853 char str[20];
wdenk6cfa84e2004-02-10 00:03:41 +0000854
wdenke65527f2004-02-12 00:47:09 +0000855 print_longlong (str, cword.ll);
856
857 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
858 addr.llp, cmd, str,
wdenk2cefd152004-02-08 22:55:38 +0000859 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
860 }
861#endif
862 *addr.llp = cword.ll;
863 break;
864 }
865}
866
wdenke65527f2004-02-12 00:47:09 +0000867static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
wdenk2cefd152004-02-08 22:55:38 +0000868{
wdenked2ac4b2004-03-14 18:23:55 +0000869 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
870 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
wdenk2cefd152004-02-08 22:55:38 +0000871}
wdenke65527f2004-02-12 00:47:09 +0000872
wdenk2cefd152004-02-08 22:55:38 +0000873/*-----------------------------------------------------------------------
874 */
wdenke537b3b2004-02-23 23:54:43 +0000875static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
wdenk2cefd152004-02-08 22:55:38 +0000876{
877 cfiptr_t cptr;
878 cfiword_t cword;
879 int retval;
wdenke65527f2004-02-12 00:47:09 +0000880
881 cptr.cp = flash_make_addr (info, sect, offset);
882 flash_make_cmd (info, cmd, &cword);
wdenk2cefd152004-02-08 22:55:38 +0000883
wdenke65527f2004-02-12 00:47:09 +0000884 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
885 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +0000886 case FLASH_CFI_8BIT:
wdenke65527f2004-02-12 00:47:09 +0000887 debug ("is= %x %x\n", cptr.cp[0], cword.c);
wdenk2cefd152004-02-08 22:55:38 +0000888 retval = (cptr.cp[0] == cword.c);
889 break;
890 case FLASH_CFI_16BIT:
wdenke65527f2004-02-12 00:47:09 +0000891 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
wdenk2cefd152004-02-08 22:55:38 +0000892 retval = (cptr.wp[0] == cword.w);
893 break;
894 case FLASH_CFI_32BIT:
wdenke65527f2004-02-12 00:47:09 +0000895 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
wdenk2cefd152004-02-08 22:55:38 +0000896 retval = (cptr.lp[0] == cword.l);
897 break;
898 case FLASH_CFI_64BIT:
wdenk6cfa84e2004-02-10 00:03:41 +0000899#ifdef DEBUG
wdenke65527f2004-02-12 00:47:09 +0000900 {
wdenk2cefd152004-02-08 22:55:38 +0000901 char str1[20];
902 char str2[20];
wdenke65527f2004-02-12 00:47:09 +0000903
904 print_longlong (str1, cptr.llp[0]);
905 print_longlong (str2, cword.ll);
906 debug ("is= %s %s\n", str1, str2);
wdenk2cefd152004-02-08 22:55:38 +0000907 }
908#endif
909 retval = (cptr.llp[0] == cword.ll);
910 break;
911 default:
912 retval = 0;
913 break;
914 }
915 return retval;
916}
wdenke65527f2004-02-12 00:47:09 +0000917
wdenk2cefd152004-02-08 22:55:38 +0000918/*-----------------------------------------------------------------------
919 */
wdenke537b3b2004-02-23 23:54:43 +0000920static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
wdenk2cefd152004-02-08 22:55:38 +0000921{
922 cfiptr_t cptr;
923 cfiword_t cword;
924 int retval;
wdenke65527f2004-02-12 00:47:09 +0000925
926 cptr.cp = flash_make_addr (info, sect, offset);
927 flash_make_cmd (info, cmd, &cword);
928 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +0000929 case FLASH_CFI_8BIT:
930 retval = ((cptr.cp[0] & cword.c) == cword.c);
931 break;
932 case FLASH_CFI_16BIT:
933 retval = ((cptr.wp[0] & cword.w) == cword.w);
934 break;
935 case FLASH_CFI_32BIT:
936 retval = ((cptr.lp[0] & cword.l) == cword.l);
937 break;
938 case FLASH_CFI_64BIT:
939 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
wdenke65527f2004-02-12 00:47:09 +0000940 break;
wdenk2cefd152004-02-08 22:55:38 +0000941 default:
942 retval = 0;
943 break;
944 }
945 return retval;
946}
947
948/*-----------------------------------------------------------------------
949 */
wdenke537b3b2004-02-23 23:54:43 +0000950static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
wdenk2cefd152004-02-08 22:55:38 +0000951{
952 cfiptr_t cptr;
953 cfiword_t cword;
954 int retval;
wdenke65527f2004-02-12 00:47:09 +0000955
956 cptr.cp = flash_make_addr (info, sect, offset);
957 flash_make_cmd (info, cmd, &cword);
958 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +0000959 case FLASH_CFI_8BIT:
960 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
961 break;
962 case FLASH_CFI_16BIT:
963 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
964 break;
965 case FLASH_CFI_32BIT:
966 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
967 break;
968 case FLASH_CFI_64BIT:
wdenke65527f2004-02-12 00:47:09 +0000969 retval = ((cptr.llp[0] & cword.ll) !=
970 (cptr.llp[0] & cword.ll));
wdenk2cefd152004-02-08 22:55:38 +0000971 break;
972 default:
973 retval = 0;
974 break;
975 }
976 return retval;
977}
978
979/*-----------------------------------------------------------------------
980 * detect if flash is compatible with the Common Flash Interface (CFI)
981 * http://www.jedec.org/download/search/jesd68.pdf
982 *
983*/
wdenke65527f2004-02-12 00:47:09 +0000984static int flash_detect_cfi (flash_info_t * info)
wdenk2cefd152004-02-08 22:55:38 +0000985{
wdenke65527f2004-02-12 00:47:09 +0000986 debug ("flash detect cfi\n");
wdenk2cefd152004-02-08 22:55:38 +0000987
wdenke65527f2004-02-12 00:47:09 +0000988 for (info->portwidth = FLASH_CFI_8BIT;
989 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
990 for (info->chipwidth = FLASH_CFI_BY8;
991 info->chipwidth <= info->portwidth;
992 info->chipwidth <<= 1) {
Wolfgang Denka205a8f2005-09-25 16:41:22 +0200993 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenke537b3b2004-02-23 23:54:43 +0000994 flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
995 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
996 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
997 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
998 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
wdenke65527f2004-02-12 00:47:09 +0000999 debug ("device interface is %d\n",
1000 info->interface);
1001 debug ("found port %d chip %d ",
1002 info->portwidth, info->chipwidth);
1003 debug ("port %d bits chip %d bits\n",
wdenke537b3b2004-02-23 23:54:43 +00001004 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1005 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
wdenk2cefd152004-02-08 22:55:38 +00001006 return 1;
1007 }
1008 }
1009 }
wdenke65527f2004-02-12 00:47:09 +00001010 debug ("not found\n");
wdenk2cefd152004-02-08 22:55:38 +00001011 return 0;
1012}
wdenke65527f2004-02-12 00:47:09 +00001013
wdenk2cefd152004-02-08 22:55:38 +00001014/*
1015 * The following code cannot be run from FLASH!
1016 *
1017 */
Marian Balakowicz513b4a12005-10-11 19:09:42 +02001018ulong flash_get_size (ulong base, int banknum)
wdenk2cefd152004-02-08 22:55:38 +00001019{
wdenke65527f2004-02-12 00:47:09 +00001020 flash_info_t *info = &flash_info[banknum];
wdenk2cefd152004-02-08 22:55:38 +00001021 int i, j;
1022 flash_sect_t sect_cnt;
1023 unsigned long sector;
1024 unsigned long tmp;
1025 int size_ratio;
1026 uchar num_erase_regions;
wdenke65527f2004-02-12 00:47:09 +00001027 int erase_region_size;
1028 int erase_region_count;
wdenk2cefd152004-02-08 22:55:38 +00001029
1030 info->start[0] = base;
1031
wdenke65527f2004-02-12 00:47:09 +00001032 if (flash_detect_cfi (info)) {
wdenke537b3b2004-02-23 23:54:43 +00001033 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
wdenke65527f2004-02-12 00:47:09 +00001034#ifdef DEBUG
1035 flash_printqry (info, 0);
1036#endif
1037 switch (info->vendor) {
wdenk2cefd152004-02-08 22:55:38 +00001038 case CFI_CMDSET_INTEL_STANDARD:
1039 case CFI_CMDSET_INTEL_EXTENDED:
1040 default:
1041 info->cmd_reset = FLASH_CMD_RESET;
1042 break;
1043 case CFI_CMDSET_AMD_STANDARD:
1044 case CFI_CMDSET_AMD_EXTENDED:
1045 info->cmd_reset = AMD_CMD_RESET;
1046 break;
1047 }
wdenk6cfa84e2004-02-10 00:03:41 +00001048
wdenke65527f2004-02-12 00:47:09 +00001049 debug ("manufacturer is %d\n", info->vendor);
wdenk2cefd152004-02-08 22:55:38 +00001050 size_ratio = info->portwidth / info->chipwidth;
wdenke65527f2004-02-12 00:47:09 +00001051 /* if the chip is x8/x16 reduce the ratio by half */
1052 if ((info->interface == FLASH_CFI_X8X16)
1053 && (info->chipwidth == FLASH_CFI_BY8)) {
1054 size_ratio >>= 1;
1055 }
wdenke537b3b2004-02-23 23:54:43 +00001056 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
wdenke65527f2004-02-12 00:47:09 +00001057 debug ("size_ratio %d port %d bits chip %d bits\n",
1058 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1059 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1060 debug ("found %d erase regions\n", num_erase_regions);
wdenk2cefd152004-02-08 22:55:38 +00001061 sect_cnt = 0;
1062 sector = base;
wdenke65527f2004-02-12 00:47:09 +00001063 for (i = 0; i < num_erase_regions; i++) {
1064 if (i > NUM_ERASE_REGIONS) {
wdenke537b3b2004-02-23 23:54:43 +00001065 printf ("%d erase regions found, only %d used\n",
1066 num_erase_regions, NUM_ERASE_REGIONS);
wdenk2cefd152004-02-08 22:55:38 +00001067 break;
1068 }
wdenke65527f2004-02-12 00:47:09 +00001069 tmp = flash_read_long (info, 0,
1070 FLASH_OFFSET_ERASE_REGIONS +
1071 i * 4);
1072 erase_region_size =
1073 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
wdenk2cefd152004-02-08 22:55:38 +00001074 tmp >>= 16;
wdenke65527f2004-02-12 00:47:09 +00001075 erase_region_count = (tmp & 0xffff) + 1;
wdenkaeba06f2004-06-09 17:34:58 +00001076 debug ("erase_region_count = %d erase_region_size = %d\n",
wdenke537b3b2004-02-23 23:54:43 +00001077 erase_region_count, erase_region_size);
wdenke65527f2004-02-12 00:47:09 +00001078 for (j = 0; j < erase_region_count; j++) {
wdenk2cefd152004-02-08 22:55:38 +00001079 info->start[sect_cnt] = sector;
1080 sector += (erase_region_size * size_ratio);
wdenk26c58432005-01-09 17:12:27 +00001081
1082 /*
1083 * Only read protection status from supported devices (intel...)
1084 */
1085 switch (info->vendor) {
1086 case CFI_CMDSET_INTEL_EXTENDED:
1087 case CFI_CMDSET_INTEL_STANDARD:
1088 info->protect[sect_cnt] =
1089 flash_isset (info, sect_cnt,
1090 FLASH_OFFSET_PROTECT,
1091 FLASH_STATUS_PROTECT);
1092 break;
1093 default:
1094 info->protect[sect_cnt] = 0; /* default: not protected */
1095 }
1096
wdenk2cefd152004-02-08 22:55:38 +00001097 sect_cnt++;
1098 }
1099 }
1100
1101 info->sector_count = sect_cnt;
1102 /* multiply the size by the number of chips */
wdenke537b3b2004-02-23 23:54:43 +00001103 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1104 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
wdenke65527f2004-02-12 00:47:09 +00001105 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
wdenke537b3b2004-02-23 23:54:43 +00001106 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
wdenke65527f2004-02-12 00:47:09 +00001107 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
wdenke537b3b2004-02-23 23:54:43 +00001108 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
wdenke65527f2004-02-12 00:47:09 +00001109 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
wdenke537b3b2004-02-23 23:54:43 +00001110 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
wdenk2cefd152004-02-08 22:55:38 +00001111 info->flash_id = FLASH_MAN_CFI;
wdenked2ac4b2004-03-14 18:23:55 +00001112 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1113 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1114 }
wdenk2cefd152004-02-08 22:55:38 +00001115 }
1116
Wolfgang Denka205a8f2005-09-25 16:41:22 +02001117 flash_write_cmd (info, 0, 0, info->cmd_reset);
wdenke65527f2004-02-12 00:47:09 +00001118 return (info->size);
wdenk2cefd152004-02-08 22:55:38 +00001119}
1120
1121
1122/*-----------------------------------------------------------------------
1123 */
wdenke65527f2004-02-12 00:47:09 +00001124static int flash_write_cfiword (flash_info_t * info, ulong dest,
1125 cfiword_t cword)
wdenk2cefd152004-02-08 22:55:38 +00001126{
1127
1128 cfiptr_t ctladdr;
1129 cfiptr_t cptr;
1130 int flag;
1131
wdenke65527f2004-02-12 00:47:09 +00001132 ctladdr.cp = flash_make_addr (info, 0, 0);
1133 cptr.cp = (uchar *) dest;
wdenk2cefd152004-02-08 22:55:38 +00001134
1135
1136 /* Check if Flash is (sufficiently) erased */
wdenke65527f2004-02-12 00:47:09 +00001137 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +00001138 case FLASH_CFI_8BIT:
1139 flag = ((cptr.cp[0] & cword.c) == cword.c);
1140 break;
1141 case FLASH_CFI_16BIT:
1142 flag = ((cptr.wp[0] & cword.w) == cword.w);
1143 break;
1144 case FLASH_CFI_32BIT:
wdenke65527f2004-02-12 00:47:09 +00001145 flag = ((cptr.lp[0] & cword.l) == cword.l);
wdenk2cefd152004-02-08 22:55:38 +00001146 break;
1147 case FLASH_CFI_64BIT:
wdenk391b5742004-10-10 23:27:33 +00001148 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
wdenk2cefd152004-02-08 22:55:38 +00001149 break;
1150 default:
1151 return 2;
1152 }
wdenke65527f2004-02-12 00:47:09 +00001153 if (!flag)
wdenk2cefd152004-02-08 22:55:38 +00001154 return 2;
1155
1156 /* Disable interrupts which might cause a timeout here */
wdenke65527f2004-02-12 00:47:09 +00001157 flag = disable_interrupts ();
wdenk2cefd152004-02-08 22:55:38 +00001158
wdenke65527f2004-02-12 00:47:09 +00001159 switch (info->vendor) {
wdenk2cefd152004-02-08 22:55:38 +00001160 case CFI_CMDSET_INTEL_EXTENDED:
1161 case CFI_CMDSET_INTEL_STANDARD:
wdenke65527f2004-02-12 00:47:09 +00001162 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1163 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
wdenk2cefd152004-02-08 22:55:38 +00001164 break;
1165 case CFI_CMDSET_AMD_EXTENDED:
1166 case CFI_CMDSET_AMD_STANDARD:
wdenke65527f2004-02-12 00:47:09 +00001167 flash_unlock_seq (info, 0);
wdenked2ac4b2004-03-14 18:23:55 +00001168 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
wdenk2cefd152004-02-08 22:55:38 +00001169 break;
1170 }
1171
wdenke65527f2004-02-12 00:47:09 +00001172 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +00001173 case FLASH_CFI_8BIT:
1174 cptr.cp[0] = cword.c;
1175 break;
1176 case FLASH_CFI_16BIT:
1177 cptr.wp[0] = cword.w;
1178 break;
1179 case FLASH_CFI_32BIT:
1180 cptr.lp[0] = cword.l;
1181 break;
1182 case FLASH_CFI_64BIT:
1183 cptr.llp[0] = cword.ll;
1184 break;
1185 }
1186
1187 /* re-enable interrupts if necessary */
wdenke65527f2004-02-12 00:47:09 +00001188 if (flag)
1189 enable_interrupts ();
wdenk2cefd152004-02-08 22:55:38 +00001190
wdenke65527f2004-02-12 00:47:09 +00001191 return flash_full_status_check (info, 0, info->write_tout, "write");
wdenk2cefd152004-02-08 22:55:38 +00001192}
1193
1194#ifdef CFG_FLASH_USE_BUFFER_WRITE
1195
1196/* loop through the sectors from the highest address
1197 * when the passed address is greater or equal to the sector address
1198 * we have a match
1199 */
wdenke65527f2004-02-12 00:47:09 +00001200static flash_sect_t find_sector (flash_info_t * info, ulong addr)
wdenk2cefd152004-02-08 22:55:38 +00001201{
1202 flash_sect_t sector;
wdenke65527f2004-02-12 00:47:09 +00001203
1204 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1205 if (addr >= info->start[sector])
wdenk2cefd152004-02-08 22:55:38 +00001206 break;
1207 }
1208 return sector;
1209}
1210
wdenke65527f2004-02-12 00:47:09 +00001211static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1212 int len)
wdenk2cefd152004-02-08 22:55:38 +00001213{
1214 flash_sect_t sector;
1215 int cnt;
1216 int retcode;
1217 volatile cfiptr_t src;
1218 volatile cfiptr_t dst;
wdenked2ac4b2004-03-14 18:23:55 +00001219 /* buffered writes in the AMD chip set is not supported yet */
1220 if((info->vendor == CFI_CMDSET_AMD_STANDARD) ||
1221 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1222 return ERR_INVAL;
wdenk2cefd152004-02-08 22:55:38 +00001223
1224 src.cp = cp;
wdenke65527f2004-02-12 00:47:09 +00001225 dst.cp = (uchar *) dest;
1226 sector = find_sector (info, dest);
1227 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1228 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1229 if ((retcode =
1230 flash_status_check (info, sector, info->buffer_write_tout,
1231 "write to buffer")) == ERR_OK) {
1232 /* reduce the number of loops by the width of the port */
1233 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +00001234 case FLASH_CFI_8BIT:
1235 cnt = len;
1236 break;
1237 case FLASH_CFI_16BIT:
1238 cnt = len >> 1;
1239 break;
1240 case FLASH_CFI_32BIT:
1241 cnt = len >> 2;
1242 break;
1243 case FLASH_CFI_64BIT:
1244 cnt = len >> 3;
1245 break;
1246 default:
1247 return ERR_INVAL;
1248 break;
1249 }
wdenke65527f2004-02-12 00:47:09 +00001250 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1251 while (cnt-- > 0) {
1252 switch (info->portwidth) {
wdenk2cefd152004-02-08 22:55:38 +00001253 case FLASH_CFI_8BIT:
1254 *dst.cp++ = *src.cp++;
1255 break;
1256 case FLASH_CFI_16BIT:
1257 *dst.wp++ = *src.wp++;
1258 break;
1259 case FLASH_CFI_32BIT:
1260 *dst.lp++ = *src.lp++;
1261 break;
1262 case FLASH_CFI_64BIT:
1263 *dst.llp++ = *src.llp++;
1264 break;
1265 default:
1266 return ERR_INVAL;
1267 break;
1268 }
1269 }
wdenke65527f2004-02-12 00:47:09 +00001270 flash_write_cmd (info, sector, 0,
1271 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1272 retcode =
1273 flash_full_status_check (info, sector,
1274 info->buffer_write_tout,
1275 "buffer write");
wdenk2cefd152004-02-08 22:55:38 +00001276 }
wdenke65527f2004-02-12 00:47:09 +00001277 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
wdenk2cefd152004-02-08 22:55:38 +00001278 return retcode;
1279}
wdenk5b835a32004-09-28 19:00:19 +00001280#endif /* CFG_FLASH_USE_BUFFER_WRITE */
wdenk2cefd152004-02-08 22:55:38 +00001281#endif /* CFG_FLASH_CFI */