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git01.mediatek.com / filogic / uboot / c5317315cea42cadb4e00aa2dc0be8f6f83bad7e / . / arch / arm / dts / tegra186.dtsi
blob: 650feb60b1aba5078b6d6ebb6f9e18b2da11dcc6 [file] [log] [blame]
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]1#include "skeleton.dtsi"
Stephen Warren0a6002f2016-07-18 12:15:03 -0600[diff] [blame]2#include <dt-bindings/gpio/tegra186-gpio.h>
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]3#include <dt-bindings/interrupt-controller/arm-gic.h>
Stephen Warrenc5317312016-07-27 15:24:49 -0600[diff] [blame^]4#include <dt-bindings/mailbox/tegra186-hsp.h>
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]5
6/ {
7 compatible = "nvidia,tegra186";
8 #address-cells = <2>;
9 #size-cells = <2>;
10
11 gpio@2200000 {
12 compatible = "nvidia,tegra186-gpio";
13 reg-names = "security", "gpio";
14 reg =
15 <0x0 0x2200000 0x0 0x10000>,
16 <0x0 0x2210000 0x0 0x10000>;
17 interrupts =
18 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
19 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
20 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
21 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
22 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
23 <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
24 gpio-controller;
25 #gpio-cells = <2>;
26 interrupt-controller;
27 #interrupt-cells = <2>;
28 };
29
30 uarta: serial@3100000 {
31 compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
32 reg = <0x0 0x03100000 0x0 0x10000>;
33 reg-shift = <2>;
34 status = "disabled";
35 };
36
37 sdhci@3460000 {
38 compatible = "nvidia,tegra186-sdhci";
39 reg = <0x0 0x03460000 0x0 0x200>;
40 interrupts = <GIC_SPI 31 0x04>;
41 status = "disabled";
42 };
43
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]44 hsp: hsp@3c00000 {
45 compatible = "nvidia,tegra186-hsp";
46 reg = <0x0 0x03c00000 0x0 0xa0000>;
47 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
Stephen Warrenc5317312016-07-27 15:24:49 -0600[diff] [blame^]48 interrupt-names = "doorbell";
49 #mbox-cells = <2>;
Stephen Warrene0e2b262016-06-17 09:43:57 -0600[diff] [blame]50 };
51
Stephen Warren03667eb2016-05-12 13:32:55 -0600[diff] [blame]52 gpio@c2f0000 {
53 compatible = "nvidia,tegra186-gpio-aon";
54 reg-names = "security", "gpio";
55 reg =
56 <0x0 0xc2f0000 0x0 0x1000>,
57 <0x0 0xc2f1000 0x0 0x1000>;
58 interrupts =
59 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
60 gpio-controller;
61 #gpio-cells = <2>;
62 interrupt-controller;
63 #interrupt-cells = <2>;
64 };
65};