ARM: tegra: add core Tegra186 support
This adds the bare minimum code to support Tegra186, with UART and eMMC
working.
The empty gpio.h is required because <asm/gpio.h> includes it. A future
cleanup round may be able to solve this for all Tegra generations at once.
mach-tegra/Makefile is adjusted not to compile anything for Tegra186, but
instead to defer everything to mach-tegra/tegra186/Makefile. This allows
the SoC code to pick-and-choose which of the C files in the "common"
mach-tegra/ directory to compile in based on the SoC's needs. Most of the
code is not valid for Tegra186, and this approach removes the need for
mach-tegra/Makefile to contain many SoC-specific ifdefs. This approach
may be applied to all other Tegra SoCs in a future cleanup round.
board186.c is introduced to replace board.c and board2.c. These files
currently contain a slew of SoC- and board-specific code that is not
valid for Tegra186. This approach avoids adding yet more ifdefs to those
files. A future cleanup round may refactor most of board*.c into board-/
SoC-specific functions files thus allowing the top-level functions like
board_init_early_f to be shared again.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
new file mode 100644
index 0000000..18b6a26
--- /dev/null
+++ b/arch/arm/dts/tegra186.dtsi
@@ -0,0 +1,56 @@
+#include "skeleton.dtsi"
+#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "nvidia,tegra186";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ gpio@2200000 {
+ compatible = "nvidia,tegra186-gpio";
+ reg-names = "security", "gpio";
+ reg =
+ <0x0 0x2200000 0x0 0x10000>,
+ <0x0 0x2210000 0x0 0x10000>;
+ interrupts =
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ uarta: serial@3100000 {
+ compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart";
+ reg = <0x0 0x03100000 0x0 0x10000>;
+ reg-shift = <2>;
+ status = "disabled";
+ };
+
+ sdhci@3460000 {
+ compatible = "nvidia,tegra186-sdhci";
+ reg = <0x0 0x03460000 0x0 0x200>;
+ interrupts = <GIC_SPI 31 0x04>;
+ status = "disabled";
+ };
+
+ gpio@c2f0000 {
+ compatible = "nvidia,tegra186-gpio-aon";
+ reg-names = "security", "gpio";
+ reg =
+ <0x0 0xc2f0000 0x0 0x1000>,
+ <0x0 0xc2f1000 0x0 0x1000>;
+ interrupts =
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+};