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wdenk4a5c8a72003-03-06 00:02:04 +00001/*
2 * (C) Copyright 2000
3 * Paolo Scaffardi, AIRVENT SAM s.p.a - RIMINI(ITALY), arsenio@tin.it
4 *
5 * (C) Copyright 2000 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
6 * Marius Groeger <mgroeger@sysgo.de>
7 *
8 * (C) Copyright 2003 Pengutronix e.K.
9 * Robert Schwebel <r.schwebel@pengutronix.de>
10 *
Lei Wena41374b42011-04-13 23:48:31 +053011 * (C) Copyright 2011 Marvell Inc.
12 * Lei Wen <leiwen@marvell.com>
13 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020014 * SPDX-License-Identifier: GPL-2.0+
wdenk4a5c8a72003-03-06 00:02:04 +000015 *
16 * Back ported to the 8xx platform (from the 8260 platform) by
17 * Murray.Jensen@cmst.csiro.au, 27-Jan-01.
18 */
19
wdenk4a5c8a72003-03-06 00:02:04 +000020#include <common.h>
Stefan Roese8c3ba152016-09-16 15:07:52 +020021#include <dm.h>
wdenk4a5c8a72003-03-06 00:02:04 +000022#include <i2c.h>
Stefan Roese90ddbb92016-09-16 15:07:51 +020023#include <asm/io.h>
Lei Wena41374b42011-04-13 23:48:31 +053024#include "mv_i2c.h"
wdenk4a5c8a72003-03-06 00:02:04 +000025
wdenk4a5c8a72003-03-06 00:02:04 +000026/* All transfers are described by this data structure */
Simon Glassd5ff0b92015-02-05 21:41:33 -070027struct mv_i2c_msg {
wdenk4a5c8a72003-03-06 00:02:04 +000028 u8 condition;
wdenk57b2d802003-06-27 21:31:46 +000029 u8 acknack;
30 u8 direction;
wdenk4a5c8a72003-03-06 00:02:04 +000031 u8 data;
32};
33
Stefan Roese8c3ba152016-09-16 15:07:52 +020034#ifdef CONFIG_ARMADA_3700
35/* Armada 3700 has no padding between the registers */
Lei Wena41374b42011-04-13 23:48:31 +053036struct mv_i2c {
37 u32 ibmr;
Stefan Roese8c3ba152016-09-16 15:07:52 +020038 u32 idbr;
39 u32 icr;
40 u32 isr;
41 u32 isar;
42};
43#else
44struct mv_i2c {
45 u32 ibmr;
Lei Wena41374b42011-04-13 23:48:31 +053046 u32 pad0;
47 u32 idbr;
48 u32 pad1;
49 u32 icr;
50 u32 pad2;
51 u32 isr;
52 u32 pad3;
53 u32 isar;
54};
Stefan Roese8c3ba152016-09-16 15:07:52 +020055#endif
56
57/*
58 * Dummy implementation that can be overwritten by a board
59 * specific function
60 */
61__weak void i2c_clk_enable(void)
62{
63}
Lei Wena41374b42011-04-13 23:48:31 +053064
Lei Wend3ae17b2011-04-13 23:48:16 +053065/*
Lei Wena41374b42011-04-13 23:48:31 +053066 * i2c_reset: - reset the host controller
wdenk4a5c8a72003-03-06 00:02:04 +000067 *
68 */
Stefan Roese90ddbb92016-09-16 15:07:51 +020069static void i2c_reset(struct mv_i2c *base)
wdenk4a5c8a72003-03-06 00:02:04 +000070{
Stefan Roese2b9a8382016-09-16 15:07:53 +020071 u32 icr_mode;
72
73 /* Save bus mode (standard or fast speed) for later use */
74 icr_mode = readl(&base->icr) & ICR_MODE_MASK;
Lei Wena41374b42011-04-13 23:48:31 +053075 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
76 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */
wdenk57b2d802003-06-27 21:31:46 +000077 udelay(100);
Lei Wena41374b42011-04-13 23:48:31 +053078 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */
79
80 i2c_clk_enable();
81
82 writel(CONFIG_SYS_I2C_SLAVE, &base->isar); /* set our slave address */
Stefan Roese2b9a8382016-09-16 15:07:53 +020083 /* set control reg values */
84 writel(I2C_ICR_INIT | icr_mode, &base->icr);
Lei Wena41374b42011-04-13 23:48:31 +053085 writel(I2C_ISR_INIT, &base->isr); /* set clear interrupt bits */
86 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */
wdenk57b2d802003-06-27 21:31:46 +000087 udelay(100);
wdenk4a5c8a72003-03-06 00:02:04 +000088}
89
Lei Wend3ae17b2011-04-13 23:48:16 +053090/*
wdenk57b2d802003-06-27 21:31:46 +000091 * i2c_isr_set_cleared: - wait until certain bits of the I2C status register
wdenk4a5c8a72003-03-06 00:02:04 +000092 * are set and cleared
93 *
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +010094 * @return: 1 in case of success, 0 means timeout (no match within 10 ms).
wdenk4a5c8a72003-03-06 00:02:04 +000095 */
Stefan Roese90ddbb92016-09-16 15:07:51 +020096static int i2c_isr_set_cleared(struct mv_i2c *base, unsigned long set_mask,
Lei Wend3ae17b2011-04-13 23:48:16 +053097 unsigned long cleared_mask)
wdenk4a5c8a72003-03-06 00:02:04 +000098{
Lei Wena41374b42011-04-13 23:48:31 +053099 int timeout = 1000, isr;
wdenk4a5c8a72003-03-06 00:02:04 +0000100
Lei Wena41374b42011-04-13 23:48:31 +0530101 do {
102 isr = readl(&base->isr);
Lei Wend3ae17b2011-04-13 23:48:16 +0530103 udelay(10);
104 if (timeout-- < 0)
105 return 0;
Lei Wena41374b42011-04-13 23:48:31 +0530106 } while (((isr & set_mask) != set_mask)
107 || ((isr & cleared_mask) != 0));
wdenk4a5c8a72003-03-06 00:02:04 +0000108
wdenk57b2d802003-06-27 21:31:46 +0000109 return 1;
wdenk4a5c8a72003-03-06 00:02:04 +0000110}
111
Lei Wend3ae17b2011-04-13 23:48:16 +0530112/*
wdenk4a5c8a72003-03-06 00:02:04 +0000113 * i2c_transfer: - Transfer one byte over the i2c bus
114 *
wdenk57b2d802003-06-27 21:31:46 +0000115 * This function can tranfer a byte over the i2c bus in both directions.
116 * It is used by the public API functions.
wdenk4a5c8a72003-03-06 00:02:04 +0000117 *
118 * @return: 0: transfer successful
119 * -1: message is empty
120 * -2: transmit timeout
121 * -3: ACK missing
122 * -4: receive timeout
123 * -5: illegal parameters
124 * -6: bus is busy and couldn't be aquired
wdenk57b2d802003-06-27 21:31:46 +0000125 */
Stefan Roese90ddbb92016-09-16 15:07:51 +0200126static int i2c_transfer(struct mv_i2c *base, struct mv_i2c_msg *msg)
wdenk4a5c8a72003-03-06 00:02:04 +0000127{
128 int ret;
129
wdenk57b2d802003-06-27 21:31:46 +0000130 if (!msg)
wdenk4a5c8a72003-03-06 00:02:04 +0000131 goto transfer_error_msg_empty;
132
Lei Wend3ae17b2011-04-13 23:48:16 +0530133 switch (msg->direction) {
wdenk4a5c8a72003-03-06 00:02:04 +0000134 case I2C_WRITE:
wdenk4a5c8a72003-03-06 00:02:04 +0000135 /* check if bus is not busy */
Stefan Roese90ddbb92016-09-16 15:07:51 +0200136 if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
wdenk4a5c8a72003-03-06 00:02:04 +0000137 goto transfer_error_bus_busy;
138
139 /* start transmission */
Lei Wena41374b42011-04-13 23:48:31 +0530140 writel(readl(&base->icr) & ~ICR_START, &base->icr);
141 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
142 writel(msg->data, &base->idbr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200143 if (msg->condition == I2C_COND_START)
Lei Wena41374b42011-04-13 23:48:31 +0530144 writel(readl(&base->icr) | ICR_START, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200145 if (msg->condition == I2C_COND_STOP)
Lei Wena41374b42011-04-13 23:48:31 +0530146 writel(readl(&base->icr) | ICR_STOP, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200147 if (msg->acknack == I2C_ACKNAK_SENDNAK)
Lei Wena41374b42011-04-13 23:48:31 +0530148 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200149 if (msg->acknack == I2C_ACKNAK_SENDACK)
Lei Wena41374b42011-04-13 23:48:31 +0530150 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
151 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
152 writel(readl(&base->icr) | ICR_TB, &base->icr);
wdenk4a5c8a72003-03-06 00:02:04 +0000153
154 /* transmit register empty? */
Stefan Roese90ddbb92016-09-16 15:07:51 +0200155 if (!i2c_isr_set_cleared(base, ISR_ITE, 0))
wdenk4a5c8a72003-03-06 00:02:04 +0000156 goto transfer_error_transmit_timeout;
157
158 /* clear 'transmit empty' state */
Lei Wena41374b42011-04-13 23:48:31 +0530159 writel(readl(&base->isr) | ISR_ITE, &base->isr);
wdenk4a5c8a72003-03-06 00:02:04 +0000160
161 /* wait for ACK from slave */
162 if (msg->acknack == I2C_ACKNAK_WAITACK)
Stefan Roese90ddbb92016-09-16 15:07:51 +0200163 if (!i2c_isr_set_cleared(base, 0, ISR_ACKNAK))
wdenk4a5c8a72003-03-06 00:02:04 +0000164 goto transfer_error_ack_missing;
165 break;
166
167 case I2C_READ:
168
169 /* check if bus is not busy */
Stefan Roese90ddbb92016-09-16 15:07:51 +0200170 if (!i2c_isr_set_cleared(base, 0, ISR_IBB))
wdenk4a5c8a72003-03-06 00:02:04 +0000171 goto transfer_error_bus_busy;
172
173 /* start receive */
Lei Wena41374b42011-04-13 23:48:31 +0530174 writel(readl(&base->icr) & ~ICR_START, &base->icr);
175 writel(readl(&base->icr) & ~ICR_STOP, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200176 if (msg->condition == I2C_COND_START)
Lei Wena41374b42011-04-13 23:48:31 +0530177 writel(readl(&base->icr) | ICR_START, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200178 if (msg->condition == I2C_COND_STOP)
Lei Wena41374b42011-04-13 23:48:31 +0530179 writel(readl(&base->icr) | ICR_STOP, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200180 if (msg->acknack == I2C_ACKNAK_SENDNAK)
Lei Wena41374b42011-04-13 23:48:31 +0530181 writel(readl(&base->icr) | ICR_ACKNAK, &base->icr);
Marek Vasut2db1e962010-09-09 09:50:39 +0200182 if (msg->acknack == I2C_ACKNAK_SENDACK)
Lei Wena41374b42011-04-13 23:48:31 +0530183 writel(readl(&base->icr) & ~ICR_ACKNAK, &base->icr);
184 writel(readl(&base->icr) & ~ICR_ALDIE, &base->icr);
185 writel(readl(&base->icr) | ICR_TB, &base->icr);
wdenk4a5c8a72003-03-06 00:02:04 +0000186
187 /* receive register full? */
Stefan Roese90ddbb92016-09-16 15:07:51 +0200188 if (!i2c_isr_set_cleared(base, ISR_IRF, 0))
wdenk57b2d802003-06-27 21:31:46 +0000189 goto transfer_error_receive_timeout;
wdenk4a5c8a72003-03-06 00:02:04 +0000190
Lei Wena41374b42011-04-13 23:48:31 +0530191 msg->data = readl(&base->idbr);
wdenk4a5c8a72003-03-06 00:02:04 +0000192
193 /* clear 'receive empty' state */
Lei Wena41374b42011-04-13 23:48:31 +0530194 writel(readl(&base->isr) | ISR_IRF, &base->isr);
wdenk4a5c8a72003-03-06 00:02:04 +0000195 break;
wdenk4a5c8a72003-03-06 00:02:04 +0000196 default:
wdenk4a5c8a72003-03-06 00:02:04 +0000197 goto transfer_error_illegal_param;
wdenk4a5c8a72003-03-06 00:02:04 +0000198 }
199
wdenk57b2d802003-06-27 21:31:46 +0000200 return 0;
wdenk4a5c8a72003-03-06 00:02:04 +0000201
wdenk57b2d802003-06-27 21:31:46 +0000202transfer_error_msg_empty:
Stefan Roese51968552016-09-16 15:07:49 +0200203 debug("i2c_transfer: error: 'msg' is empty\n");
204 ret = -1;
205 goto i2c_transfer_finish;
wdenk4a5c8a72003-03-06 00:02:04 +0000206
207transfer_error_transmit_timeout:
Stefan Roese51968552016-09-16 15:07:49 +0200208 debug("i2c_transfer: error: transmit timeout\n");
209 ret = -2;
210 goto i2c_transfer_finish;
wdenk4a5c8a72003-03-06 00:02:04 +0000211
212transfer_error_ack_missing:
Stefan Roese51968552016-09-16 15:07:49 +0200213 debug("i2c_transfer: error: ACK missing\n");
214 ret = -3;
215 goto i2c_transfer_finish;
wdenk4a5c8a72003-03-06 00:02:04 +0000216
217transfer_error_receive_timeout:
Stefan Roese51968552016-09-16 15:07:49 +0200218 debug("i2c_transfer: error: receive timeout\n");
219 ret = -4;
220 goto i2c_transfer_finish;
wdenk4a5c8a72003-03-06 00:02:04 +0000221
222transfer_error_illegal_param:
Stefan Roese51968552016-09-16 15:07:49 +0200223 debug("i2c_transfer: error: illegal parameters\n");
224 ret = -5;
225 goto i2c_transfer_finish;
wdenk4a5c8a72003-03-06 00:02:04 +0000226
227transfer_error_bus_busy:
Stefan Roese51968552016-09-16 15:07:49 +0200228 debug("i2c_transfer: error: bus is busy\n");
229 ret = -6;
230 goto i2c_transfer_finish;
wdenk4a5c8a72003-03-06 00:02:04 +0000231
232i2c_transfer_finish:
Stefan Roese51968552016-09-16 15:07:49 +0200233 debug("i2c_transfer: ISR: 0x%04x\n", readl(&base->isr));
Stefan Roese90ddbb92016-09-16 15:07:51 +0200234 i2c_reset(base);
Stefan Roese51968552016-09-16 15:07:49 +0200235 return ret;
wdenk4a5c8a72003-03-06 00:02:04 +0000236}
237
Stefan Roese8c3ba152016-09-16 15:07:52 +0200238static int __i2c_read(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
Stefan Roese90ddbb92016-09-16 15:07:51 +0200239 uchar *buffer, int len)
wdenk4a5c8a72003-03-06 00:02:04 +0000240{
Simon Glassd5ff0b92015-02-05 21:41:33 -0700241 struct mv_i2c_msg msg;
wdenk4a5c8a72003-03-06 00:02:04 +0000242
Stefan Roese51968552016-09-16 15:07:49 +0200243 debug("i2c_read(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
Stefan Roese8c3ba152016-09-16 15:07:52 +0200244 "len=0x%02x)\n", chip, *addr, alen, len);
wdenk4a5c8a72003-03-06 00:02:04 +0000245
jinghua2bbee3e2016-09-16 15:07:54 +0200246 if (len == 0) {
247 printf("reading zero byte is invalid\n");
248 return -EINVAL;
249 }
250
Stefan Roese90ddbb92016-09-16 15:07:51 +0200251 i2c_reset(base);
wdenk4a5c8a72003-03-06 00:02:04 +0000252
253 /* dummy chip address write */
Stefan Roese51968552016-09-16 15:07:49 +0200254 debug("i2c_read: dummy chip address write\n");
wdenk4a5c8a72003-03-06 00:02:04 +0000255 msg.condition = I2C_COND_START;
256 msg.acknack = I2C_ACKNAK_WAITACK;
257 msg.direction = I2C_WRITE;
Lei Wend3ae17b2011-04-13 23:48:16 +0530258 msg.data = (chip << 1);
259 msg.data &= 0xFE;
Stefan Roese90ddbb92016-09-16 15:07:51 +0200260 if (i2c_transfer(base, &msg))
Lei Wend3ae17b2011-04-13 23:48:16 +0530261 return -1;
wdenk57b2d802003-06-27 21:31:46 +0000262
wdenk4a5c8a72003-03-06 00:02:04 +0000263 /*
wdenk57b2d802003-06-27 21:31:46 +0000264 * send memory address bytes;
265 * alen defines how much bytes we have to send.
wdenk4a5c8a72003-03-06 00:02:04 +0000266 */
wdenk4a5c8a72003-03-06 00:02:04 +0000267 while (--alen >= 0) {
Stefan Roese8c3ba152016-09-16 15:07:52 +0200268 debug("i2c_read: send address byte %02x (alen=%d)\n",
269 *addr, alen);
wdenk4a5c8a72003-03-06 00:02:04 +0000270 msg.condition = I2C_COND_NORMAL;
271 msg.acknack = I2C_ACKNAK_WAITACK;
272 msg.direction = I2C_WRITE;
Bradley Bolen36c4a7c2016-12-13 12:49:53 -0500273 msg.data = addr[alen];
Stefan Roese90ddbb92016-09-16 15:07:51 +0200274 if (i2c_transfer(base, &msg))
Lei Wend3ae17b2011-04-13 23:48:16 +0530275 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000276 }
wdenk57b2d802003-06-27 21:31:46 +0000277
wdenk4a5c8a72003-03-06 00:02:04 +0000278 /* start read sequence */
Stefan Roese51968552016-09-16 15:07:49 +0200279 debug("i2c_read: start read sequence\n");
wdenk4a5c8a72003-03-06 00:02:04 +0000280 msg.condition = I2C_COND_START;
281 msg.acknack = I2C_ACKNAK_WAITACK;
282 msg.direction = I2C_WRITE;
283 msg.data = (chip << 1);
284 msg.data |= 0x01;
Stefan Roese90ddbb92016-09-16 15:07:51 +0200285 if (i2c_transfer(base, &msg))
Lei Wend3ae17b2011-04-13 23:48:16 +0530286 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000287
288 /* read bytes; send NACK at last byte */
289 while (len--) {
Lei Wend3ae17b2011-04-13 23:48:16 +0530290 if (len == 0) {
wdenk4a5c8a72003-03-06 00:02:04 +0000291 msg.condition = I2C_COND_STOP;
292 msg.acknack = I2C_ACKNAK_SENDNAK;
293 } else {
294 msg.condition = I2C_COND_NORMAL;
295 msg.acknack = I2C_ACKNAK_SENDACK;
296 }
297
298 msg.direction = I2C_READ;
299 msg.data = 0x00;
Stefan Roese90ddbb92016-09-16 15:07:51 +0200300 if (i2c_transfer(base, &msg))
Lei Wend3ae17b2011-04-13 23:48:16 +0530301 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000302
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100303 *buffer = msg.data;
Stefan Roese8c3ba152016-09-16 15:07:52 +0200304 debug("i2c_read: reading byte (%p)=0x%02x\n",
305 buffer, *buffer);
Markus Klotzbuecher7cf18be2006-03-24 12:23:27 +0100306 buffer++;
wdenk4a5c8a72003-03-06 00:02:04 +0000307 }
308
Stefan Roese90ddbb92016-09-16 15:07:51 +0200309 i2c_reset(base);
wdenk4a5c8a72003-03-06 00:02:04 +0000310
311 return 0;
312}
313
Stefan Roese8c3ba152016-09-16 15:07:52 +0200314static int __i2c_write(struct mv_i2c *base, uchar chip, u8 *addr, int alen,
Stefan Roese90ddbb92016-09-16 15:07:51 +0200315 uchar *buffer, int len)
wdenk4a5c8a72003-03-06 00:02:04 +0000316{
Simon Glassd5ff0b92015-02-05 21:41:33 -0700317 struct mv_i2c_msg msg;
wdenk4a5c8a72003-03-06 00:02:04 +0000318
Stefan Roese51968552016-09-16 15:07:49 +0200319 debug("i2c_write(chip=0x%02x, addr=0x%02x, alen=0x%02x, "
Stefan Roese8c3ba152016-09-16 15:07:52 +0200320 "len=0x%02x)\n", chip, *addr, alen, len);
wdenk4a5c8a72003-03-06 00:02:04 +0000321
Stefan Roese90ddbb92016-09-16 15:07:51 +0200322 i2c_reset(base);
wdenk4a5c8a72003-03-06 00:02:04 +0000323
324 /* chip address write */
Stefan Roese51968552016-09-16 15:07:49 +0200325 debug("i2c_write: chip address write\n");
wdenk4a5c8a72003-03-06 00:02:04 +0000326 msg.condition = I2C_COND_START;
327 msg.acknack = I2C_ACKNAK_WAITACK;
328 msg.direction = I2C_WRITE;
Lei Wend3ae17b2011-04-13 23:48:16 +0530329 msg.data = (chip << 1);
330 msg.data &= 0xFE;
Stefan Roese90ddbb92016-09-16 15:07:51 +0200331 if (i2c_transfer(base, &msg))
Lei Wend3ae17b2011-04-13 23:48:16 +0530332 return -1;
wdenk57b2d802003-06-27 21:31:46 +0000333
wdenk4a5c8a72003-03-06 00:02:04 +0000334 /*
wdenk57b2d802003-06-27 21:31:46 +0000335 * send memory address bytes;
336 * alen defines how much bytes we have to send.
wdenk4a5c8a72003-03-06 00:02:04 +0000337 */
wdenk4a5c8a72003-03-06 00:02:04 +0000338 while (--alen >= 0) {
Stefan Roese8c3ba152016-09-16 15:07:52 +0200339 debug("i2c_read: send address byte %02x (alen=%d)\n",
340 *addr, alen);
wdenk4a5c8a72003-03-06 00:02:04 +0000341 msg.condition = I2C_COND_NORMAL;
342 msg.acknack = I2C_ACKNAK_WAITACK;
343 msg.direction = I2C_WRITE;
Bradley Bolen36c4a7c2016-12-13 12:49:53 -0500344 msg.data = addr[alen];
Stefan Roese90ddbb92016-09-16 15:07:51 +0200345 if (i2c_transfer(base, &msg))
Lei Wend3ae17b2011-04-13 23:48:16 +0530346 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000347 }
wdenk57b2d802003-06-27 21:31:46 +0000348
wdenk4a5c8a72003-03-06 00:02:04 +0000349 /* write bytes; send NACK at last byte */
350 while (len--) {
Stefan Roese8c3ba152016-09-16 15:07:52 +0200351 debug("i2c_write: writing byte (%p)=0x%02x\n",
352 buffer, *buffer);
wdenk4a5c8a72003-03-06 00:02:04 +0000353
Lei Wend3ae17b2011-04-13 23:48:16 +0530354 if (len == 0)
wdenk4a5c8a72003-03-06 00:02:04 +0000355 msg.condition = I2C_COND_STOP;
356 else
357 msg.condition = I2C_COND_NORMAL;
358
359 msg.acknack = I2C_ACKNAK_WAITACK;
360 msg.direction = I2C_WRITE;
361 msg.data = *(buffer++);
wdenk57b2d802003-06-27 21:31:46 +0000362
Stefan Roese90ddbb92016-09-16 15:07:51 +0200363 if (i2c_transfer(base, &msg))
Lei Wend3ae17b2011-04-13 23:48:16 +0530364 return -1;
wdenk4a5c8a72003-03-06 00:02:04 +0000365 }
366
Stefan Roese90ddbb92016-09-16 15:07:51 +0200367 i2c_reset(base);
wdenk4a5c8a72003-03-06 00:02:04 +0000368
369 return 0;
wdenk4a5c8a72003-03-06 00:02:04 +0000370}
Stefan Roese90ddbb92016-09-16 15:07:51 +0200371
Stefan Roese8c3ba152016-09-16 15:07:52 +0200372#ifndef CONFIG_DM_I2C
373
Stefan Roese90ddbb92016-09-16 15:07:51 +0200374static struct mv_i2c *base_glob;
375
376static void i2c_board_init(struct mv_i2c *base)
377{
378#ifdef CONFIG_SYS_I2C_INIT_BOARD
379 u32 icr;
380 /*
381 * call board specific i2c bus reset routine before accessing the
382 * environment, which might be in a chip on that bus. For details
383 * about this problem see doc/I2C_Edge_Conditions.
384 *
385 * disable I2C controller first, otherwhise it thinks we want to
386 * talk to the slave port...
387 */
388 icr = readl(&base->icr);
389 writel(readl(&base->icr) & ~(ICR_SCLE | ICR_IUE), &base->icr);
390
391 i2c_init_board();
392
393 writel(icr, &base->icr);
394#endif
395}
396
397#ifdef CONFIG_I2C_MULTI_BUS
398static unsigned long i2c_regs[CONFIG_MV_I2C_NUM] = CONFIG_MV_I2C_REG;
399static unsigned int bus_initialized[CONFIG_MV_I2C_NUM];
400static unsigned int current_bus;
401
402int i2c_set_bus_num(unsigned int bus)
403{
404 if ((bus < 0) || (bus >= CONFIG_MV_I2C_NUM)) {
405 printf("Bad bus: %d\n", bus);
406 return -1;
407 }
408
409 base_glob = (struct mv_i2c *)i2c_regs[bus];
410 current_bus = bus;
411
412 if (!bus_initialized[current_bus]) {
413 i2c_board_init(base_glob);
414 bus_initialized[current_bus] = 1;
415 }
416
417 return 0;
418}
419
420unsigned int i2c_get_bus_num(void)
421{
422 return current_bus;
423}
424#endif
425
426/* API Functions */
427void i2c_init(int speed, int slaveaddr)
428{
Stefan Roese2b9a8382016-09-16 15:07:53 +0200429 u32 val;
430
Stefan Roese90ddbb92016-09-16 15:07:51 +0200431#ifdef CONFIG_I2C_MULTI_BUS
432 current_bus = 0;
433 base_glob = (struct mv_i2c *)i2c_regs[current_bus];
434#else
435 base_glob = (struct mv_i2c *)CONFIG_MV_I2C_REG;
436#endif
437
Stefan Roese2b9a8382016-09-16 15:07:53 +0200438 if (speed > 100000)
439 val = ICR_FM;
440 else
441 val = ICR_SM;
442 clrsetbits_le32(&base_glob->icr, ICR_MODE_MASK, val);
443
Stefan Roese90ddbb92016-09-16 15:07:51 +0200444 i2c_board_init(base_glob);
445}
446
Stefan Roese8c3ba152016-09-16 15:07:52 +0200447static int __i2c_probe_chip(struct mv_i2c *base, uchar chip)
448{
449 struct mv_i2c_msg msg;
450
451 i2c_reset(base);
452
453 msg.condition = I2C_COND_START;
454 msg.acknack = I2C_ACKNAK_WAITACK;
455 msg.direction = I2C_WRITE;
456 msg.data = (chip << 1) + 1;
457 if (i2c_transfer(base, &msg))
458 return -1;
459
460 msg.condition = I2C_COND_STOP;
461 msg.acknack = I2C_ACKNAK_SENDNAK;
462 msg.direction = I2C_READ;
463 msg.data = 0x00;
464 if (i2c_transfer(base, &msg))
465 return -1;
466
467 return 0;
468}
469
Stefan Roese90ddbb92016-09-16 15:07:51 +0200470/*
471 * i2c_probe: - Test if a chip answers for a given i2c address
472 *
473 * @chip: address of the chip which is searched for
474 * @return: 0 if a chip was found, -1 otherwhise
475 */
476int i2c_probe(uchar chip)
477{
478 return __i2c_probe_chip(base_glob, chip);
479}
480
481/*
482 * i2c_read: - Read multiple bytes from an i2c device
483 *
484 * The higher level routines take into account that this function is only
485 * called with len < page length of the device (see configuration file)
486 *
487 * @chip: address of the chip which is to be read
488 * @addr: i2c data address within the chip
489 * @alen: length of the i2c data address (1..2 bytes)
490 * @buffer: where to write the data
491 * @len: how much byte do we want to read
492 * @return: 0 in case of success
493 */
494int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
495{
Stefan Roese8c3ba152016-09-16 15:07:52 +0200496 u8 addr_bytes[4];
497
498 addr_bytes[0] = (addr >> 0) & 0xFF;
499 addr_bytes[1] = (addr >> 8) & 0xFF;
500 addr_bytes[2] = (addr >> 16) & 0xFF;
501 addr_bytes[3] = (addr >> 24) & 0xFF;
502
503 return __i2c_read(base_glob, chip, addr_bytes, alen, buffer, len);
Stefan Roese90ddbb92016-09-16 15:07:51 +0200504}
505
506/*
507 * i2c_write: - Write multiple bytes to an i2c device
508 *
509 * The higher level routines take into account that this function is only
510 * called with len < page length of the device (see configuration file)
511 *
512 * @chip: address of the chip which is to be written
513 * @addr: i2c data address within the chip
514 * @alen: length of the i2c data address (1..2 bytes)
515 * @buffer: where to find the data to be written
516 * @len: how much byte do we want to read
517 * @return: 0 in case of success
518 */
519int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
520{
Stefan Roese8c3ba152016-09-16 15:07:52 +0200521 u8 addr_bytes[4];
522
523 addr_bytes[0] = (addr >> 0) & 0xFF;
524 addr_bytes[1] = (addr >> 8) & 0xFF;
525 addr_bytes[2] = (addr >> 16) & 0xFF;
526 addr_bytes[3] = (addr >> 24) & 0xFF;
527
528 return __i2c_write(base_glob, chip, addr_bytes, alen, buffer, len);
529}
530
531#else /* CONFIG_DM_I2C */
532
533struct mv_i2c_priv {
534 struct mv_i2c *base;
535};
536
537static int mv_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, int nmsgs)
538{
539 struct mv_i2c_priv *i2c = dev_get_priv(bus);
540 struct i2c_msg *dmsg, *omsg, dummy;
541
542 memset(&dummy, 0, sizeof(struct i2c_msg));
543
544 /*
545 * We expect either two messages (one with an offset and one with the
546 * actual data) or one message (just data or offset/data combined)
547 */
548 if (nmsgs > 2 || nmsgs == 0) {
549 debug("%s: Only one or two messages are supported.", __func__);
550 return -1;
551 }
552
553 omsg = nmsgs == 1 ? &dummy : msg;
554 dmsg = nmsgs == 1 ? msg : msg + 1;
555
556 if (dmsg->flags & I2C_M_RD)
557 return __i2c_read(i2c->base, dmsg->addr, omsg->buf,
558 omsg->len, dmsg->buf, dmsg->len);
559 else
560 return __i2c_write(i2c->base, dmsg->addr, omsg->buf,
561 omsg->len, dmsg->buf, dmsg->len);
Stefan Roese90ddbb92016-09-16 15:07:51 +0200562}
Stefan Roese8c3ba152016-09-16 15:07:52 +0200563
Stefan Roese2b9a8382016-09-16 15:07:53 +0200564static int mv_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
565{
566 struct mv_i2c_priv *priv = dev_get_priv(bus);
567 u32 val;
568
569 if (speed > 100000)
570 val = ICR_FM;
571 else
572 val = ICR_SM;
573 clrsetbits_le32(&priv->base->icr, ICR_MODE_MASK, val);
574
575 return 0;
576}
577
Stefan Roese8c3ba152016-09-16 15:07:52 +0200578static int mv_i2c_probe(struct udevice *bus)
579{
580 struct mv_i2c_priv *priv = dev_get_priv(bus);
581
Simon Glassba1dea42017-05-17 17:18:05 -0600582 priv->base = (void *)devfdt_get_addr_ptr(bus);
Stefan Roese8c3ba152016-09-16 15:07:52 +0200583
584 return 0;
585}
586
587static const struct dm_i2c_ops mv_i2c_ops = {
588 .xfer = mv_i2c_xfer,
Stefan Roese2b9a8382016-09-16 15:07:53 +0200589 .set_bus_speed = mv_i2c_set_bus_speed,
Stefan Roese8c3ba152016-09-16 15:07:52 +0200590};
591
592static const struct udevice_id mv_i2c_ids[] = {
593 { .compatible = "marvell,armada-3700-i2c" },
594 { }
595};
596
597U_BOOT_DRIVER(i2c_mv) = {
598 .name = "i2c_mv",
599 .id = UCLASS_I2C,
600 .of_match = mv_i2c_ids,
601 .probe = mv_i2c_probe,
602 .priv_auto_alloc_size = sizeof(struct mv_i2c_priv),
603 .ops = &mv_i2c_ops,
604};
605#endif /* CONFIG_DM_I2C */