Alper Nebi Yasak | 53f2033 | 2020-10-22 22:43:13 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2015 Google, Inc |
| 4 | * Copyright 2014 Rockchip Inc. |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <clk.h> |
| 9 | #include <display.h> |
| 10 | #include <dm.h> |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 11 | #include <dm/device_compat.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 12 | #include <edid.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 13 | #include <log.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 14 | #include <regmap.h> |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 15 | #include <reset.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 16 | #include <syscon.h> |
| 17 | #include <video.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 18 | #include <asm/global_data.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 19 | #include <asm/gpio.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 20 | #include <asm/io.h> |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 21 | #include <asm/arch-rockchip/clock.h> |
| 22 | #include <asm/arch-rockchip/edp_rk3288.h> |
| 23 | #include <asm/arch-rockchip/vop_rk3288.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 24 | #include <dm/device-internal.h> |
| 25 | #include <dm/uclass-internal.h> |
Arnaud Patard (Rtp) | 1af703c | 2021-03-05 11:27:49 +0100 | [diff] [blame] | 26 | #include <efi.h> |
| 27 | #include <efi_loader.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 28 | #include <linux/bitops.h> |
Simon Glass | d66c5f7 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 29 | #include <linux/err.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 30 | #include <power/regulator.h> |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 31 | #include "rk_vop.h" |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 32 | |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 35 | enum vop_pol { |
| 36 | HSYNC_POSITIVE = 0, |
| 37 | VSYNC_POSITIVE = 1, |
| 38 | DEN_NEGATIVE = 2, |
| 39 | DCLK_INVERT = 3 |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 40 | }; |
| 41 | |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 42 | static void rkvop_enable(struct udevice *dev, struct rk3288_vop *regs, ulong fbbase, |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 43 | int fb_bits_per_pixel, |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 44 | const struct display_timing *edid, |
| 45 | struct reset_ctl *dclk_rst) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 46 | { |
| 47 | u32 lb_mode; |
| 48 | u32 rgb_mode; |
| 49 | u32 hactive = edid->hactive.typ; |
| 50 | u32 vactive = edid->vactive.typ; |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 51 | int ret; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 52 | |
| 53 | writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), |
| 54 | ®s->win0_act_info); |
| 55 | |
| 56 | writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) | |
| 57 | V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ), |
| 58 | ®s->win0_dsp_st); |
| 59 | |
| 60 | writel(V_DSP_WIDTH(hactive - 1) | |
| 61 | V_DSP_HEIGHT(vactive - 1), |
| 62 | ®s->win0_dsp_info); |
| 63 | |
| 64 | clrsetbits_le32(®s->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, |
| 65 | V_WIN0_KEY_EN(0) | V_WIN0_KEY_COLOR(0)); |
| 66 | |
| 67 | switch (fb_bits_per_pixel) { |
| 68 | case 16: |
| 69 | rgb_mode = RGB565; |
| 70 | writel(V_RGB565_VIRWIDTH(hactive), ®s->win0_vir); |
| 71 | break; |
| 72 | case 24: |
| 73 | rgb_mode = RGB888; |
| 74 | writel(V_RGB888_VIRWIDTH(hactive), ®s->win0_vir); |
| 75 | break; |
| 76 | case 32: |
| 77 | default: |
| 78 | rgb_mode = ARGB8888; |
| 79 | writel(V_ARGB888_VIRWIDTH(hactive), ®s->win0_vir); |
| 80 | break; |
| 81 | } |
| 82 | |
| 83 | if (hactive > 2560) |
| 84 | lb_mode = LB_RGB_3840X2; |
| 85 | else if (hactive > 1920) |
| 86 | lb_mode = LB_RGB_2560X4; |
| 87 | else if (hactive > 1280) |
| 88 | lb_mode = LB_RGB_1920X5; |
| 89 | else |
| 90 | lb_mode = LB_RGB_1280X8; |
| 91 | |
| 92 | clrsetbits_le32(®s->win0_ctrl0, |
| 93 | M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN, |
| 94 | V_WIN0_LB_MODE(lb_mode) | V_WIN0_DATA_FMT(rgb_mode) | |
| 95 | V_WIN0_EN(1)); |
| 96 | |
| 97 | writel(fbbase, ®s->win0_yrgb_mst); |
| 98 | writel(0x01, ®s->reg_cfg_done); /* enable reg config */ |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 99 | |
| 100 | ret = reset_assert(dclk_rst); |
| 101 | if (ret) { |
| 102 | dev_warn(dev, "failed to assert dclk reset (ret=%d)\n", ret); |
| 103 | return; |
| 104 | } |
| 105 | udelay(20); |
| 106 | |
| 107 | ret = reset_deassert(dclk_rst); |
| 108 | if (ret) |
| 109 | dev_warn(dev, "failed to deassert dclk reset (ret=%d)\n", ret); |
| 110 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 111 | } |
| 112 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 113 | static void rkvop_set_pin_polarity(struct udevice *dev, |
| 114 | enum vop_modes mode, u32 polarity) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 115 | { |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 116 | struct rkvop_driverdata *ops = |
| 117 | (struct rkvop_driverdata *)dev_get_driver_data(dev); |
| 118 | |
| 119 | if (ops->set_pin_polarity) |
| 120 | ops->set_pin_polarity(dev, mode, polarity); |
| 121 | } |
| 122 | |
| 123 | static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode) |
| 124 | { |
| 125 | struct rk_vop_priv *priv = dev_get_priv(dev); |
| 126 | struct rk3288_vop *regs = priv->regs; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 127 | |
Simon Glass | d742950 | 2017-05-31 17:57:29 -0600 | [diff] [blame] | 128 | /* remove from standby */ |
| 129 | clrbits_le32(®s->sys_ctrl, V_STANDBY_EN(1)); |
| 130 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 131 | switch (mode) { |
| 132 | case VOP_MODE_HDMI: |
| 133 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 134 | V_HDMI_OUT_EN(1)); |
| 135 | break; |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 136 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 137 | case VOP_MODE_EDP: |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 138 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 139 | V_EDP_OUT_EN(1)); |
| 140 | break; |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 141 | |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 142 | #if defined(CONFIG_ROCKCHIP_RK3288) |
Jacob Chen | 0b6aee4 | 2016-03-14 11:20:18 +0800 | [diff] [blame] | 143 | case VOP_MODE_LVDS: |
| 144 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 145 | V_RGB_OUT_EN(1)); |
| 146 | break; |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 147 | #endif |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 148 | |
Eric Gao | 0f49407 | 2017-05-02 18:23:52 +0800 | [diff] [blame] | 149 | case VOP_MODE_MIPI: |
| 150 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 151 | V_MIPI_OUT_EN(1)); |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 152 | break; |
| 153 | |
| 154 | default: |
| 155 | debug("%s: unsupported output mode %x\n", __func__, mode); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 156 | } |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 157 | } |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 158 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 159 | static void rkvop_mode_set(struct udevice *dev, |
| 160 | const struct display_timing *edid, |
| 161 | enum vop_modes mode) |
| 162 | { |
| 163 | struct rk_vop_priv *priv = dev_get_priv(dev); |
| 164 | struct rk3288_vop *regs = priv->regs; |
| 165 | struct rkvop_driverdata *data = |
| 166 | (struct rkvop_driverdata *)dev_get_driver_data(dev); |
Jacob Chen | 0b6aee4 | 2016-03-14 11:20:18 +0800 | [diff] [blame] | 167 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 168 | u32 hactive = edid->hactive.typ; |
| 169 | u32 vactive = edid->vactive.typ; |
| 170 | u32 hsync_len = edid->hsync_len.typ; |
| 171 | u32 hback_porch = edid->hback_porch.typ; |
| 172 | u32 vsync_len = edid->vsync_len.typ; |
| 173 | u32 vback_porch = edid->vback_porch.typ; |
| 174 | u32 hfront_porch = edid->hfront_porch.typ; |
| 175 | u32 vfront_porch = edid->vfront_porch.typ; |
| 176 | int mode_flags; |
| 177 | u32 pin_polarity; |
| 178 | |
| 179 | pin_polarity = BIT(DCLK_INVERT); |
| 180 | if (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH) |
| 181 | pin_polarity |= BIT(HSYNC_POSITIVE); |
| 182 | if (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH) |
| 183 | pin_polarity |= BIT(VSYNC_POSITIVE); |
| 184 | |
| 185 | rkvop_set_pin_polarity(dev, mode, pin_polarity); |
| 186 | rkvop_enable_output(dev, mode); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 187 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 188 | mode_flags = 0; /* RGB888 */ |
| 189 | if ((data->features & VOP_FEATURE_OUTPUT_10BIT) && |
| 190 | (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)) |
| 191 | mode_flags = 15; /* RGBaaa */ |
| 192 | |
| 193 | clrsetbits_le32(®s->dsp_ctrl0, M_DSP_OUT_MODE, |
| 194 | V_DSP_OUT_MODE(mode_flags)); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 195 | |
| 196 | writel(V_HSYNC(hsync_len) | |
| 197 | V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch), |
| 198 | ®s->dsp_htotal_hs_end); |
| 199 | |
| 200 | writel(V_HEAP(hsync_len + hback_porch + hactive) | |
| 201 | V_HASP(hsync_len + hback_porch), |
| 202 | ®s->dsp_hact_st_end); |
| 203 | |
| 204 | writel(V_VSYNC(vsync_len) | |
| 205 | V_VERPRD(vsync_len + vback_porch + vactive + vfront_porch), |
| 206 | ®s->dsp_vtotal_vs_end); |
| 207 | |
| 208 | writel(V_VAEP(vsync_len + vback_porch + vactive)| |
| 209 | V_VASP(vsync_len + vback_porch), |
| 210 | ®s->dsp_vact_st_end); |
| 211 | |
| 212 | writel(V_HEAP(hsync_len + hback_porch + hactive) | |
| 213 | V_HASP(hsync_len + hback_porch), |
| 214 | ®s->post_dsp_hact_info); |
| 215 | |
| 216 | writel(V_VAEP(vsync_len + vback_porch + vactive)| |
| 217 | V_VASP(vsync_len + vback_porch), |
| 218 | ®s->post_dsp_vact_info); |
| 219 | |
| 220 | writel(0x01, ®s->reg_cfg_done); /* enable reg config */ |
| 221 | } |
| 222 | |
| 223 | /** |
| 224 | * rk_display_init() - Try to enable the given display device |
| 225 | * |
| 226 | * This function performs many steps: |
| 227 | * - Finds the display device being referenced by @ep_node |
| 228 | * - Puts the VOP's ID into its uclass platform data |
| 229 | * - Probes the device to set it up |
| 230 | * - Reads the EDID timing information |
| 231 | * - Sets up the VOP clocks, etc. for the selected pixel clock and display mode |
| 232 | * - Enables the display (the display device handles this and will do different |
| 233 | * things depending on the display type) |
| 234 | * - Tells the uclass about the display resolution so that the console will |
| 235 | * appear correctly |
| 236 | * |
| 237 | * @dev: VOP device that we want to connect to the display |
| 238 | * @fbbase: Frame buffer address |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 239 | * @ep_node: Device tree node to process - this is the offset of an endpoint |
| 240 | * node within the VOP's 'port' list. |
Heinrich Schuchardt | 47b4c02 | 2022-01-19 18:05:50 +0100 | [diff] [blame] | 241 | * Return: 0 if OK, -ve if something went wrong |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 242 | */ |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 243 | static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 244 | { |
| 245 | struct video_priv *uc_priv = dev_get_uclass_priv(dev); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 246 | struct rk_vop_priv *priv = dev_get_priv(dev); |
| 247 | int vop_id, remote_vop_id; |
| 248 | struct rk3288_vop *regs = priv->regs; |
| 249 | struct display_timing timing; |
| 250 | struct udevice *disp; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 251 | int ret; |
| 252 | u32 remote_phandle; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 253 | struct display_plat *disp_uc_plat; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 254 | struct clk clk; |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 255 | enum video_log2_bpp l2bpp; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 256 | ofnode remote; |
Arnaud Patard (Rtp) | 058ffd6 | 2021-03-05 11:27:46 +0100 | [diff] [blame] | 257 | const char *compat; |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 258 | struct reset_ctl dclk_rst; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 259 | |
Arnaud Patard (Rtp) | 6b81d6a | 2021-03-05 11:27:52 +0100 | [diff] [blame] | 260 | debug("%s(%s, 0x%lx, %s)\n", __func__, |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 261 | dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); |
| 262 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 263 | ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); |
| 264 | if (ret) |
| 265 | return ret; |
| 266 | |
| 267 | remote = ofnode_get_by_phandle(remote_phandle); |
| 268 | if (!ofnode_valid(remote)) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 269 | return -EINVAL; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 270 | remote_vop_id = ofnode_read_u32_default(remote, "reg", -1); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 271 | debug("remote vop_id=%d\n", remote_vop_id); |
| 272 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 273 | /* |
| 274 | * The remote-endpoint references into a subnode of the encoder |
| 275 | * (i.e. HDMI, MIPI, etc.) with the DTS looking something like |
| 276 | * the following (assume 'hdmi_in_vopl' to be referenced): |
| 277 | * |
| 278 | * hdmi: hdmi@ff940000 { |
| 279 | * ports { |
| 280 | * hdmi_in: port { |
| 281 | * hdmi_in_vopb: endpoint@0 { ... }; |
| 282 | * hdmi_in_vopl: endpoint@1 { ... }; |
| 283 | * } |
| 284 | * } |
| 285 | * } |
| 286 | * |
| 287 | * The original code had 3 steps of "walking the parent", but |
| 288 | * a much better (as in: less likely to break if the DTS |
| 289 | * changes) way of doing this is to "find the enclosing device |
| 290 | * of UCLASS_DISPLAY". |
| 291 | */ |
| 292 | while (ofnode_valid(remote)) { |
| 293 | remote = ofnode_get_parent(remote); |
| 294 | if (!ofnode_valid(remote)) { |
| 295 | debug("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n", |
| 296 | __func__, dev_read_name(dev)); |
| 297 | return -EINVAL; |
| 298 | } |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 299 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 300 | uclass_find_device_by_ofnode(UCLASS_DISPLAY, remote, &disp); |
| 301 | if (disp) |
| 302 | break; |
| 303 | }; |
Arnaud Patard (Rtp) | 058ffd6 | 2021-03-05 11:27:46 +0100 | [diff] [blame] | 304 | compat = ofnode_get_property(remote, "compatible", NULL); |
| 305 | if (!compat) { |
| 306 | debug("%s(%s): Failed to find compatible property\n", |
| 307 | __func__, dev_read_name(dev)); |
| 308 | return -EINVAL; |
| 309 | } |
| 310 | if (strstr(compat, "edp")) { |
| 311 | vop_id = VOP_MODE_EDP; |
| 312 | } else if (strstr(compat, "mipi")) { |
| 313 | vop_id = VOP_MODE_MIPI; |
| 314 | } else if (strstr(compat, "hdmi")) { |
| 315 | vop_id = VOP_MODE_HDMI; |
| 316 | } else if (strstr(compat, "cdn-dp")) { |
| 317 | vop_id = VOP_MODE_DP; |
| 318 | } else if (strstr(compat, "lvds")) { |
| 319 | vop_id = VOP_MODE_LVDS; |
| 320 | } else { |
| 321 | debug("%s(%s): Failed to find vop mode for %s\n", |
| 322 | __func__, dev_read_name(dev), compat); |
| 323 | return -EINVAL; |
| 324 | } |
| 325 | debug("vop_id=%d\n", vop_id); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 326 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 327 | disp_uc_plat = dev_get_uclass_plat(disp); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 328 | debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); |
Simon Glass | 86ad1b6 | 2016-11-13 14:22:08 -0700 | [diff] [blame] | 329 | if (display_in_use(disp)) { |
| 330 | debug(" - device in use\n"); |
| 331 | return -EBUSY; |
| 332 | } |
| 333 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 334 | disp_uc_plat->source_id = remote_vop_id; |
| 335 | disp_uc_plat->src_dev = dev; |
| 336 | |
| 337 | ret = device_probe(disp); |
| 338 | if (ret) { |
| 339 | debug("%s: device '%s' display won't probe (ret=%d)\n", |
| 340 | __func__, dev->name, ret); |
| 341 | return ret; |
| 342 | } |
| 343 | |
| 344 | ret = display_read_timing(disp, &timing); |
| 345 | if (ret) { |
| 346 | debug("%s: Failed to read timings\n", __func__); |
| 347 | return ret; |
| 348 | } |
| 349 | |
Simon Glass | 25891bc | 2016-11-13 14:21:56 -0700 | [diff] [blame] | 350 | ret = clk_get_by_index(dev, 1, &clk); |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 351 | if (!ret) |
| 352 | ret = clk_set_rate(&clk, timing.pixelclock.typ); |
Eric Gao | 9ada0e6 | 2017-05-02 18:23:51 +0800 | [diff] [blame] | 353 | if (IS_ERR_VALUE(ret)) { |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 354 | debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret); |
| 355 | return ret; |
| 356 | } |
| 357 | |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 358 | /* Set bitwidth for vop display according to vop mode */ |
| 359 | switch (vop_id) { |
| 360 | case VOP_MODE_EDP: |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 361 | #if defined(CONFIG_ROCKCHIP_RK3288) |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 362 | case VOP_MODE_LVDS: |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 363 | #endif |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 364 | l2bpp = VIDEO_BPP16; |
| 365 | break; |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 366 | case VOP_MODE_HDMI: |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 367 | case VOP_MODE_MIPI: |
| 368 | l2bpp = VIDEO_BPP32; |
| 369 | break; |
| 370 | default: |
| 371 | l2bpp = VIDEO_BPP16; |
| 372 | } |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 373 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 374 | rkvop_mode_set(dev, &timing, vop_id); |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 375 | |
| 376 | ret = reset_get_by_name(dev, "dclk", &dclk_rst); |
| 377 | if (ret) { |
| 378 | dev_err(dev, "failed to get dclk reset (ret=%d)\n", ret); |
| 379 | return ret; |
| 380 | } |
| 381 | |
| 382 | rkvop_enable(dev, regs, fbbase, 1 << l2bpp, &timing, &dclk_rst); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 383 | |
| 384 | ret = display_enable(disp, 1 << l2bpp, &timing); |
| 385 | if (ret) |
| 386 | return ret; |
| 387 | |
| 388 | uc_priv->xsize = timing.hactive.typ; |
| 389 | uc_priv->ysize = timing.vactive.typ; |
| 390 | uc_priv->bpix = l2bpp; |
| 391 | debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); |
| 392 | |
| 393 | return 0; |
| 394 | } |
| 395 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 396 | void rk_vop_probe_regulators(struct udevice *dev, |
| 397 | const char * const *names, int cnt) |
| 398 | { |
| 399 | int i, ret; |
| 400 | const char *name; |
| 401 | struct udevice *reg; |
| 402 | |
| 403 | for (i = 0; i < cnt; ++i) { |
| 404 | name = names[i]; |
| 405 | debug("%s: probing regulator '%s'\n", dev->name, name); |
| 406 | |
| 407 | ret = regulator_autoset_by_name(name, ®); |
| 408 | if (!ret) |
| 409 | ret = regulator_set_enable(reg, true); |
| 410 | } |
| 411 | } |
| 412 | |
| 413 | int rk_vop_probe(struct udevice *dev) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 414 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 415 | struct video_uc_plat *plat = dev_get_uclass_plat(dev); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 416 | struct rk_vop_priv *priv = dev_get_priv(dev); |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 417 | int ret = 0; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 418 | ofnode port, node; |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 419 | struct reset_ctl ahb_rst; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 420 | |
| 421 | /* Before relocation we don't need to do anything */ |
| 422 | if (!(gd->flags & GD_FLG_RELOC)) |
| 423 | return 0; |
| 424 | |
Arnaud Patard (Rtp) | 3af97be | 2021-03-05 11:27:54 +0100 | [diff] [blame] | 425 | ret = reset_get_by_name(dev, "ahb", &ahb_rst); |
| 426 | if (ret) { |
| 427 | dev_err(dev, "failed to get ahb reset (ret=%d)\n", ret); |
| 428 | return ret; |
| 429 | } |
| 430 | |
| 431 | ret = reset_assert(&ahb_rst); |
| 432 | if (ret) { |
| 433 | dev_err(dev, "failed to assert ahb reset (ret=%d)\n", ret); |
| 434 | return ret; |
| 435 | } |
| 436 | udelay(20); |
| 437 | |
| 438 | ret = reset_deassert(&ahb_rst); |
| 439 | if (ret) { |
| 440 | dev_err(dev, "failed to deassert ahb reset (ret=%d)\n", ret); |
| 441 | return ret; |
| 442 | } |
| 443 | |
Arnaud Patard (Rtp) | 1af703c | 2021-03-05 11:27:49 +0100 | [diff] [blame] | 444 | #if defined(CONFIG_EFI_LOADER) |
| 445 | debug("Adding to EFI map %d @ %lx\n", plat->size, plat->base); |
| 446 | efi_add_memory_map(plat->base, plat->size, EFI_RESERVED_MEMORY_TYPE); |
| 447 | #endif |
| 448 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 449 | priv->regs = (struct rk3288_vop *)dev_read_addr(dev); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 450 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 451 | /* |
| 452 | * Try all the ports until we find one that works. In practice this |
| 453 | * tries EDP first if available, then HDMI. |
Simon Glass | 86ad1b6 | 2016-11-13 14:22:08 -0700 | [diff] [blame] | 454 | * |
| 455 | * Note that rockchip_vop_set_clk() always uses NPLL as the source |
| 456 | * clock so it is currently not possible to use more than one display |
| 457 | * device simultaneously. |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 458 | */ |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 459 | port = dev_read_subnode(dev, "port"); |
| 460 | if (!ofnode_valid(port)) { |
| 461 | debug("%s(%s): 'port' subnode not found\n", |
| 462 | __func__, dev_read_name(dev)); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 463 | return -EINVAL; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 464 | } |
| 465 | |
| 466 | for (node = ofnode_first_subnode(port); |
| 467 | ofnode_valid(node); |
| 468 | node = dev_read_next_subnode(node)) { |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 469 | ret = rk_display_init(dev, plat->base, node); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 470 | if (ret) |
| 471 | debug("Device failed: ret=%d\n", ret); |
| 472 | if (!ret) |
| 473 | break; |
| 474 | } |
Simon Glass | 773ca82 | 2016-05-14 14:03:01 -0600 | [diff] [blame] | 475 | video_set_flush_dcache(dev, 1); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 476 | |
| 477 | return ret; |
| 478 | } |
| 479 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 480 | int rk_vop_bind(struct udevice *dev) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 481 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 482 | struct video_uc_plat *plat = dev_get_uclass_plat(dev); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 483 | |
Philipp Tomsich | d3a5826 | 2017-05-31 17:59:29 +0200 | [diff] [blame] | 484 | plat->size = 4 * (CONFIG_VIDEO_ROCKCHIP_MAX_XRES * |
| 485 | CONFIG_VIDEO_ROCKCHIP_MAX_YRES); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 486 | |
| 487 | return 0; |
| 488 | } |