Alper Nebi Yasak | 53f2033 | 2020-10-22 22:43:13 +0300 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2015 Google, Inc |
| 4 | * Copyright 2014 Rockchip Inc. |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <clk.h> |
| 9 | #include <display.h> |
| 10 | #include <dm.h> |
| 11 | #include <edid.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 13 | #include <regmap.h> |
| 14 | #include <syscon.h> |
| 15 | #include <video.h> |
| 16 | #include <asm/gpio.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 17 | #include <asm/io.h> |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 18 | #include <asm/arch-rockchip/clock.h> |
| 19 | #include <asm/arch-rockchip/edp_rk3288.h> |
| 20 | #include <asm/arch-rockchip/vop_rk3288.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 21 | #include <dm/device-internal.h> |
| 22 | #include <dm/uclass-internal.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 23 | #include <linux/bitops.h> |
Simon Glass | d66c5f7 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 24 | #include <linux/err.h> |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 25 | #include <power/regulator.h> |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 26 | #include "rk_vop.h" |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 27 | |
| 28 | DECLARE_GLOBAL_DATA_PTR; |
| 29 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 30 | enum vop_pol { |
| 31 | HSYNC_POSITIVE = 0, |
| 32 | VSYNC_POSITIVE = 1, |
| 33 | DEN_NEGATIVE = 2, |
| 34 | DCLK_INVERT = 3 |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 35 | }; |
| 36 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 37 | static void rkvop_enable(struct rk3288_vop *regs, ulong fbbase, |
| 38 | int fb_bits_per_pixel, |
| 39 | const struct display_timing *edid) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 40 | { |
| 41 | u32 lb_mode; |
| 42 | u32 rgb_mode; |
| 43 | u32 hactive = edid->hactive.typ; |
| 44 | u32 vactive = edid->vactive.typ; |
| 45 | |
| 46 | writel(V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1), |
| 47 | ®s->win0_act_info); |
| 48 | |
| 49 | writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) | |
| 50 | V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ), |
| 51 | ®s->win0_dsp_st); |
| 52 | |
| 53 | writel(V_DSP_WIDTH(hactive - 1) | |
| 54 | V_DSP_HEIGHT(vactive - 1), |
| 55 | ®s->win0_dsp_info); |
| 56 | |
| 57 | clrsetbits_le32(®s->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, |
| 58 | V_WIN0_KEY_EN(0) | V_WIN0_KEY_COLOR(0)); |
| 59 | |
| 60 | switch (fb_bits_per_pixel) { |
| 61 | case 16: |
| 62 | rgb_mode = RGB565; |
| 63 | writel(V_RGB565_VIRWIDTH(hactive), ®s->win0_vir); |
| 64 | break; |
| 65 | case 24: |
| 66 | rgb_mode = RGB888; |
| 67 | writel(V_RGB888_VIRWIDTH(hactive), ®s->win0_vir); |
| 68 | break; |
| 69 | case 32: |
| 70 | default: |
| 71 | rgb_mode = ARGB8888; |
| 72 | writel(V_ARGB888_VIRWIDTH(hactive), ®s->win0_vir); |
| 73 | break; |
| 74 | } |
| 75 | |
| 76 | if (hactive > 2560) |
| 77 | lb_mode = LB_RGB_3840X2; |
| 78 | else if (hactive > 1920) |
| 79 | lb_mode = LB_RGB_2560X4; |
| 80 | else if (hactive > 1280) |
| 81 | lb_mode = LB_RGB_1920X5; |
| 82 | else |
| 83 | lb_mode = LB_RGB_1280X8; |
| 84 | |
| 85 | clrsetbits_le32(®s->win0_ctrl0, |
| 86 | M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN, |
| 87 | V_WIN0_LB_MODE(lb_mode) | V_WIN0_DATA_FMT(rgb_mode) | |
| 88 | V_WIN0_EN(1)); |
| 89 | |
| 90 | writel(fbbase, ®s->win0_yrgb_mst); |
| 91 | writel(0x01, ®s->reg_cfg_done); /* enable reg config */ |
| 92 | } |
| 93 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 94 | static void rkvop_set_pin_polarity(struct udevice *dev, |
| 95 | enum vop_modes mode, u32 polarity) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 96 | { |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 97 | struct rkvop_driverdata *ops = |
| 98 | (struct rkvop_driverdata *)dev_get_driver_data(dev); |
| 99 | |
| 100 | if (ops->set_pin_polarity) |
| 101 | ops->set_pin_polarity(dev, mode, polarity); |
| 102 | } |
| 103 | |
| 104 | static void rkvop_enable_output(struct udevice *dev, enum vop_modes mode) |
| 105 | { |
| 106 | struct rk_vop_priv *priv = dev_get_priv(dev); |
| 107 | struct rk3288_vop *regs = priv->regs; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 108 | |
Simon Glass | d742950 | 2017-05-31 17:57:29 -0600 | [diff] [blame] | 109 | /* remove from standby */ |
| 110 | clrbits_le32(®s->sys_ctrl, V_STANDBY_EN(1)); |
| 111 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 112 | switch (mode) { |
| 113 | case VOP_MODE_HDMI: |
| 114 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 115 | V_HDMI_OUT_EN(1)); |
| 116 | break; |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 117 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 118 | case VOP_MODE_EDP: |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 119 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 120 | V_EDP_OUT_EN(1)); |
| 121 | break; |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 122 | |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 123 | #if defined(CONFIG_ROCKCHIP_RK3288) |
Jacob Chen | 0b6aee4 | 2016-03-14 11:20:18 +0800 | [diff] [blame] | 124 | case VOP_MODE_LVDS: |
| 125 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 126 | V_RGB_OUT_EN(1)); |
| 127 | break; |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 128 | #endif |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 129 | |
Eric Gao | 0f49407 | 2017-05-02 18:23:52 +0800 | [diff] [blame] | 130 | case VOP_MODE_MIPI: |
| 131 | clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN, |
| 132 | V_MIPI_OUT_EN(1)); |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 133 | break; |
| 134 | |
| 135 | default: |
| 136 | debug("%s: unsupported output mode %x\n", __func__, mode); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 137 | } |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 138 | } |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 139 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 140 | static void rkvop_mode_set(struct udevice *dev, |
| 141 | const struct display_timing *edid, |
| 142 | enum vop_modes mode) |
| 143 | { |
| 144 | struct rk_vop_priv *priv = dev_get_priv(dev); |
| 145 | struct rk3288_vop *regs = priv->regs; |
| 146 | struct rkvop_driverdata *data = |
| 147 | (struct rkvop_driverdata *)dev_get_driver_data(dev); |
Jacob Chen | 0b6aee4 | 2016-03-14 11:20:18 +0800 | [diff] [blame] | 148 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 149 | u32 hactive = edid->hactive.typ; |
| 150 | u32 vactive = edid->vactive.typ; |
| 151 | u32 hsync_len = edid->hsync_len.typ; |
| 152 | u32 hback_porch = edid->hback_porch.typ; |
| 153 | u32 vsync_len = edid->vsync_len.typ; |
| 154 | u32 vback_porch = edid->vback_porch.typ; |
| 155 | u32 hfront_porch = edid->hfront_porch.typ; |
| 156 | u32 vfront_porch = edid->vfront_porch.typ; |
| 157 | int mode_flags; |
| 158 | u32 pin_polarity; |
| 159 | |
| 160 | pin_polarity = BIT(DCLK_INVERT); |
| 161 | if (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH) |
| 162 | pin_polarity |= BIT(HSYNC_POSITIVE); |
| 163 | if (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH) |
| 164 | pin_polarity |= BIT(VSYNC_POSITIVE); |
| 165 | |
| 166 | rkvop_set_pin_polarity(dev, mode, pin_polarity); |
| 167 | rkvop_enable_output(dev, mode); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 168 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 169 | mode_flags = 0; /* RGB888 */ |
| 170 | if ((data->features & VOP_FEATURE_OUTPUT_10BIT) && |
| 171 | (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)) |
| 172 | mode_flags = 15; /* RGBaaa */ |
| 173 | |
| 174 | clrsetbits_le32(®s->dsp_ctrl0, M_DSP_OUT_MODE, |
| 175 | V_DSP_OUT_MODE(mode_flags)); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 176 | |
| 177 | writel(V_HSYNC(hsync_len) | |
| 178 | V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch), |
| 179 | ®s->dsp_htotal_hs_end); |
| 180 | |
| 181 | writel(V_HEAP(hsync_len + hback_porch + hactive) | |
| 182 | V_HASP(hsync_len + hback_porch), |
| 183 | ®s->dsp_hact_st_end); |
| 184 | |
| 185 | writel(V_VSYNC(vsync_len) | |
| 186 | V_VERPRD(vsync_len + vback_porch + vactive + vfront_porch), |
| 187 | ®s->dsp_vtotal_vs_end); |
| 188 | |
| 189 | writel(V_VAEP(vsync_len + vback_porch + vactive)| |
| 190 | V_VASP(vsync_len + vback_porch), |
| 191 | ®s->dsp_vact_st_end); |
| 192 | |
| 193 | writel(V_HEAP(hsync_len + hback_porch + hactive) | |
| 194 | V_HASP(hsync_len + hback_porch), |
| 195 | ®s->post_dsp_hact_info); |
| 196 | |
| 197 | writel(V_VAEP(vsync_len + vback_porch + vactive)| |
| 198 | V_VASP(vsync_len + vback_porch), |
| 199 | ®s->post_dsp_vact_info); |
| 200 | |
| 201 | writel(0x01, ®s->reg_cfg_done); /* enable reg config */ |
| 202 | } |
| 203 | |
| 204 | /** |
| 205 | * rk_display_init() - Try to enable the given display device |
| 206 | * |
| 207 | * This function performs many steps: |
| 208 | * - Finds the display device being referenced by @ep_node |
| 209 | * - Puts the VOP's ID into its uclass platform data |
| 210 | * - Probes the device to set it up |
| 211 | * - Reads the EDID timing information |
| 212 | * - Sets up the VOP clocks, etc. for the selected pixel clock and display mode |
| 213 | * - Enables the display (the display device handles this and will do different |
| 214 | * things depending on the display type) |
| 215 | * - Tells the uclass about the display resolution so that the console will |
| 216 | * appear correctly |
| 217 | * |
| 218 | * @dev: VOP device that we want to connect to the display |
| 219 | * @fbbase: Frame buffer address |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 220 | * @ep_node: Device tree node to process - this is the offset of an endpoint |
| 221 | * node within the VOP's 'port' list. |
| 222 | * @return 0 if OK, -ve if something went wrong |
| 223 | */ |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 224 | static int rk_display_init(struct udevice *dev, ulong fbbase, ofnode ep_node) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 225 | { |
| 226 | struct video_priv *uc_priv = dev_get_uclass_priv(dev); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 227 | struct rk_vop_priv *priv = dev_get_priv(dev); |
| 228 | int vop_id, remote_vop_id; |
| 229 | struct rk3288_vop *regs = priv->regs; |
| 230 | struct display_timing timing; |
| 231 | struct udevice *disp; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 232 | int ret; |
| 233 | u32 remote_phandle; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 234 | struct display_plat *disp_uc_plat; |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 235 | struct clk clk; |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 236 | enum video_log2_bpp l2bpp; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 237 | ofnode remote; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 238 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 239 | debug("%s(%s, %lu, %s)\n", __func__, |
| 240 | dev_read_name(dev), fbbase, ofnode_get_name(ep_node)); |
| 241 | |
| 242 | vop_id = ofnode_read_s32_default(ep_node, "reg", -1); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 243 | debug("vop_id=%d\n", vop_id); |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 244 | ret = ofnode_read_u32(ep_node, "remote-endpoint", &remote_phandle); |
| 245 | if (ret) |
| 246 | return ret; |
| 247 | |
| 248 | remote = ofnode_get_by_phandle(remote_phandle); |
| 249 | if (!ofnode_valid(remote)) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 250 | return -EINVAL; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 251 | remote_vop_id = ofnode_read_u32_default(remote, "reg", -1); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 252 | debug("remote vop_id=%d\n", remote_vop_id); |
| 253 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 254 | /* |
| 255 | * The remote-endpoint references into a subnode of the encoder |
| 256 | * (i.e. HDMI, MIPI, etc.) with the DTS looking something like |
| 257 | * the following (assume 'hdmi_in_vopl' to be referenced): |
| 258 | * |
| 259 | * hdmi: hdmi@ff940000 { |
| 260 | * ports { |
| 261 | * hdmi_in: port { |
| 262 | * hdmi_in_vopb: endpoint@0 { ... }; |
| 263 | * hdmi_in_vopl: endpoint@1 { ... }; |
| 264 | * } |
| 265 | * } |
| 266 | * } |
| 267 | * |
| 268 | * The original code had 3 steps of "walking the parent", but |
| 269 | * a much better (as in: less likely to break if the DTS |
| 270 | * changes) way of doing this is to "find the enclosing device |
| 271 | * of UCLASS_DISPLAY". |
| 272 | */ |
| 273 | while (ofnode_valid(remote)) { |
| 274 | remote = ofnode_get_parent(remote); |
| 275 | if (!ofnode_valid(remote)) { |
| 276 | debug("%s(%s): no UCLASS_DISPLAY for remote-endpoint\n", |
| 277 | __func__, dev_read_name(dev)); |
| 278 | return -EINVAL; |
| 279 | } |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 280 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 281 | uclass_find_device_by_ofnode(UCLASS_DISPLAY, remote, &disp); |
| 282 | if (disp) |
| 283 | break; |
| 284 | }; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 285 | |
| 286 | disp_uc_plat = dev_get_uclass_platdata(disp); |
| 287 | debug("Found device '%s', disp_uc_priv=%p\n", disp->name, disp_uc_plat); |
Simon Glass | 86ad1b6 | 2016-11-13 14:22:08 -0700 | [diff] [blame] | 288 | if (display_in_use(disp)) { |
| 289 | debug(" - device in use\n"); |
| 290 | return -EBUSY; |
| 291 | } |
| 292 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 293 | disp_uc_plat->source_id = remote_vop_id; |
| 294 | disp_uc_plat->src_dev = dev; |
| 295 | |
| 296 | ret = device_probe(disp); |
| 297 | if (ret) { |
| 298 | debug("%s: device '%s' display won't probe (ret=%d)\n", |
| 299 | __func__, dev->name, ret); |
| 300 | return ret; |
| 301 | } |
| 302 | |
| 303 | ret = display_read_timing(disp, &timing); |
| 304 | if (ret) { |
| 305 | debug("%s: Failed to read timings\n", __func__); |
| 306 | return ret; |
| 307 | } |
| 308 | |
Simon Glass | 25891bc | 2016-11-13 14:21:56 -0700 | [diff] [blame] | 309 | ret = clk_get_by_index(dev, 1, &clk); |
Stephen Warren | a962243 | 2016-06-17 09:44:00 -0600 | [diff] [blame] | 310 | if (!ret) |
| 311 | ret = clk_set_rate(&clk, timing.pixelclock.typ); |
Eric Gao | 9ada0e6 | 2017-05-02 18:23:51 +0800 | [diff] [blame] | 312 | if (IS_ERR_VALUE(ret)) { |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 313 | debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret); |
| 314 | return ret; |
| 315 | } |
| 316 | |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 317 | /* Set bitwidth for vop display according to vop mode */ |
| 318 | switch (vop_id) { |
| 319 | case VOP_MODE_EDP: |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 320 | #if defined(CONFIG_ROCKCHIP_RK3288) |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 321 | case VOP_MODE_LVDS: |
Jagan Teki | 5023ade | 2020-04-02 17:11:22 +0530 | [diff] [blame] | 322 | #endif |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 323 | l2bpp = VIDEO_BPP16; |
| 324 | break; |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 325 | case VOP_MODE_HDMI: |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 326 | case VOP_MODE_MIPI: |
| 327 | l2bpp = VIDEO_BPP32; |
| 328 | break; |
| 329 | default: |
| 330 | l2bpp = VIDEO_BPP16; |
| 331 | } |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 332 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 333 | rkvop_mode_set(dev, &timing, vop_id); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 334 | rkvop_enable(regs, fbbase, 1 << l2bpp, &timing); |
| 335 | |
| 336 | ret = display_enable(disp, 1 << l2bpp, &timing); |
| 337 | if (ret) |
| 338 | return ret; |
| 339 | |
| 340 | uc_priv->xsize = timing.hactive.typ; |
| 341 | uc_priv->ysize = timing.vactive.typ; |
| 342 | uc_priv->bpix = l2bpp; |
| 343 | debug("fb=%lx, size=%d %d\n", fbbase, uc_priv->xsize, uc_priv->ysize); |
| 344 | |
| 345 | return 0; |
| 346 | } |
| 347 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 348 | void rk_vop_probe_regulators(struct udevice *dev, |
| 349 | const char * const *names, int cnt) |
| 350 | { |
| 351 | int i, ret; |
| 352 | const char *name; |
| 353 | struct udevice *reg; |
| 354 | |
| 355 | for (i = 0; i < cnt; ++i) { |
| 356 | name = names[i]; |
| 357 | debug("%s: probing regulator '%s'\n", dev->name, name); |
| 358 | |
| 359 | ret = regulator_autoset_by_name(name, ®); |
| 360 | if (!ret) |
| 361 | ret = regulator_set_enable(reg, true); |
| 362 | } |
| 363 | } |
| 364 | |
| 365 | int rk_vop_probe(struct udevice *dev) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 366 | { |
| 367 | struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 368 | struct rk_vop_priv *priv = dev_get_priv(dev); |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 369 | int ret = 0; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 370 | ofnode port, node; |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 371 | |
| 372 | /* Before relocation we don't need to do anything */ |
| 373 | if (!(gd->flags & GD_FLG_RELOC)) |
| 374 | return 0; |
| 375 | |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 376 | priv->regs = (struct rk3288_vop *)dev_read_addr(dev); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 377 | |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 378 | /* |
| 379 | * Try all the ports until we find one that works. In practice this |
| 380 | * tries EDP first if available, then HDMI. |
Simon Glass | 86ad1b6 | 2016-11-13 14:22:08 -0700 | [diff] [blame] | 381 | * |
| 382 | * Note that rockchip_vop_set_clk() always uses NPLL as the source |
| 383 | * clock so it is currently not possible to use more than one display |
| 384 | * device simultaneously. |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 385 | */ |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 386 | port = dev_read_subnode(dev, "port"); |
| 387 | if (!ofnode_valid(port)) { |
| 388 | debug("%s(%s): 'port' subnode not found\n", |
| 389 | __func__, dev_read_name(dev)); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 390 | return -EINVAL; |
Philipp Tomsich | 13b016d | 2018-02-23 17:38:52 +0100 | [diff] [blame] | 391 | } |
| 392 | |
| 393 | for (node = ofnode_first_subnode(port); |
| 394 | ofnode_valid(node); |
| 395 | node = dev_read_next_subnode(node)) { |
Eric Gao | 58791c3 | 2017-05-02 18:23:53 +0800 | [diff] [blame] | 396 | ret = rk_display_init(dev, plat->base, node); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 397 | if (ret) |
| 398 | debug("Device failed: ret=%d\n", ret); |
| 399 | if (!ret) |
| 400 | break; |
| 401 | } |
Simon Glass | 773ca82 | 2016-05-14 14:03:01 -0600 | [diff] [blame] | 402 | video_set_flush_dcache(dev, 1); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 403 | |
| 404 | return ret; |
| 405 | } |
| 406 | |
Philipp Tomsich | a354c2d | 2017-05-31 17:59:30 +0200 | [diff] [blame] | 407 | int rk_vop_bind(struct udevice *dev) |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 408 | { |
| 409 | struct video_uc_platdata *plat = dev_get_uclass_platdata(dev); |
| 410 | |
Philipp Tomsich | d3a5826 | 2017-05-31 17:59:29 +0200 | [diff] [blame] | 411 | plat->size = 4 * (CONFIG_VIDEO_ROCKCHIP_MAX_XRES * |
| 412 | CONFIG_VIDEO_ROCKCHIP_MAX_YRES); |
Simon Glass | e421bb8 | 2016-01-21 19:45:05 -0700 | [diff] [blame] | 413 | |
| 414 | return 0; |
| 415 | } |