blob: 029a0cc6cde665b0ab8e81a29fa393c4fac07b58 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +05302/*
3 * (C) Copyright 2013 SAMSUNG Electronics
4 * Rajeshwari Shinde <rajeshwari.s@samsung.com>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +05305 */
6
7#include <common.h>
8#include <cros_ec.h>
Simon Glassed38aef2020-05-10 11:40:03 -06009#include <env.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053010#include <errno.h>
11#include <fdtdec.h>
Simon Glassf11478f2019-12-28 10:45:07 -070012#include <hang.h>
Simon Glassa7b51302019-11-14 12:57:46 -070013#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060014#include <log.h>
Simon Glass274e0b02020-05-10 11:39:56 -060015#include <net.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053016#include <spi.h>
17#include <tmu.h>
18#include <netdev.h>
19#include <asm/io.h>
Simon Glass37f11622014-10-20 19:48:37 -060020#include <asm/gpio.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053021#include <asm/arch/board.h>
22#include <asm/arch/cpu.h>
23#include <asm/arch/dwmmc.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053024#include <asm/arch/mmc.h>
25#include <asm/arch/pinmux.h>
26#include <asm/arch/power.h>
Ajay Kumar11763482014-09-05 16:53:30 +053027#include <asm/arch/system.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053028#include <asm/arch/sromc.h>
Piotr Wilczek2c3eed52014-03-07 14:59:45 +010029#include <lcd.h>
Przemyslaw Marczak110aa292015-04-20 20:07:50 +020030#include <i2c.h>
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +010031#include <mmc.h>
32#include <stdio_dev.h>
Lukasz Majewski7573b962015-03-03 17:32:03 +010033#include <usb.h>
Joonyoung Shim95d3a1d2015-05-22 18:14:24 +020034#include <dwc3-uboot.h>
Simon Glassdbd79542020-05-10 11:40:11 -060035#include <linux/delay.h>
Joonyoung Shim95d3a1d2015-05-22 18:14:24 +020036#include <samsung/misc.h>
Thomas Abraham8d84faa2016-04-23 22:18:14 +053037#include <dm/pinctrl.h>
38#include <dm.h>
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053039
40DECLARE_GLOBAL_DATA_PTR;
41
Jeroen Hofstee5cd82942014-10-08 22:57:28 +020042__weak int exynos_early_init_f(void)
Piotr Wilczek942d0a92014-03-07 14:59:43 +010043{
44 return 0;
45}
Piotr Wilczek942d0a92014-03-07 14:59:43 +010046
Jeroen Hofstee5cd82942014-10-08 22:57:28 +020047__weak int exynos_power_init(void)
Piotr Wilczek942d0a92014-03-07 14:59:43 +010048{
49 return 0;
50}
Piotr Wilczek942d0a92014-03-07 14:59:43 +010051
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +010052/**
53 * get_boot_mmc_dev() - read boot MMC device id from XOM[7:5] pins.
54 */
55static int get_boot_mmc_dev(void)
56{
57 u32 mode = readl(EXYNOS4_OP_MODE) & 0x1C;
58
59 if (mode == 0x04)
60 return 2; /* MMC2: SD */
61
62 /* MMC0: eMMC or unknown */
63 return 0;
64}
65
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +053066#if defined CONFIG_EXYNOS_TMU
67/* Boot Time Thermal Analysis for SoC temperature threshold breach */
68static void boot_temp_check(void)
69{
70 int temp;
71
72 switch (tmu_monitor(&temp)) {
73 case TMU_STATUS_NORMAL:
74 break;
75 case TMU_STATUS_TRIPPED:
76 /*
77 * Status TRIPPED ans WARNING means corresponding threshold
78 * breach
79 */
80 puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
81 set_ps_hold_ctrl();
82 hang();
83 break;
84 case TMU_STATUS_WARNING:
85 puts("EXYNOS_TMU: WARNING! Temperature very high\n");
86 break;
87 case TMU_STATUS_INIT:
88 /*
89 * TMU_STATUS_INIT means something is wrong with temperature
90 * sensing and TMU status was changed back from NORMAL to INIT.
91 */
92 puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
93 break;
94 default:
95 debug("EXYNOS_TMU: Unknown TMU state\n");
96 }
97}
98#endif
99
100int board_init(void)
101{
102 gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
103#if defined CONFIG_EXYNOS_TMU
104 if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
105 debug("%s: Failed to init TMU\n", __func__);
106 return -1;
107 }
108 boot_temp_check();
109#endif
Przemyslaw Marczakc32a04c2015-02-17 14:50:25 +0100110#ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
111 /* The last few MB of memory can be reserved for secure firmware */
112 ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530113
Przemyslaw Marczakc32a04c2015-02-17 14:50:25 +0100114 gd->ram_size -= size;
115 gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
116#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530117 return exynos_init();
118}
119
120int dram_init(void)
121{
Ɓukasz Majewski33d7a192015-03-04 10:54:48 +0100122 unsigned int i;
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530123 unsigned long addr;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530124
125 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
126 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
127 gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
128 }
129 return 0;
130}
131
Simon Glass2f949c32017-03-31 08:40:32 -0600132int dram_init_banksize(void)
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530133{
Ɓukasz Majewski33d7a192015-03-04 10:54:48 +0100134 unsigned int i;
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530135 unsigned long addr, size;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530136
137 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
138 addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
139 size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
140
141 gd->bd->bi_dram[i].start = addr;
142 gd->bd->bi_dram[i].size = size;
143 }
Simon Glass2f949c32017-03-31 08:40:32 -0600144
145 return 0;
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530146}
147
148static int board_uart_init(void)
149{
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530150#ifndef CONFIG_PINCTRL_EXYNOS
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530151 int err, uart_id, ret = 0;
152
153 for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
154 err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
155 if (err) {
156 debug("UART%d not configured\n",
157 (uart_id - PERIPH_ID_UART0));
158 ret |= err;
159 }
160 }
161 return ret;
Thomas Abraham8d84faa2016-04-23 22:18:14 +0530162#else
163 return 0;
164#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530165}
166
167#ifdef CONFIG_BOARD_EARLY_INIT_F
168int board_early_init_f(void)
169{
170 int err;
Przemyslaw Marczak4d2a92c2014-09-01 13:50:49 +0200171#ifdef CONFIG_BOARD_TYPES
172 set_board_type();
173#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530174 err = board_uart_init();
175 if (err) {
176 debug("UART init failed\n");
177 return err;
178 }
179
180#ifdef CONFIG_SYS_I2C_INIT_BOARD
181 board_i2c_init(gd->fdt_blob);
182#endif
Ajay Kumar11763482014-09-05 16:53:30 +0530183
Piotr Wilczek942d0a92014-03-07 14:59:43 +0100184 return exynos_early_init_f();
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530185}
186#endif
187
Przemyslaw Marczak110aa292015-04-20 20:07:50 +0200188#if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530189int power_init_board(void)
190{
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530191 set_ps_hold_ctrl();
192
Piotr Wilczek942d0a92014-03-07 14:59:43 +0100193 return exynos_power_init();
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530194}
195#endif
196
Piotr Wilczek2c3eed52014-03-07 14:59:45 +0100197#ifdef CONFIG_SMC911X
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530198static int decode_sromc(const void *blob, struct fdt_sromc *config)
199{
200 int err;
201 int node;
202
203 node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
204 if (node < 0) {
205 debug("Could not find SROMC node\n");
206 return node;
207 }
208
209 config->bank = fdtdec_get_int(blob, node, "bank", 0);
210 config->width = fdtdec_get_int(blob, node, "width", 2);
211
212 err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
213 FDT_SROM_TIMING_COUNT);
214 if (err < 0) {
215 debug("Could not decode SROMC configuration Error: %s\n",
216 fdt_strerror(err));
217 return -FDT_ERR_NOTFOUND;
218 }
219 return 0;
220}
Piotr Wilczek2c3eed52014-03-07 14:59:45 +0100221#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530222
223int board_eth_init(bd_t *bis)
224{
225#ifdef CONFIG_SMC911X
226 u32 smc_bw_conf, smc_bc_conf;
227 struct fdt_sromc config;
228 fdt_addr_t base_addr;
229 int node;
230
231 node = decode_sromc(gd->fdt_blob, &config);
232 if (node < 0) {
233 debug("%s: Could not find sromc configuration\n", __func__);
234 return 0;
235 }
236 node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
237 if (node < 0) {
238 debug("%s: Could not find lan9215 configuration\n", __func__);
239 return 0;
240 }
241
242 /* We now have a node, so any problems from now on are errors */
243 base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
244 if (base_addr == FDT_ADDR_T_NONE) {
245 debug("%s: Could not find lan9215 address\n", __func__);
246 return -1;
247 }
248
249 /* Ethernet needs data bus width of 16 bits */
250 if (config.width != 2) {
251 debug("%s: Unsupported bus width %d\n", __func__,
252 config.width);
253 return -1;
254 }
255 smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
256 | SROMC_BYTE_ENABLE(config.bank);
257
258 smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |
259 SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |
260 SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |
261 SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |
262 SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |
263 SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |
264 SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
265
266 /* Select and configure the SROMC bank */
267 exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
268 s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
269 return smc911x_initialize(0, base_addr);
270#endif
271 return 0;
272}
273
Krzysztof Kozlowskic51bd0b2019-03-06 19:37:52 +0100274#if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
Piotr Wilczek3df7aff2014-03-07 14:59:42 +0100275int checkboard(void)
276{
Simon Glass6ceeff42019-01-11 18:37:07 -0700277 if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
Krzysztof Kozlowski36476ee2019-03-06 19:37:51 +0100278 const char *board_info;
279
280 if (IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
281 /*
282 * Printing type requires having revision, although
283 * this will succeed only if done late.
284 * Otherwise revision will be set in misc_init_r().
285 */
286 set_board_revision();
287 }
288
289 board_info = get_board_type();
Simon Glass6ceeff42019-01-11 18:37:07 -0700290
291 if (board_info)
292 printf("Type: %s\n", board_info);
293 }
Piotr Wilczek3df7aff2014-03-07 14:59:42 +0100294
Piotr Wilczek3df7aff2014-03-07 14:59:42 +0100295 return 0;
296}
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530297#endif
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530298
299#ifdef CONFIG_BOARD_LATE_INIT
300int board_late_init(void)
301{
Simon Glassfe3f6432018-11-06 15:21:26 -0700302 struct udevice *dev;
303 int ret;
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +0100304 int mmcbootdev = get_boot_mmc_dev();
305 char mmcbootdev_str[16];
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530306
Simon Glassfe3f6432018-11-06 15:21:26 -0700307 stdio_print_current_devices();
308 ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
309 if (ret && ret != -ENODEV) {
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530310 /* Force console on */
311 gd->flags &= ~GD_FLG_SILENT;
312
Simon Glassfe3f6432018-11-06 15:21:26 -0700313 printf("cros-ec communications failure %d\n", ret);
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530314 puts("\nPlease reset with Power+Refresh\n\n");
315 panic("Cannot init cros-ec device");
316 return -1;
317 }
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +0100318
319 printf("Boot device: MMC(%u)\n", mmcbootdev);
320 sprintf(mmcbootdev_str, "%u", mmcbootdev);
321 env_set("mmcbootdev", mmcbootdev_str);
322
Rajeshwari Birje987b0dd2013-12-26 09:44:17 +0530323 return 0;
324}
325#endif
326
Piotr Wilczek2c3eed52014-03-07 14:59:45 +0100327#ifdef CONFIG_MISC_INIT_R
328int misc_init_r(void)
329{
Krzysztof Kozlowski36476ee2019-03-06 19:37:51 +0100330 if (IS_ENABLED(CONFIG_BOARD_TYPES) &&
331 !IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
332 /*
333 * If revision was not set by late display boardinfo,
334 * set it here. At this point regulators should be already
335 * available.
336 */
337 set_board_revision();
338 }
339
Piotr Wilczek2c3eed52014-03-07 14:59:45 +0100340#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
341 set_board_info();
342#endif
343#ifdef CONFIG_LCD_MENU
344 keys_init();
345 check_boot_mode();
346#endif
347#ifdef CONFIG_CMD_BMP
348 if (panel_info.logo_on)
349 draw_logo();
350#endif
351 return 0;
352}
353#endif
Joonyoung Shim7a3e8062015-01-15 11:45:56 +0900354
355void reset_misc(void)
356{
357 struct gpio_desc gpio = {};
358 int node;
359
360 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
361 "samsung,emmc-reset");
362 if (node < 0)
363 return;
364
Simon Glass1d9af1f2017-05-30 21:47:09 -0600365 gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpio", 0,
366 &gpio, GPIOD_IS_OUT);
Joonyoung Shim7a3e8062015-01-15 11:45:56 +0900367
368 if (dm_gpio_is_valid(&gpio)) {
369 /*
370 * Reset eMMC
371 *
372 * FIXME: Need to optimize delay time. Minimum 1usec pulse is
373 * required by 'JEDEC Standard No.84-A441' (eMMC)
374 * document but real delay time is expected to greater
375 * than 1usec.
376 */
377 dm_gpio_set_value(&gpio, 0);
378 mdelay(10);
379 dm_gpio_set_value(&gpio, 1);
380 }
381}
Lukasz Majewski7573b962015-03-03 17:32:03 +0100382
383int board_usb_cleanup(int index, enum usb_init_type init)
384{
Joonyoung Shim95d3a1d2015-05-22 18:14:24 +0200385#ifdef CONFIG_USB_DWC3
386 dwc3_uboot_exit(index);
387#endif
Lukasz Majewski7573b962015-03-03 17:32:03 +0100388 return 0;
389}
Marek Szyprowskibc4a2e32020-01-17 14:02:44 +0100390
391int mmc_get_env_dev(void)
392{
393 return get_boot_mmc_dev();
394}