Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | / { |
| 7 | chosen { |
| 8 | stdout-path = "serial2:115200n8"; |
| 9 | tick-timer = &timer1; |
| 10 | }; |
Aswath Govindraju | a15380e | 2021-07-26 20:58:03 +0530 | [diff] [blame] | 11 | |
| 12 | aliases { |
| 13 | mmc1 = &sdhci1; |
| 14 | }; |
Georgi Vlaev | d4d0db1 | 2022-05-20 15:30:26 +0300 | [diff] [blame] | 15 | |
| 16 | memory@80000000 { |
| 17 | u-boot,dm-spl; |
| 18 | }; |
Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 19 | }; |
| 20 | |
| 21 | &cbass_main{ |
| 22 | u-boot,dm-spl; |
| 23 | timer1: timer@2400000 { |
| 24 | compatible = "ti,omap5430-timer"; |
| 25 | reg = <0x0 0x2400000 0x0 0x80>; |
| 26 | ti,timer-alwon; |
Vignesh Raghavendra | f113fce | 2022-03-11 21:23:22 +0530 | [diff] [blame] | 27 | clock-frequency = <200000000>; |
Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 28 | u-boot,dm-spl; |
| 29 | }; |
| 30 | }; |
| 31 | |
| 32 | &main_conf { |
| 33 | u-boot,dm-spl; |
| 34 | chipid@14 { |
| 35 | u-boot,dm-spl; |
| 36 | }; |
| 37 | }; |
| 38 | |
| 39 | &main_pmx0 { |
| 40 | u-boot,dm-spl; |
| 41 | main_i2c0_pins_default: main-i2c0-pins-default { |
| 42 | u-boot,dm-spl; |
| 43 | pinctrl-single,pins = < |
| 44 | AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ |
| 45 | AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ |
| 46 | >; |
| 47 | }; |
| 48 | }; |
| 49 | |
| 50 | &main_i2c0 { |
| 51 | u-boot,dm-spl; |
| 52 | pinctrl-names = "default"; |
| 53 | pinctrl-0 = <&main_i2c0_pins_default>; |
| 54 | clock-frequency = <400000>; |
Neil Armstrong | a47a3f8 | 2022-04-27 13:28:12 +0200 | [diff] [blame] | 55 | |
| 56 | tps65219: pmic@30 { |
| 57 | compatible = "ti,tps65219"; |
| 58 | reg = <0x30>; |
| 59 | |
| 60 | regulators { |
| 61 | buck1_reg: buck1 { |
| 62 | regulator-name = "VDD_CORE"; |
| 63 | regulator-min-microvolt = <750000>; |
| 64 | regulator-max-microvolt = <750000>; |
| 65 | regulator-boot-on; |
| 66 | regulator-always-on; |
| 67 | }; |
| 68 | |
| 69 | buck2_reg: buck2 { |
| 70 | regulator-name = "VCC1V8"; |
| 71 | regulator-min-microvolt = <1800000>; |
| 72 | regulator-max-microvolt = <1800000>; |
| 73 | regulator-boot-on; |
| 74 | regulator-always-on; |
| 75 | }; |
| 76 | |
| 77 | buck3_reg: buck3 { |
| 78 | regulator-name = "VDD_LPDDR4"; |
| 79 | regulator-min-microvolt = <1100000>; |
| 80 | regulator-max-microvolt = <1100000>; |
| 81 | regulator-boot-on; |
| 82 | regulator-always-on; |
| 83 | }; |
| 84 | |
| 85 | ldo1_reg: ldo1 { |
| 86 | regulator-name = "VDDSHV_SD_IO_PMIC"; |
| 87 | regulator-min-microvolt = <33000000>; |
| 88 | regulator-max-microvolt = <33000000>; |
| 89 | }; |
| 90 | |
| 91 | ldo2_reg: ldo2 { |
| 92 | regulator-name = "VDDAR_CORE"; |
| 93 | regulator-min-microvolt = <850000>; |
| 94 | regulator-max-microvolt = <850000>; |
| 95 | regulator-boot-on; |
| 96 | regulator-always-on; |
| 97 | }; |
| 98 | |
| 99 | ldo3_reg: ldo3 { |
| 100 | regulator-name = "VDDA_1V8"; |
| 101 | regulator-min-microvolt = <18000000>; |
| 102 | regulator-max-microvolt = <18000000>; |
| 103 | regulator-boot-on; |
| 104 | regulator-always-on; |
| 105 | }; |
| 106 | |
| 107 | ldo4_reg: ldo4 { |
| 108 | regulator-name = "VDD_PHY_2V5"; |
| 109 | regulator-min-microvolt = <25000000>; |
| 110 | regulator-max-microvolt = <25000000>; |
| 111 | regulator-boot-on; |
| 112 | regulator-always-on; |
| 113 | }; |
| 114 | }; |
| 115 | }; |
Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 116 | }; |
| 117 | |
| 118 | &main_uart0 { |
| 119 | u-boot,dm-spl; |
| 120 | }; |
| 121 | |
| 122 | &dmss { |
| 123 | u-boot,dm-spl; |
| 124 | }; |
| 125 | |
| 126 | &secure_proxy_main { |
| 127 | u-boot,dm-spl; |
| 128 | }; |
| 129 | |
| 130 | &dmsc { |
| 131 | u-boot,dm-spl; |
Suman Anna | 91eda10 | 2021-05-13 20:10:57 -0500 | [diff] [blame] | 132 | k3_sysreset: sysreset-controller { |
| 133 | compatible = "ti,sci-sysreset"; |
| 134 | u-boot,dm-spl; |
| 135 | }; |
Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 136 | }; |
| 137 | |
| 138 | &k3_pds { |
| 139 | u-boot,dm-spl; |
| 140 | }; |
| 141 | |
| 142 | &k3_clks { |
| 143 | u-boot,dm-spl; |
| 144 | }; |
| 145 | |
| 146 | &k3_reset { |
| 147 | u-boot,dm-spl; |
| 148 | }; |
| 149 | |
| 150 | &sdhci0 { |
Aswath Govindraju | a15380e | 2021-07-26 20:58:03 +0530 | [diff] [blame] | 151 | status = "disabled"; |
Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 152 | u-boot,dm-spl; |
| 153 | }; |
| 154 | |
| 155 | &sdhci1 { |
| 156 | u-boot,dm-spl; |
| 157 | }; |
| 158 | |
| 159 | &main_mmc1_pins_default { |
| 160 | u-boot,dm-spl; |
| 161 | }; |
Vignesh Raghavendra | c23d7f3 | 2021-05-10 20:06:13 +0530 | [diff] [blame] | 162 | |
| 163 | &cpsw3g { |
| 164 | reg = <0x0 0x8000000 0x0 0x200000>, |
| 165 | <0x0 0x43000200 0x0 0x8>; |
| 166 | reg-names = "cpsw_nuss", "mac_efuse"; |
| 167 | /delete-property/ ranges; |
Vignesh Raghavendra | 1495358 | 2021-12-24 12:55:35 +0530 | [diff] [blame] | 168 | u-boot,dm-spl; |
Vignesh Raghavendra | c23d7f3 | 2021-05-10 20:06:13 +0530 | [diff] [blame] | 169 | |
| 170 | cpsw-phy-sel@04044 { |
| 171 | compatible = "ti,am64-phy-gmii-sel"; |
| 172 | reg = <0x0 0x43004044 0x0 0x8>; |
Vignesh Raghavendra | 1495358 | 2021-12-24 12:55:35 +0530 | [diff] [blame] | 173 | u-boot,dm-spl; |
| 174 | }; |
| 175 | |
| 176 | ethernet-ports { |
| 177 | u-boot,dm-spl; |
Vignesh Raghavendra | c23d7f3 | 2021-05-10 20:06:13 +0530 | [diff] [blame] | 178 | }; |
| 179 | }; |
| 180 | |
| 181 | &cpsw_port2 { |
Vignesh Raghavendra | 1495358 | 2021-12-24 12:55:35 +0530 | [diff] [blame] | 182 | u-boot,dm-spl; |
| 183 | }; |
| 184 | |
Vignesh Raghavendra | 1495358 | 2021-12-24 12:55:35 +0530 | [diff] [blame] | 185 | &main_bcdma { |
| 186 | u-boot,dm-spl; |
| 187 | }; |
| 188 | |
| 189 | &main_pktdma { |
| 190 | u-boot,dm-spl; |
| 191 | }; |
| 192 | |
| 193 | &rgmii1_pins_default { |
| 194 | u-boot,dm-spl; |
| 195 | }; |
| 196 | |
| 197 | &rgmii2_pins_default { |
| 198 | u-boot,dm-spl; |
| 199 | }; |
| 200 | |
| 201 | &mdio1_pins_default { |
| 202 | u-boot,dm-spl; |
| 203 | }; |
| 204 | |
Vignesh Raghavendra | 1495358 | 2021-12-24 12:55:35 +0530 | [diff] [blame] | 205 | &cpsw3g_phy1 { |
| 206 | u-boot,dm-spl; |
Vignesh Raghavendra | c23d7f3 | 2021-05-10 20:06:13 +0530 | [diff] [blame] | 207 | }; |
Kishon Vijay Abraham I | 35c392c | 2021-10-20 21:09:12 +0530 | [diff] [blame] | 208 | |
| 209 | &main_usb0_pins_default { |
| 210 | u-boot,dm-spl; |
| 211 | }; |
| 212 | |
| 213 | &serdes_ln_ctrl { |
| 214 | u-boot,mux-autoprobe; |
| 215 | }; |
| 216 | |
| 217 | &usbss0 { |
| 218 | u-boot,dm-spl; |
| 219 | }; |
| 220 | |
| 221 | &usb0 { |
| 222 | dr_mode = "host"; |
| 223 | u-boot,dm-spl; |
| 224 | }; |
| 225 | |
| 226 | &serdes_wiz0 { |
| 227 | u-boot,dm-spl; |
| 228 | }; |
| 229 | |
| 230 | &serdes0_usb_link { |
| 231 | u-boot,dm-spl; |
| 232 | }; |
| 233 | |
| 234 | &serdes0 { |
| 235 | u-boot,dm-spl; |
| 236 | }; |
| 237 | |
| 238 | &serdes_refclk { |
| 239 | u-boot,dm-spl; |
| 240 | }; |