Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | / { |
| 7 | chosen { |
| 8 | stdout-path = "serial2:115200n8"; |
| 9 | tick-timer = &timer1; |
| 10 | }; |
| 11 | }; |
| 12 | |
| 13 | &cbass_main{ |
| 14 | u-boot,dm-spl; |
| 15 | timer1: timer@2400000 { |
| 16 | compatible = "ti,omap5430-timer"; |
| 17 | reg = <0x0 0x2400000 0x0 0x80>; |
| 18 | ti,timer-alwon; |
| 19 | clock-frequency = <250000000>; |
| 20 | u-boot,dm-spl; |
| 21 | }; |
| 22 | }; |
| 23 | |
| 24 | &main_conf { |
| 25 | u-boot,dm-spl; |
| 26 | chipid@14 { |
| 27 | u-boot,dm-spl; |
| 28 | }; |
| 29 | }; |
| 30 | |
| 31 | &main_pmx0 { |
| 32 | u-boot,dm-spl; |
| 33 | main_i2c0_pins_default: main-i2c0-pins-default { |
| 34 | u-boot,dm-spl; |
| 35 | pinctrl-single,pins = < |
| 36 | AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */ |
| 37 | AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */ |
| 38 | >; |
| 39 | }; |
| 40 | }; |
| 41 | |
| 42 | &main_i2c0 { |
| 43 | u-boot,dm-spl; |
| 44 | pinctrl-names = "default"; |
| 45 | pinctrl-0 = <&main_i2c0_pins_default>; |
| 46 | clock-frequency = <400000>; |
| 47 | }; |
| 48 | |
| 49 | &main_uart0 { |
| 50 | u-boot,dm-spl; |
| 51 | }; |
| 52 | |
| 53 | &dmss { |
| 54 | u-boot,dm-spl; |
| 55 | }; |
| 56 | |
| 57 | &secure_proxy_main { |
| 58 | u-boot,dm-spl; |
| 59 | }; |
| 60 | |
| 61 | &dmsc { |
| 62 | u-boot,dm-spl; |
Suman Anna | 91eda10 | 2021-05-13 20:10:57 -0500 | [diff] [blame^] | 63 | k3_sysreset: sysreset-controller { |
| 64 | compatible = "ti,sci-sysreset"; |
| 65 | u-boot,dm-spl; |
| 66 | }; |
Lokesh Vutla | 3d10ca8 | 2021-05-06 16:44:59 +0530 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | &k3_pds { |
| 70 | u-boot,dm-spl; |
| 71 | }; |
| 72 | |
| 73 | &k3_clks { |
| 74 | u-boot,dm-spl; |
| 75 | }; |
| 76 | |
| 77 | &k3_reset { |
| 78 | u-boot,dm-spl; |
| 79 | }; |
| 80 | |
| 81 | &sdhci0 { |
| 82 | u-boot,dm-spl; |
| 83 | }; |
| 84 | |
| 85 | &sdhci1 { |
| 86 | u-boot,dm-spl; |
| 87 | }; |
| 88 | |
| 89 | &main_mmc1_pins_default { |
| 90 | u-boot,dm-spl; |
| 91 | }; |
Vignesh Raghavendra | c23d7f3 | 2021-05-10 20:06:13 +0530 | [diff] [blame] | 92 | |
| 93 | &cpsw3g { |
| 94 | reg = <0x0 0x8000000 0x0 0x200000>, |
| 95 | <0x0 0x43000200 0x0 0x8>; |
| 96 | reg-names = "cpsw_nuss", "mac_efuse"; |
| 97 | /delete-property/ ranges; |
| 98 | |
| 99 | cpsw-phy-sel@04044 { |
| 100 | compatible = "ti,am64-phy-gmii-sel"; |
| 101 | reg = <0x0 0x43004044 0x0 0x8>; |
| 102 | }; |
| 103 | }; |
| 104 | |
| 105 | &cpsw_port2 { |
| 106 | status = "disabled"; |
| 107 | }; |