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git01.mediatek.com / filogic / uboot / c390c363cd89fafbe1410cdbab9684afeaea6e6a / . / configs / am62x_evm_a53_defconfig
blob: df2511546eab7fbe55df8e30ab0e9e176914b048 [file] [log] [blame]
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_K3=y
3CONFIG_SYS_MALLOC_F_LEN=0x8000
4CONFIG_SPL_LIBCOMMON_SUPPORT=y
5CONFIG_SPL_LIBGENERIC_SUPPORT=y
6CONFIG_NR_DRAM_BANKS=2
7CONFIG_SOC_K3_AM625=y
8CONFIG_K3_ATF_LOAD_ADDR=0x9e780000
9CONFIG_TARGET_AM625_A53_EVM=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]10CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
Nikhil M Jaind0699df2023-04-10 14:19:10 +0530[diff] [blame]11CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]12CONFIG_SF_DEFAULT_SPEED=25000000
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]13CONFIG_SPL_DM_SPI=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]14CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk"
15CONFIG_SPL_TEXT_BASE=0x80080000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]16CONFIG_OF_LIBFDT_OVERLAY=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]17CONFIG_DM_RESET=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]18CONFIG_SPL_MMC=y
19CONFIG_SPL_SERIAL=y
20CONFIG_SPL_STACK_R_ADDR=0x82000000
Nikhil M Jaind0699df2023-04-10 14:19:10 +0530[diff] [blame]21CONFIG_SPL_SIZE_LIMIT=0x40000
22CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x800
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]23CONFIG_SPL_FS_FAT=y
24CONFIG_SPL_LIBDISK_SUPPORT=y
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]25CONFIG_SPL_SPI_FLASH_SUPPORT=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]26CONFIG_SPL_SPI=y
Jan Kiszka262b6902023-08-25 13:03:01 -0500[diff] [blame]27# CONFIG_PSCI_RESET is not set
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]28# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
29CONFIG_SPL_LOAD_FIT=y
30CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000
Nishanth Menon4b2a1412023-08-25 13:02:52 -0500[diff] [blame]31CONFIG_BOOTSTD_FULL=y
32CONFIG_BOOTSTD_DEFAULTS=y
33CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb"
Manorit Chawdhryc0d1bf82023-07-25 13:09:18 +0530[diff] [blame]34CONFIG_SPL_MAX_SIZE=0x58000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]35CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
Nikhil M Jaind0699df2023-04-10 14:19:10 +0530[diff] [blame]36CONFIG_SPL_BSS_START_ADDR=0x80c80000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]37CONFIG_SPL_BSS_MAX_SIZE=0x80000
Nikhil M Jaind0699df2023-04-10 14:19:10 +0530[diff] [blame]38CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]39CONFIG_SPL_SYS_MALLOC_SIMPLE=y
40CONFIG_SPL_STACK_R=y
41CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
42CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400
43CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
44CONFIG_SPL_DM_MAILBOX=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]45CONFIG_SPL_DM_SPI_FLASH=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]46CONFIG_SPL_POWER_DOMAIN=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]47# CONFIG_SPL_SPI_FLASH_TINY is not set
48CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]49CONFIG_SPL_SPI_LOAD=y
50CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]51CONFIG_SPL_YMODEM_SUPPORT=y
Tom Rinif3c2f992022-06-25 19:29:46 -0400[diff] [blame]52CONFIG_SYS_BOOTM_LEN=0x800000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]53CONFIG_CMD_MMC=y
54CONFIG_OF_CONTROL=y
55CONFIG_SPL_OF_CONTROL=y
56CONFIG_MULTI_DTB_FIT=y
57CONFIG_SPL_MULTI_DTB_FIT=y
58CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
59CONFIG_NET_RANDOM_ETHADDR=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]60CONFIG_SPL_DM=y
61CONFIG_SPL_DM_SEQ_ALIAS=y
62CONFIG_REGMAP=y
63CONFIG_SPL_REGMAP=y
64CONFIG_SPL_OF_TRANSLATE=y
65CONFIG_CLK=y
66CONFIG_SPL_CLK=y
67CONFIG_CLK_TI_SCI=y
Sjoerd Simonse3a4b372022-12-20 16:21:46 +0100[diff] [blame]68CONFIG_DMA_CHANNELS=y
69CONFIG_TI_K3_NAVSS_UDMA=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]70CONFIG_TI_SCI_PROTOCOL=y
71CONFIG_DM_MAILBOX=y
72CONFIG_K3_SEC_PROXY=y
Nishanth Menoncb897512023-08-25 13:02:59 -0500[diff] [blame]73CONFIG_SUPPORT_EMMC_BOOT=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]74CONFIG_MMC_SDHCI=y
75CONFIG_MMC_SDHCI_ADMA=y
76CONFIG_SPL_MMC_SDHCI_ADMA=y
77CONFIG_MMC_SDHCI_AM654=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]78CONFIG_DM_SPI_FLASH=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]79CONFIG_SPI_FLASH_SFDP_SUPPORT=y
80CONFIG_SPI_FLASH_SOFT_RESET=y
81CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
82CONFIG_SPI_FLASH_SPANSION=y
Sjoerd Simonse6cc0412022-12-20 16:21:43 +0100[diff] [blame]83CONFIG_SPI_FLASH_S28HX_T=y
Sjoerd Simonse3a4b372022-12-20 16:21:46 +0100[diff] [blame]84CONFIG_PHY_TI_DP83867=y
85CONFIG_PHY_FIXED=y
86CONFIG_TI_AM65_CPSW_NUSS=y
87CONFIG_PHY=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]88CONFIG_PINCTRL=y
89CONFIG_SPL_PINCTRL=y
90CONFIG_PINCTRL_SINGLE=y
91CONFIG_POWER_DOMAIN=y
92CONFIG_TI_SCI_POWER_DOMAIN=y
93CONFIG_K3_SYSTEM_CONTROLLER=y
94CONFIG_REMOTEPROC_TI_K3_ARM64=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]95CONFIG_RESET_TI_SCI=y
96CONFIG_DM_SERIAL=y
97CONFIG_SOC_DEVICE=y
98CONFIG_SOC_DEVICE_TI_K3=y
99CONFIG_SOC_TI=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]100CONFIG_SPI=y
101CONFIG_DM_SPI=y
102CONFIG_CADENCE_QSPI=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]103CONFIG_SYSRESET=y
104CONFIG_SPL_SYSRESET=y
105CONFIG_SYSRESET_TI_SCI=y
106CONFIG_FS_FAT_MAX_CLUSTSIZE=16384