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Jagan Teki783acfd2020-01-09 14:22:17 +05301/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2/*
3 * (C) Copyright 2019 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7#ifndef _ROCKCHIP_CLOCK_H
8#define _ROCKCHIP_CLOCK_H
9
Simon Glass4dcacfc2020-05-10 11:40:13 -060010#ifndef __ASSEMBLY__
11#include <linux/bitops.h>
12#endif
13
Jagan Teki783acfd2020-01-09 14:22:17 +053014#if defined(CONFIG_ROCKCHIP_RK3288)
15# include <asm/arch-rockchip/cru_rk3288.h>
16#elif defined(CONFIG_ROCKCHIP_RK3399)
17# include <asm/arch-rockchip/cru_rk3399.h>
Anton9a95efd2023-08-07 10:04:46 +030018#elif defined(CONFIG_ROCKCHIP_RK3568)
19#include <asm/arch-rockchip/cru_rk3568.h>
FUKAUMI Naoki58159692024-06-19 04:30:44 +090020#elif defined(CONFIG_ROCKCHIP_RK3588)
21#include <asm/arch-rockchip/cru_rk3588.h>
Jagan Teki783acfd2020-01-09 14:22:17 +053022#endif
23
Jagan Teki4fe57d22020-01-09 14:22:18 +053024/* CRU_GLB_RST_ST */
25enum {
26 GLB_POR_RST,
27 FST_GLB_RST_ST = BIT(0),
28 SND_GLB_RST_ST = BIT(1),
29 FST_GLB_TSADC_RST_ST = BIT(2),
30 SND_GLB_TSADC_RST_ST = BIT(3),
31 FST_GLB_WDT_RST_ST = BIT(4),
32 SND_GLB_WDT_RST_ST = BIT(5),
Jagan Teki4fe57d22020-01-09 14:22:18 +053033};
34
Jagan Teki783acfd2020-01-09 14:22:17 +053035#define MHz 1000000
36
Jagan Teki5bbc86b2020-07-21 20:36:03 +053037char *get_reset_cause(void);
38
Jagan Teki783acfd2020-01-09 14:22:17 +053039#endif /* _ROCKCHIP_CLOCK_H */