blob: f6871708dcb66cce8bf237cad371923ef88aa037 [file] [log] [blame]
Thomas Chou7ffbbf52010-04-21 08:40:59 +08001/*
2 * (C) Copyright 2005, Psyent Corporation <www.psyent.com>
3 * Scott McNutt <smcnutt@psyent.com>
4 * (C) Copyright 2010, Thomas Chou <thomas@wytron.com.tw>
5 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
Thomas Chou7ffbbf52010-04-21 08:40:59 +08007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * BOARD/CPU
14 */
Thomas Choucce3e752014-08-22 11:36:47 +080015#define CONFIG_DISPLAY_CPUINFO
Thomas Chou36b9c9a2015-10-14 08:43:31 +080016#define CONFIG_DISPLAY_BOARDINFO_LATE
Thomas Chou7ffbbf52010-04-21 08:40:59 +080017
18/*
19 * SERIAL
20 */
Thomas Chou6917a5d2015-10-21 21:26:54 +080021#define CONFIG_BAUDRATE 115200
Thomas Chou7ffbbf52010-04-21 08:40:59 +080022#define CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress console info */
23
24/*
Thomas Chou4d7d92f2015-10-23 14:55:36 +080025 * CFI Flash
26 */
27#define CONFIG_SYS_FLASH_BASE 0xe0000000
28#define CONFIG_FLASH_CFI_DRIVER
29#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */
30#define CONFIG_SYS_FLASH_CFI
31#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
32#define CONFIG_SYS_FLASH_PROTECTION
33#define CONFIG_SYS_MAX_FLASH_BANKS 1
34#define CONFIG_SYS_MAX_FLASH_SECT 512
35
36/*
Thomas Chouec06dd82015-10-22 15:29:11 +080037 * MII/PHY
38 */
Thomas Chouba5316e2015-10-29 16:43:46 +080039#define CONFIG_CMD_MII
40#define CONFIG_PHY_GIGE
41#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
42#define CONFIG_PHY_MARVELL
Thomas Chouec06dd82015-10-22 15:29:11 +080043
44/*
Thomas Chou7ffbbf52010-04-21 08:40:59 +080045 * BOOTP options
46 */
47#define CONFIG_BOOTP_BOOTFILESIZE
48#define CONFIG_BOOTP_BOOTPATH
49#define CONFIG_BOOTP_GATEWAY
50#define CONFIG_BOOTP_HOSTNAME
51
52/*
Thomas Chou44d3cf42015-08-26 21:24:35 +080053 * FDT options
Thomas Chou7ffbbf52010-04-21 08:40:59 +080054 */
Thomas Chou2f8e2562014-08-30 17:45:23 +080055#define CONFIG_OF_LIBFDT
56#define CONFIG_OF_BOARD_SETUP
57#define CONFIG_LMB
58
Thomas Chou7ffbbf52010-04-21 08:40:59 +080059/*
60 * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above
61 * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the
62 * reset address, no? This will keep the environment in user region
63 * of flash. NOTE: the monitor length must be multiple of sector size
64 * (which is common practice).
65 */
66#define CONFIG_ENV_IS_IN_FLASH
67
Thomas Chou4d7d92f2015-10-23 14:55:36 +080068#define CONFIG_ENV_SIZE 0x20000 /* 128k, 1 sector */
Thomas Chou7ffbbf52010-04-21 08:40:59 +080069#define CONFIG_ENV_OVERWRITE /* Serial change Ok */
Thomas Chou4d7d92f2015-10-23 14:55:36 +080070#define CONFIG_ENV_ADDR 0xe2840000
Thomas Chou7ffbbf52010-04-21 08:40:59 +080071
72/*
73 * MEMORY ORGANIZATION
Thomas Choufe06c182012-04-23 10:55:02 +080074 * -Monitor at top of sdram.
75 * -The heap is placed below the monitor
76 * -The stack is placed below the heap (&grows down).
Thomas Chou7ffbbf52010-04-21 08:40:59 +080077 */
Thomas Chou4d7d92f2015-10-23 14:55:36 +080078#define CONFIG_SYS_SDRAM_BASE 0xD0000000
79#define CONFIG_SYS_SDRAM_SIZE 0x08000000
Thomas Chou41d02bb2015-10-27 10:21:06 +080080#define CONFIG_NR_DRAM_BANKS 1
Thomas Chou7ffbbf52010-04-21 08:40:59 +080081#define CONFIG_MONITOR_IS_IN_RAM
82#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256k */
83#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \
84 CONFIG_SYS_SDRAM_SIZE - \
85 CONFIG_SYS_MONITOR_LEN)
Thomas Chouc2ec5f82015-11-04 13:28:29 +080086#define CONFIG_SYS_MALLOC_LEN 0x20000
Thomas Chou7ffbbf52010-04-21 08:40:59 +080087
88/*
89 * MISC
90 */
91#define CONFIG_SYS_LONGHELP /* Provide extended help */
Thomas Chou7ffbbf52010-04-21 08:40:59 +080092#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */
93#define CONFIG_SYS_MAXARGS 16 /* Max command args */
94#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Bootarg buf size */
95#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
96 sizeof(CONFIG_SYS_PROMPT) + \
97 16) /* Print buf size */
98#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
99#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
100#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - 0x20000)
101#define CONFIG_CMDLINE_EDITING
Thomas Choufb1a4bf2015-10-21 21:33:45 +0800102#define CONFIG_CMD_GPIO
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800103
Thomas Chou7ffbbf52010-04-21 08:40:59 +0800104#endif /* __CONFIG_H */