blob: 23de14bdd816f0126d182b4b2a8c90f6578983db [file] [log] [blame]
Graeme Russ85cc39f2009-02-24 21:14:32 +11001/*
2 * (C) Copyright 2002
3 * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/* stuff specific for the sc520, but independent of implementation */
25
26#include <common.h>
27#include <asm/interrupt.h>
28#include <asm/ic/sc520.h>
29
Graeme Russ7679d1f2009-02-24 21:14:45 +110030void sc520_timer_isr(void)
Graeme Russ85cc39f2009-02-24 21:14:32 +110031{
Graeme Russ7679d1f2009-02-24 21:14:45 +110032 /* Ack the GP Timer Interrupt */
Graeme Russ1d977dc2009-08-23 12:59:56 +100033 sc520_mmcr->gptmrsta = 0x02;
Graeme Russ85cc39f2009-02-24 21:14:32 +110034}
35
Graeme Russ7679d1f2009-02-24 21:14:45 +110036int timer_init(void)
Graeme Russ85cc39f2009-02-24 21:14:32 +110037{
Graeme Russ7679d1f2009-02-24 21:14:45 +110038 /* Map GP Timer 1 to Master PIC IR0 */
Graeme Russ1d977dc2009-08-23 12:59:56 +100039 sc520_mmcr->gp_tmr_int_map[1] = 0x01;
Graeme Russ85cc39f2009-02-24 21:14:32 +110040
Graeme Russ7679d1f2009-02-24 21:14:45 +110041 /* Disable GP Timers 1 & 2 - Allow configuration writes */
Graeme Russ1d977dc2009-08-23 12:59:56 +100042 sc520_mmcr->gptmr1ctl = 0x4000;
43 sc520_mmcr->gptmr2ctl = 0x4000;
Graeme Russ85cc39f2009-02-24 21:14:32 +110044
Graeme Russ7679d1f2009-02-24 21:14:45 +110045 /* Reset GP Timers 1 & 2 */
Graeme Russ1d977dc2009-08-23 12:59:56 +100046 sc520_mmcr->gptmr1cnt = 0x0000;
47 sc520_mmcr->gptmr2cnt = 0x0000;
Graeme Russ7679d1f2009-02-24 21:14:45 +110048
49 /* Setup GP Timer 2 as a 100kHz (10us) prescaler */
Graeme Russ1d977dc2009-08-23 12:59:56 +100050 sc520_mmcr->gptmr2maxcmpa = 83;
51 sc520_mmcr->gptmr2ctl = 0xc001;
Graeme Russ7679d1f2009-02-24 21:14:45 +110052
53 /* Setup GP Timer 1 as a 1000 Hz (1ms) interrupt generator */
Graeme Russ1d977dc2009-08-23 12:59:56 +100054 sc520_mmcr->gptmr1maxcmpa = 100;
55 sc520_mmcr->gptmr1ctl = 0xe009;
Graeme Russ7679d1f2009-02-24 21:14:45 +110056
Graeme Russ7679d1f2009-02-24 21:14:45 +110057 /* Register the SC520 specific timer interrupt handler */
58 register_timer_isr (sc520_timer_isr);
59
60 /* Install interrupt handler for GP Timer 1 */
61 irq_install_handler (0, timer_isr, NULL);
62 unmask_irq (0);
63
Graeme Russcf2fb0c2009-08-23 12:59:49 +100064 /* Clear the GP Timer 1 status register to get the show rolling*/
Graeme Russ1d977dc2009-08-23 12:59:56 +100065 sc520_mmcr->gptmrsta = 0x02;
Graeme Russcf2fb0c2009-08-23 12:59:49 +100066
Graeme Russ7679d1f2009-02-24 21:14:45 +110067 return 0;
68}
Graeme Russ85cc39f2009-02-24 21:14:32 +110069
70void udelay(unsigned long usec)
71{
Graeme Russ7679d1f2009-02-24 21:14:45 +110072 int m = 0;
Graeme Russ85cc39f2009-02-24 21:14:32 +110073 long u;
Graeme Russ1d977dc2009-08-23 12:59:56 +100074 long temp;
Graeme Russ85cc39f2009-02-24 21:14:32 +110075
Graeme Russ1d977dc2009-08-23 12:59:56 +100076 temp = sc520_mmcr->swtmrmilli;
77 temp = sc520_mmcr->swtmrmicro;
Graeme Russ85cc39f2009-02-24 21:14:32 +110078
Graeme Russ7679d1f2009-02-24 21:14:45 +110079 do {
Graeme Russ1d977dc2009-08-23 12:59:56 +100080 m += sc520_mmcr->swtmrmilli;
81 u = sc520_mmcr->swtmrmicro + (m * 1000);
Graeme Russ7679d1f2009-02-24 21:14:45 +110082 } while (u < usec);
Graeme Russ85cc39f2009-02-24 21:14:32 +110083}