| Michal Simek | eb1dfa7 | 2013-02-04 12:38:59 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013 Xilinx Inc. |
| 3 | * |
| Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
| Michal Simek | eb1dfa7 | 2013-02-04 12:38:59 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef _SYS_PROTO_H_ |
| 8 | #define _SYS_PROTO_H_ |
| 9 | |
| 10 | extern void zynq_slcr_lock(void); |
| 11 | extern void zynq_slcr_unlock(void); |
| 12 | extern void zynq_slcr_cpu_reset(void); |
| Michal Simek | d9f2c11 | 2012-10-15 14:01:23 +0200 | [diff] [blame] | 13 | extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk); |
| Michal Simek | 15d654c | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 14 | extern void zynq_slcr_devcfg_disable(void); |
| 15 | extern void zynq_slcr_devcfg_enable(void); |
| Jagannadha Sutradharudu Teki | 11704c2 | 2014-01-09 01:48:21 +0530 | [diff] [blame] | 16 | extern u32 zynq_slcr_get_boot_mode(void); |
| Michal Simek | 15d654c | 2013-04-22 15:43:02 +0200 | [diff] [blame] | 17 | extern u32 zynq_slcr_get_idcode(void); |
| Michal Simek | f5ff7bc | 2013-06-17 14:37:01 +0200 | [diff] [blame] | 18 | extern void zynq_ddrc_init(void); |
| Michal Simek | eb1dfa7 | 2013-02-04 12:38:59 +0100 | [diff] [blame] | 19 | |
| Michal Simek | 0dd222b | 2013-04-22 14:56:49 +0200 | [diff] [blame] | 20 | /* Driver extern functions */ |
| 21 | extern int zynq_sdhci_init(u32 regbase); |
| 22 | |
| Michal Simek | eb1dfa7 | 2013-02-04 12:38:59 +0100 | [diff] [blame] | 23 | #endif /* _SYS_PROTO_H_ */ |