blob: 57128dc40eccfb4e12436cb6cde51685b86176bc [file] [log] [blame]
Michal Simekeb1dfa72013-02-04 12:38:59 +01001/*
2 * Copyright (c) 2013 Xilinx Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#ifndef _SYS_PROTO_H_
24#define _SYS_PROTO_H_
25
26extern void zynq_slcr_lock(void);
27extern void zynq_slcr_unlock(void);
28extern void zynq_slcr_cpu_reset(void);
Michal Simekd9f2c112012-10-15 14:01:23 +020029extern void zynq_slcr_gem_clk_setup(u32 gem_id, u32 rclk, u32 clk);
Michal Simekeb1dfa72013-02-04 12:38:59 +010030
31#endif /* _SYS_PROTO_H_ */