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wdenk544e9732004-02-06 23:19:44 +00001/*
2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02004 * SPDX-License-Identifier: GPL-2.0+
wdenk544e9732004-02-06 23:19:44 +00005 */
6
Peter Tyser68e27f42009-07-17 19:01:07 -05007/*
wdenk544e9732004-02-06 23:19:44 +00008 * config for XPedite1000 from XES Inc.
9 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
10 * (C) Copyright 2003 Sandburst Corporation
Wolfgang Denk0ee70772005-09-23 11:05:55 +020011 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
Peter Tyser68e27f42009-07-17 19:01:07 -050012 */
wdenk544e9732004-02-06 23:19:44 +000013
14#ifndef __CONFIG_H
15#define __CONFIG_H
16
Peter Tyser68e27f42009-07-17 19:01:07 -050017/* High Level Configuration Options */
Peter Tyser20934772009-07-17 19:01:16 -050018#define CONFIG_XPEDITE1000 1
Peter Tyserb0590e72009-07-17 19:01:15 -050019#define CONFIG_SYS_BOARD_NAME "XPedite1000"
John Schmollerd9c2dd52010-10-22 00:20:24 -050020#define CONFIG_SYS_FORM_PMC 1
wdenk544e9732004-02-06 23:19:44 +000021#define CONFIG_440 1
Stefan Roeseb30f2a12005-08-08 12:42:22 +020022#define CONFIG_440GX 1 /* 440 GX */
wdenk56ed43e2004-02-22 23:46:08 +000023#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
wdenk544e9732004-02-06 23:19:44 +000024#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
25
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020026#define CONFIG_SYS_TEXT_BASE 0xFFF80000
27
Peter Tyser2611a012009-07-17 19:01:13 -050028/*
29 * DDR config
30 */
31#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
32#define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
33#define CONFIG_VERY_BIG_RAM 1
wdenk544e9732004-02-06 23:19:44 +000034
Peter Tyser68e27f42009-07-17 19:01:07 -050035/*
wdenk544e9732004-02-06 23:19:44 +000036 * Base addresses -- Note these are effective addresses where the
37 * actual resources get mapped (not physical addresses)
Peter Tyser68e27f42009-07-17 19:01:07 -050038 */
Peter Tyser2611a012009-07-17 19:01:13 -050039#define CONFIG_SYS_SDRAM_BASE 0x00000000
40#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
Wolfgang Denk0708bc62010-10-07 21:51:12 +020041#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
Peter Tyser2611a012009-07-17 19:01:13 -050042#define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
Peter Tyser2611a012009-07-17 19:01:13 -050043#define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
44#define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
Peter Tyser68e27f42009-07-17 19:01:07 -050045#define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
46#define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
wdenk544e9732004-02-06 23:19:44 +000047
Peter Tyser2611a012009-07-17 19:01:13 -050048/*
49 * Diagnostics
50 */
Peter Tyserffecc5e2009-07-17 19:01:14 -050051#define CONFIG_SYS_ALT_MEMTEST
Peter Tyser2611a012009-07-17 19:01:13 -050052#define CONFIG_SYS_MEMTEST_START 0x0400000
53#define CONFIG_SYS_MEMTEST_END 0x0C00000
54
55/* POST support */
56#define CONFIG_POST (CONFIG_SYS_POST_RTC | \
57 CONFIG_SYS_POST_I2C)
58
59/*
60 * LED support
61 */
Peter Tyser68e27f42009-07-17 19:01:07 -050062#define USR_LED0 0x00000080
63#define USR_LED1 0x00000100
64#define USR_LED2 0x00000200
65#define USR_LED3 0x00000400
wdenk544e9732004-02-06 23:19:44 +000066
67#ifndef __ASSEMBLY__
68extern unsigned long in32(unsigned int);
69extern void out32(unsigned int, unsigned long);
70
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020071#define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
72#define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
73#define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
74#define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
wdenk544e9732004-02-06 23:19:44 +000075
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020076#define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
77#define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
78#define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
79#define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
wdenk544e9732004-02-06 23:19:44 +000080#endif
81
Peter Tyser2611a012009-07-17 19:01:13 -050082/*
83 * Use internal SRAM for initial stack
84 */
Peter Tyser68e27f42009-07-17 19:01:07 -050085#define CONFIG_SYS_TEMP_STACK_OCM 1
86#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
87#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +020088#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
Wolfgang Denk0191e472010-10-26 14:34:52 +020089#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Michael Zaidmanf969a682010-09-20 08:51:53 +020090#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
wdenk544e9732004-02-06 23:19:44 +000091
Peter Tyserffecc5e2009-07-17 19:01:14 -050092#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
93#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
wdenk544e9732004-02-06 23:19:44 +000094
Peter Tyser2611a012009-07-17 19:01:13 -050095/*
96 * Serial Port
97 */
Stefan Roese3ddce572010-09-20 16:05:31 +020098#define CONFIG_CONS_INDEX 1 /* Use UART0 */
Stefan Roese3ddce572010-09-20 16:05:31 +020099#define CONFIG_SYS_NS16550_SERIAL
100#define CONFIG_SYS_NS16550_REG_SIZE 1
101#define CONFIG_SYS_NS16550_CLK get_serial_clock()
102
Peter Tyser68e27f42009-07-17 19:01:07 -0500103#define CONFIG_SYS_BAUDRATE_TABLE \
104 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
Peter Tyserffecc5e2009-07-17 19:01:14 -0500105#define CONFIG_BAUDRATE 115200
Peter Tyser2611a012009-07-17 19:01:13 -0500106#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
107#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
wdenk544e9732004-02-06 23:19:44 +0000108
Peter Tyser68e27f42009-07-17 19:01:07 -0500109/*
Peter Tyser2611a012009-07-17 19:01:13 -0500110 * NOR flash configuration
Peter Tyser68e27f42009-07-17 19:01:07 -0500111 */
Peter Tyser147ea1b2009-07-17 19:01:08 -0500112#define CONFIG_SYS_MAX_FLASH_BANKS 3
113#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
114#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
Peter Tyser0ed08332009-07-17 19:01:03 -0500115#define CONFIG_FLASH_CFI_DRIVER
116#define CONFIG_SYS_FLASH_CFI
117#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Peter Tyser147ea1b2009-07-17 19:01:08 -0500118#define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
Peter Tyser68e27f42009-07-17 19:01:07 -0500119#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
120#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
wdenk544e9732004-02-06 23:19:44 +0000121
Peter Tyser2611a012009-07-17 19:01:13 -0500122/*
123 * I2C
124 */
Dirk Eibach42b204f2013-04-25 02:40:01 +0000125#define CONFIG_SYS_I2C
126#define CONFIG_SYS_I2C_PPC4XX
127#define CONFIG_SYS_I2C_PPC4XX_CH0
128#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
129#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
wdenk544e9732004-02-06 23:19:44 +0000130
Peter Tyser2611a012009-07-17 19:01:13 -0500131/* I2C EEPROM */
132#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
Peter Tyser68e27f42009-07-17 19:01:07 -0500133#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
134#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
135#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
wdenk544e9732004-02-06 23:19:44 +0000136
Peter Tyser2611a012009-07-17 19:01:13 -0500137/* I2C RTC: STMicro M41T00 */
138#define CONFIG_RTC_M41T11 1
139#define CONFIG_SYS_I2C_RTC_ADDR 0x68
140#define CONFIG_SYS_M41T11_BASE_YEAR 2000
141
142/*
143 * PCI
144 */
145/* General PCI */
Gabor Juhosb4458732013-05-30 07:06:12 +0000146#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
Peter Tyser2611a012009-07-17 19:01:13 -0500147#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
148#define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
149
150/* Board-specific PCI */
151#define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
152#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
153#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
154#define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
wdenk544e9732004-02-06 23:19:44 +0000155
Peter Tyser2611a012009-07-17 19:01:13 -0500156/*
157 * Networking options
158 */
Ben Warren3a918a62008-10-27 23:50:15 -0700159#define CONFIG_PPC4xx_EMAC
wdenkeec9a3d2004-03-23 23:20:24 +0000160#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
Peter Tyser2611a012009-07-17 19:01:13 -0500161#define CONFIG_MII 1 /* MII PHY management */
Peter Tyser68e27f42009-07-17 19:01:07 -0500162#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
163#define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
Peter Tyser2611a012009-07-17 19:01:13 -0500164#define CONFIG_ETHPRIME "ppc_4xx_eth2"
165#define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
166#define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
Peter Tyser68e27f42009-07-17 19:01:07 -0500167#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
Peter Tyser2611a012009-07-17 19:01:13 -0500168#define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
Peter Tyser68e27f42009-07-17 19:01:07 -0500169#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
wdenk54070ab2004-12-31 09:32:47 +0000170
Peter Tyser68e27f42009-07-17 19:01:07 -0500171/* BOOTP options */
Jon Loeligerbeb9ff42007-07-10 09:22:23 -0500172#define CONFIG_BOOTP_BOOTFILESIZE
173#define CONFIG_BOOTP_BOOTPATH
174#define CONFIG_BOOTP_GATEWAY
175#define CONFIG_BOOTP_HOSTNAME
176
Jon Loeligerbeb9ff42007-07-10 09:22:23 -0500177/*
Peter Tyser2611a012009-07-17 19:01:13 -0500178 * Command configuration
Jon Loeliger21616192007-07-08 15:31:57 -0500179 */
Jon Loeliger21616192007-07-08 15:31:57 -0500180#define CONFIG_CMD_DATE
Jon Loeliger21616192007-07-08 15:31:57 -0500181#define CONFIG_CMD_EEPROM
Peter Tyser831fa252009-07-17 19:01:12 -0500182#define CONFIG_CMD_IRQ
183#define CONFIG_CMD_JFFS2
Peter Tyser831fa252009-07-17 19:01:12 -0500184#define CONFIG_CMD_PCI
wdenk544e9732004-02-06 23:19:44 +0000185
wdenk544e9732004-02-06 23:19:44 +0000186/*
187 * Miscellaneous configurable options
188 */
Peter Tyser68e27f42009-07-17 19:01:07 -0500189#define CONFIG_SYS_LONGHELP /* undef to save memory */
Peter Tyser2611a012009-07-17 19:01:13 -0500190#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Peter Tyser68e27f42009-07-17 19:01:07 -0500191#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200192#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
Peter Tyser68e27f42009-07-17 19:01:07 -0500193#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
194#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Peter Tyserffecc5e2009-07-17 19:01:14 -0500195#define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
Peter Tyserffecc5e2009-07-17 19:01:14 -0500196#define CONFIG_PANIC_HANG /* do not reset board on panic */
197#define CONFIG_PREBOOT /* enable preboot variable */
Peter Tyserffecc5e2009-07-17 19:01:14 -0500198#define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
199#define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
Peter Tyser68e27f42009-07-17 19:01:07 -0500200
wdenk544e9732004-02-06 23:19:44 +0000201/*
202 * For booting Linux, the board info and command line data
203 * have to be in the first 8 MB of memory, since this is
204 * the maximum mapped by the Linux kernel during initialization.
205 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenk544e9732004-02-06 23:19:44 +0000207
208/*
Peter Tyser2611a012009-07-17 19:01:13 -0500209 * Environment Configuration
210 */
211#define CONFIG_ENV_IS_IN_FLASH 1
212#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
213#define CONFIG_ENV_SIZE 0x8000
214#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
215
216/*
Peter Tyser831fa252009-07-17 19:01:12 -0500217 * Flash memory map:
218 * fff80000 - ffffffff U-Boot (512 KB)
219 * fff40000 - fff7ffff U-Boot Environment (256 KB)
220 * fff00000 - fff3ffff FDT (256KB)
221 * ffc00000 - ffefffff OS image (3MB)
222 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
223 */
224
Marek Vasut0b3176c2012-09-23 17:41:24 +0200225#define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
226#define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
227#define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
Peter Tyser831fa252009-07-17 19:01:12 -0500228
229#define CONFIG_PROG_UBOOT \
230 "$download_cmd $loadaddr $ubootfile; " \
231 "if test $? -eq 0; then " \
232 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
233 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
234 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
235 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
236 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
237 "if test $? -ne 0; then " \
238 "echo PROGRAM FAILED; " \
239 "else; " \
240 "echo PROGRAM SUCCEEDED; " \
241 "fi; " \
242 "else; " \
243 "echo DOWNLOAD FAILED; " \
244 "fi;"
245
246#define CONFIG_BOOT_OS_NET \
247 "$download_cmd $osaddr $osfile; " \
248 "if test $? -eq 0; then " \
249 "if test -n $fdtaddr; then " \
250 "$download_cmd $fdtaddr $fdtfile; " \
251 "if test $? -eq 0; then " \
252 "bootm $osaddr - $fdtaddr; " \
253 "else; " \
254 "echo FDT DOWNLOAD FAILED; " \
255 "fi; " \
256 "else; " \
257 "bootm $osaddr; " \
258 "fi; " \
259 "else; " \
260 "echo OS DOWNLOAD FAILED; " \
261 "fi;"
262
263#define CONFIG_PROG_OS \
264 "$download_cmd $osaddr $osfile; " \
265 "if test $? -eq 0; then " \
266 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
267 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
268 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
269 "if test $? -ne 0; then " \
270 "echo OS PROGRAM FAILED; " \
271 "else; " \
272 "echo OS PROGRAM SUCCEEDED; " \
273 "fi; " \
274 "else; " \
275 "echo OS DOWNLOAD FAILED; " \
276 "fi;"
277
278#define CONFIG_PROG_FDT \
279 "$download_cmd $fdtaddr $fdtfile; " \
280 "if test $? -eq 0; then " \
281 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
282 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
283 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
284 "if test $? -ne 0; then " \
285 "echo FDT PROGRAM FAILED; " \
286 "else; " \
287 "echo FDT PROGRAM SUCCEEDED; " \
288 "fi; " \
289 "else; " \
290 "echo FDT DOWNLOAD FAILED; " \
291 "fi;"
292
293#define CONFIG_EXTRA_ENV_SETTINGS \
294 "autoload=yes\0" \
295 "download_cmd=tftp\0" \
296 "console_args=console=ttyS0,115200\0" \
297 "root_args=root=/dev/nfs rw\0" \
298 "misc_args=ip=on\0" \
299 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
300 "bootfile=/home/user/file\0" \
Peter Tyser6ae37062010-10-22 00:20:26 -0500301 "osfile=/home/user/board.uImage\0" \
302 "fdtfile=/home/user/board.dtb\0" \
Peter Tyser831fa252009-07-17 19:01:12 -0500303 "ubootfile=/home/user/u-boot.bin\0" \
Scott Woodb7f4b852016-07-19 17:52:06 -0500304 "fdtaddr=0x1e00000\0" \
Peter Tyser831fa252009-07-17 19:01:12 -0500305 "osaddr=0x1000000\0" \
306 "loadaddr=0x1000000\0" \
307 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
308 "prog_os="CONFIG_PROG_OS"\0" \
309 "prog_fdt="CONFIG_PROG_FDT"\0" \
310 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
311 "bootcmd_flash=run set_bootargs; " \
312 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
313 "bootcmd=run bootcmd_flash\0"
wdenk544e9732004-02-06 23:19:44 +0000314#endif /* __CONFIG_H */