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Macpaul Lin01cfa112010-10-19 17:05:51 +08001/*
2 * Copyright (C) 2011 Andes Technology Corporation
3 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
4 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Macpaul Lin01cfa112010-10-19 17:05:51 +08007 */
8
9#include <common.h>
rickdc24dac2017-05-23 13:48:27 +080010#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
Macpaul Lin01cfa112010-10-19 17:05:51 +080011#include <netdev.h>
rickf1113c92017-05-18 14:37:53 +080012#endif
13#include <linux/io.h>
Simon Glass692abc92017-05-17 08:22:57 -060014#include <asm/io.h>
15#include <asm/mach-types.h>
Macpaul Lin01cfa112010-10-19 17:05:51 +080016
Macpaul Lin01cfa112010-10-19 17:05:51 +080017#include <faraday/ftsmc020.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
21/*
22 * Miscellaneous platform dependent initializations
23 */
24
25int board_init(void)
26{
27 /*
28 * refer to BOOT_PARAMETER_PA_BASE within
29 * "linux/arch/nds32/include/asm/misc_spec.h"
30 */
rickf1113c92017-05-18 14:37:53 +080031 printf("Board: %s\n" , CONFIG_SYS_BOARD);
Macpaul Lin01cfa112010-10-19 17:05:51 +080032 gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
33 gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
34
Macpaul Lin01cfa112010-10-19 17:05:51 +080035 return 0;
36}
37
38int dram_init(void)
39{
40 unsigned long sdram_base = PHYS_SDRAM_0;
ken kuo7abab272013-06-08 11:14:09 +080041 unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
Macpaul Lin01cfa112010-10-19 17:05:51 +080042 unsigned long actual_size;
43
44 actual_size = get_ram_size((void *)sdram_base, expected_size);
45
46 gd->ram_size = actual_size;
47
48 if (expected_size != actual_size) {
49 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
50 actual_size >> 20, expected_size >> 20);
51 }
52
53 return 0;
54}
55
Simon Glass2f949c32017-03-31 08:40:32 -060056int dram_init_banksize(void)
ken kuo7abab272013-06-08 11:14:09 +080057{
58 gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
59 gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
60 gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
61 gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
Simon Glass2f949c32017-03-31 08:40:32 -060062
63 return 0;
ken kuo7abab272013-06-08 11:14:09 +080064}
65
rickdc24dac2017-05-23 13:48:27 +080066#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
Macpaul Lin01cfa112010-10-19 17:05:51 +080067int board_eth_init(bd_t *bd)
68{
69 return ftmac100_initialize(bd);
70}
rickf1113c92017-05-18 14:37:53 +080071#endif
Macpaul Lin01cfa112010-10-19 17:05:51 +080072
73ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
74{
75 if (banknum == 0) { /* non-CFI boot flash */
76 info->portwidth = FLASH_CFI_8BIT;
77 info->chipwidth = FLASH_CFI_BY8;
78 info->interface = FLASH_CFI_X8;
79 return 1;
80 } else {
81 return 0;
82 }
83}