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git01.mediatek.com / filogic / uboot / bd4bbe2bc0ce56097dd2f6fc16877d3501556068 / . / configs / rock5b-rk3588_defconfig
blob: c1155c20efa875c3ea15dfc195d4ba11809c63d6 [file] [log] [blame]
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_SKIP_LOWLEVEL_INIT=y
3CONFIG_COUNTER_FREQUENCY=24000000
4CONFIG_ARCH_ROCKCHIP=y
5CONFIG_TEXT_BASE=0x00a00000
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
8CONFIG_NR_DRAM_BANKS=2
9CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
10CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
Jonas Karlmanadb78942023-05-18 15:39:30 +0000[diff] [blame]11CONFIG_SF_DEFAULT_SPEED=24000000
12CONFIG_SF_DEFAULT_MODE=0x2000
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b"
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]14CONFIG_ROCKCHIP_RK3588=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]15CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
Jonas Karlmanadb78942023-05-18 15:39:30 +0000[diff] [blame]16CONFIG_ROCKCHIP_SPI_IMAGE=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]17CONFIG_SPL_SERIAL=y
18CONFIG_SPL_STACK_R_ADDR=0x600000
19CONFIG_TARGET_ROCK5B_RK3588=y
20CONFIG_SPL_STACK=0x400000
21CONFIG_DEBUG_UART_BASE=0xFEB50000
22CONFIG_DEBUG_UART_CLOCK=24000000
Jonas Karlmanadb78942023-05-18 15:39:30 +0000[diff] [blame]23CONFIG_SPL_SPI_FLASH_SUPPORT=y
24CONFIG_SPL_SPI=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]25CONFIG_SYS_LOAD_ADDR=0xc00800
Jonas Karlman9bfd6512023-05-17 18:26:37 +0000[diff] [blame]26CONFIG_PCI=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]27CONFIG_DEBUG_UART=y
28CONFIG_FIT=y
29CONFIG_FIT_VERBOSE=y
30CONFIG_SPL_FIT_SIGNATURE=y
31CONFIG_SPL_LOAD_FIT=y
Eugen Hristev7ea88fa2023-02-22 11:05:13 +0200[diff] [blame]32CONFIG_OF_BOARD_SETUP=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]33CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb"
34# CONFIG_DISPLAY_CPUINFO is not set
35CONFIG_DISPLAY_BOARDINFO_LATE=y
Jonas Karlman66688a52023-05-17 18:26:38 +0000[diff] [blame]36CONFIG_SPL_MAX_SIZE=0x40000
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]37CONFIG_SPL_PAD_TO=0x7f8000
38CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
39CONFIG_SPL_BSS_START_ADDR=0x4000000
40CONFIG_SPL_BSS_MAX_SIZE=0x4000
41# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
42# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
43CONFIG_SPL_STACK_R=y
Jonas Karlmanadb78942023-05-18 15:39:30 +0000[diff] [blame]44CONFIG_SPL_SPI_LOAD=y
45CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]46CONFIG_SPL_ATF=y
Jonas Karlman66688a52023-05-17 18:26:38 +0000[diff] [blame]47CONFIG_CMD_GPIO=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]48CONFIG_CMD_GPT=y
49CONFIG_CMD_MMC=y
Eugen Hristev1611a9b2023-05-17 13:01:02 +0300[diff] [blame]50CONFIG_CMD_PCI=y
Eugen Hristev47206f12023-05-17 12:21:26 +0300[diff] [blame]51CONFIG_CMD_USB=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]52# CONFIG_CMD_SETEXPR is not set
Eugen Hristev47206f12023-05-17 12:21:26 +0300[diff] [blame]53CONFIG_CMD_REGULATOR=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]54# CONFIG_SPL_DOS_PARTITION is not set
55CONFIG_SPL_OF_CONTROL=y
56CONFIG_OF_LIVE=y
Eugen Hristeve083ffe2023-05-15 16:44:03 +0300[diff] [blame]57CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]58CONFIG_SPL_REGMAP=y
59CONFIG_SPL_SYSCON=y
60CONFIG_SPL_CLK=y
61CONFIG_ROCKCHIP_GPIO=y
62CONFIG_SYS_I2C_ROCKCHIP=y
63CONFIG_MISC=y
64CONFIG_SUPPORT_EMMC_RPMB=y
65CONFIG_MMC_DW=y
66CONFIG_MMC_DW_ROCKCHIP=y
67CONFIG_MMC_SDHCI=y
68CONFIG_MMC_SDHCI_SDMA=y
69CONFIG_MMC_SDHCI_ROCKCHIP=y
Jonas Karlmanadb78942023-05-18 15:39:30 +0000[diff] [blame]70CONFIG_SPI_FLASH_MACRONIX=y
71CONFIG_SPI_FLASH_XTX=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]72CONFIG_ETH_DESIGNWARE=y
73CONFIG_GMAC_ROCKCHIP=y
Eugen Hristev1611a9b2023-05-17 13:01:02 +0300[diff] [blame]74CONFIG_PCIE_DW_ROCKCHIP=y
Eugen Hristev47206f12023-05-17 12:21:26 +0300[diff] [blame]75CONFIG_PHY_ROCKCHIP_INNO_USB2=y
Eugen Hristev1611a9b2023-05-17 13:01:02 +0300[diff] [blame]76CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
Eugen Hristeve083ffe2023-05-15 16:44:03 +0300[diff] [blame]77CONFIG_SPL_PINCTRL=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]78CONFIG_REGULATOR_PWM=y
79CONFIG_PWM_ROCKCHIP=y
80CONFIG_SPL_RAM=y
81CONFIG_BAUDRATE=1500000
82CONFIG_DEBUG_UART_SHIFT=2
Jonas Karlman66688a52023-05-17 18:26:38 +0000[diff] [blame]83CONFIG_SYS_NS16550_MEM32=y
Jonas Karlmanadb78942023-05-18 15:39:30 +0000[diff] [blame]84CONFIG_ROCKCHIP_SFC=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]85CONFIG_SYSRESET=y
Eugen Hristev47206f12023-05-17 12:21:26 +0300[diff] [blame]86CONFIG_USB=y
87CONFIG_USB_EHCI_HCD=y
88CONFIG_USB_EHCI_GENERIC=y
89CONFIG_USB_OHCI_HCD=y
90CONFIG_USB_OHCI_GENERIC=y
91CONFIG_USB_HOST_ETHER=y
92CONFIG_USB_ETHER_ASIX=y
93CONFIG_USB_ETHER_ASIX88179=y
94CONFIG_USB_ETHER_LAN75XX=y
95CONFIG_USB_ETHER_LAN78XX=y
96CONFIG_USB_ETHER_MCS7830=y
97CONFIG_USB_ETHER_RTL8152=y
98CONFIG_USB_ETHER_SMSC95XX=y
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200[diff] [blame]99CONFIG_ERRNO_STR=y