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Samuel Holland26bc4e72020-10-24 10:21:55 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (c) 2016 ARM Ltd.
Siarhei Siamashka3848f972016-03-29 17:29:11 +02003
4/dts-v1/;
5
Andre Przywara8d65e613e2017-05-24 10:34:56 +01006#include "sun50i-a64.dtsi"
Samuel Holland26bc4e72020-10-24 10:21:55 -05007#include "sun50i-a64-cpu-opp.dtsi"
Andre Przywara8d65e613e2017-05-24 10:34:56 +01008
9#include <dt-bindings/gpio/gpio.h>
Siarhei Siamashka3848f972016-03-29 17:29:11 +020010
11/ {
12 model = "Pine64";
Andre Przywara36748112016-05-04 22:15:33 +010013 compatible = "pine64,pine64", "allwinner,sun50i-a64";
Siarhei Siamashka3848f972016-03-29 17:29:11 +020014
Andre Przywara8d65e613e2017-05-24 10:34:56 +010015 aliases {
Andre Przywara0fcb8302018-07-04 14:16:35 +010016 ethernet0 = &emac;
Andre Przywara8d65e613e2017-05-24 10:34:56 +010017 serial0 = &uart0;
Andre Przywara0fcb8302018-07-04 14:16:35 +010018 serial1 = &uart1;
19 serial2 = &uart2;
20 serial3 = &uart3;
21 serial4 = &uart4;
Andre Przywara8d65e613e2017-05-24 10:34:56 +010022 };
23
Siarhei Siamashka3848f972016-03-29 17:29:11 +020024 chosen {
25 stdout-path = "serial0:115200n8";
26 };
Andre Przywara9607c052018-10-29 00:56:47 +000027
28 hdmi-connector {
29 compatible = "hdmi-connector";
30 type = "a";
31
32 port {
33 hdmi_con_in: endpoint {
34 remote-endpoint = <&hdmi_out_con>;
35 };
36 };
37 };
Andre Przywara0fcb8302018-07-04 14:16:35 +010038};
Siarhei Siamashka3848f972016-03-29 17:29:11 +020039
Samuel Holland26bc4e72020-10-24 10:21:55 -050040&codec {
41 status = "okay";
42};
43
44&codec_analog {
45 cpvdd-supply = <&reg_eldo1>;
46 status = "okay";
47};
48
49&cpu0 {
50 cpu-supply = <&reg_dcdc2>;
51};
52
53&cpu1 {
54 cpu-supply = <&reg_dcdc2>;
55};
56
57&cpu2 {
58 cpu-supply = <&reg_dcdc2>;
59};
60
61&cpu3 {
62 cpu-supply = <&reg_dcdc2>;
63};
64
65&dai {
66 status = "okay";
67};
68
Andre Przywara9607c052018-10-29 00:56:47 +000069&de {
70 status = "okay";
71};
72
Andre Przywara0fcb8302018-07-04 14:16:35 +010073&ehci0 {
74 status = "okay";
Siarhei Siamashka3848f972016-03-29 17:29:11 +020075};
Andre Przywara8d65e613e2017-05-24 10:34:56 +010076
77&ehci1 {
78 status = "okay";
Andre Przywara0fcb8302018-07-04 14:16:35 +010079};
80
81&emac {
82 pinctrl-names = "default";
83 pinctrl-0 = <&rmii_pins>;
84 phy-mode = "rmii";
85 phy-handle = <&ext_rmii_phy1>;
86 phy-supply = <&reg_dc1sw>;
87 status = "okay";
Andre Przywara9607c052018-10-29 00:56:47 +000088
89};
90
91&hdmi {
92 hvcc-supply = <&reg_dldo1>;
93 status = "okay";
94};
Andre Przywara0fcb8302018-07-04 14:16:35 +010095
Andre Przywara9607c052018-10-29 00:56:47 +000096&hdmi_out {
97 hdmi_out_con: endpoint {
98 remote-endpoint = <&hdmi_con_in>;
99 };
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100100};
101
102&i2c1 {
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100103 status = "okay";
104};
105
106&i2c1_pins {
107 bias-pull-up;
108};
109
Andre Przywara0fcb8302018-07-04 14:16:35 +0100110&mdio {
111 ext_rmii_phy1: ethernet-phy@1 {
112 compatible = "ethernet-phy-ieee802.3-c22";
113 reg = <1>;
114 };
115};
116
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100117&mmc0 {
118 pinctrl-names = "default";
119 pinctrl-0 = <&mmc0_pins>;
Andre Przywara0fcb8302018-07-04 14:16:35 +0100120 vmmc-supply = <&reg_dcdc1>;
121 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100122 disable-wp;
123 bus-width = <4>;
124 status = "okay";
125};
126
Andre Przywara0fcb8302018-07-04 14:16:35 +0100127&ohci0 {
128 status = "okay";
129};
130
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100131&ohci1 {
132 status = "okay";
Andre Przywara0fcb8302018-07-04 14:16:35 +0100133};
134
135&r_rsb {
136 status = "okay";
137
138 axp803: pmic@3a3 {
139 compatible = "x-powers,axp803";
140 reg = <0x3a3>;
141 interrupt-parent = <&r_intc>;
142 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
143 };
144};
145
146#include "axp803.dtsi"
147
Samuel Holland26bc4e72020-10-24 10:21:55 -0500148&ac_power_supply {
149 status = "okay";
150};
151
152&battery_power_supply {
153 status = "okay";
154};
155
Andre Przywara0fcb8302018-07-04 14:16:35 +0100156&reg_aldo2 {
157 regulator-always-on;
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <3300000>;
160 regulator-name = "vcc-pl";
161};
162
163&reg_aldo3 {
164 regulator-always-on;
165 regulator-min-microvolt = <3000000>;
166 regulator-max-microvolt = <3000000>;
167 regulator-name = "vcc-pll-avcc";
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100168};
169
Andre Przywara0fcb8302018-07-04 14:16:35 +0100170&reg_dc1sw {
171 regulator-name = "vcc-phy";
172};
173
174&reg_dcdc1 {
175 regulator-always-on;
176 regulator-min-microvolt = <3300000>;
177 regulator-max-microvolt = <3300000>;
178 regulator-name = "vcc-3v3";
179};
180
181&reg_dcdc2 {
182 regulator-always-on;
183 regulator-min-microvolt = <1040000>;
184 regulator-max-microvolt = <1300000>;
185 regulator-name = "vdd-cpux";
186};
187
188/* DCDC3 is polyphased with DCDC2 */
189
190/*
191 * The DRAM chips used by Pine64 boards are DDR3L-compatible, so they can
192 * work at 1.35V with less power consumption.
193 * As AXP803 DCDC5 cannot reach 1.35V accurately, use 1.36V instead.
194 */
195&reg_dcdc5 {
196 regulator-always-on;
197 regulator-min-microvolt = <1360000>;
198 regulator-max-microvolt = <1360000>;
199 regulator-name = "vcc-dram";
200};
201
202&reg_dcdc6 {
203 regulator-always-on;
204 regulator-min-microvolt = <1100000>;
205 regulator-max-microvolt = <1100000>;
206 regulator-name = "vdd-sys";
207};
208
209&reg_dldo1 {
210 regulator-min-microvolt = <3300000>;
211 regulator-max-microvolt = <3300000>;
212 regulator-name = "vcc-hdmi";
213};
214
215&reg_dldo2 {
216 regulator-min-microvolt = <3300000>;
217 regulator-max-microvolt = <3300000>;
218 regulator-name = "vcc-mipi";
219};
220
221&reg_dldo4 {
222 regulator-min-microvolt = <3300000>;
223 regulator-max-microvolt = <3300000>;
224 regulator-name = "vcc-wifi";
225};
226
227&reg_eldo1 {
228 regulator-min-microvolt = <1800000>;
229 regulator-max-microvolt = <1800000>;
230 regulator-name = "cpvdd";
231};
232
233&reg_fldo1 {
234 regulator-min-microvolt = <1200000>;
235 regulator-max-microvolt = <1200000>;
236 regulator-name = "vcc-1v2-hsic";
237};
238
239/*
240 * The A64 chip cannot work without this regulator off, although
241 * it seems to be only driving the AR100 core.
242 * Maybe we don't still know well about CPUs domain.
243 */
244&reg_fldo2 {
245 regulator-always-on;
246 regulator-min-microvolt = <1100000>;
247 regulator-max-microvolt = <1100000>;
248 regulator-name = "vdd-cpus";
249};
250
251&reg_rtc_ldo {
252 regulator-name = "vcc-rtc";
253};
254
Andre Przywara9607c052018-10-29 00:56:47 +0000255&simplefb_hdmi {
256 vcc-hdmi-supply = <&reg_dldo1>;
257};
258
Samuel Holland26bc4e72020-10-24 10:21:55 -0500259&sound {
260 simple-audio-card,aux-devs = <&codec_analog>;
261 simple-audio-card,widgets = "Microphone", "Microphone Jack",
262 "Headphone", "Headphone Jack";
263 simple-audio-card,routing =
Andre Przywarafb675472021-04-17 22:55:19 +0100264 "Left DAC", "DACL",
265 "Right DAC", "DACR",
Samuel Holland26bc4e72020-10-24 10:21:55 -0500266 "Headphone Jack", "HP",
Andre Przywarafb675472021-04-17 22:55:19 +0100267 "ADCL", "Left ADC",
268 "ADCR", "Right ADC",
Samuel Holland26bc4e72020-10-24 10:21:55 -0500269 "MIC2", "Microphone Jack";
270 status = "okay";
271};
272
Andre Przywara0fcb8302018-07-04 14:16:35 +0100273/* On Euler connector */
274&spdif {
275 status = "disabled";
276};
277
278/* On Exp and Euler connectors */
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100279&uart0 {
280 pinctrl-names = "default";
Andre Przywara9607c052018-10-29 00:56:47 +0000281 pinctrl-0 = <&uart0_pb_pins>;
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100282 status = "okay";
283};
284
Andre Przywara0fcb8302018-07-04 14:16:35 +0100285/* On Wifi/BT connector, with RTS/CTS */
286&uart1 {
287 pinctrl-names = "default";
288 pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
289 status = "disabled";
290};
291
292/* On Pi-2 connector */
293&uart2 {
294 pinctrl-names = "default";
295 pinctrl-0 = <&uart2_pins>;
296 status = "disabled";
297};
298
299/* On Euler connector */
300&uart3 {
301 pinctrl-names = "default";
302 pinctrl-0 = <&uart3_pins>;
303 status = "disabled";
304};
305
306/* On Euler connector, RTS/CTS optional */
307&uart4 {
308 pinctrl-names = "default";
309 pinctrl-0 = <&uart4_pins>;
310 status = "disabled";
311};
312
Andre Przywara8d65e613e2017-05-24 10:34:56 +0100313&usb_otg {
314 dr_mode = "host";
315 status = "okay";
316};
317
318&usbphy {
319 status = "okay";
320};