Siarhei Siamashka | 3848f97 | 2016-03-29 17:29:11 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2016 ARM Ltd. |
| 3 | * |
| 4 | * This file is dual-licensed: you can use it either under the terms |
| 5 | * of the GPL or the X11 license, at your option. Note that this dual |
| 6 | * licensing only applies to this file, and not this project as a |
| 7 | * whole. |
| 8 | * |
| 9 | * a) This library is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 of the |
| 12 | * License, or (at your option) any later version. |
| 13 | * |
| 14 | * This library is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * Or, alternatively, |
| 20 | * |
| 21 | * b) Permission is hereby granted, free of charge, to any person |
| 22 | * obtaining a copy of this software and associated documentation |
| 23 | * files (the "Software"), to deal in the Software without |
| 24 | * restriction, including without limitation the rights to use, |
| 25 | * copy, modify, merge, publish, distribute, sublicense, and/or |
| 26 | * sell copies of the Software, and to permit persons to whom the |
| 27 | * Software is furnished to do so, subject to the following |
| 28 | * conditions: |
| 29 | * |
| 30 | * The above copyright notice and this permission notice shall be |
| 31 | * included in all copies or substantial portions of the Software. |
| 32 | * |
| 33 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 34 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
| 35 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 36 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
| 37 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
| 38 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 39 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 40 | * OTHER DEALINGS IN THE SOFTWARE. |
| 41 | */ |
| 42 | |
| 43 | /dts-v1/; |
| 44 | |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 45 | #include "sun50i-a64.dtsi" |
| 46 | |
| 47 | #include <dt-bindings/gpio/gpio.h> |
Siarhei Siamashka | 3848f97 | 2016-03-29 17:29:11 +0200 | [diff] [blame] | 48 | |
| 49 | / { |
| 50 | model = "Pine64"; |
Andre Przywara | 3674811 | 2016-05-04 22:15:33 +0100 | [diff] [blame] | 51 | compatible = "pine64,pine64", "allwinner,sun50i-a64"; |
Siarhei Siamashka | 3848f97 | 2016-03-29 17:29:11 +0200 | [diff] [blame] | 52 | |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 53 | aliases { |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 54 | ethernet0 = &emac; |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 55 | serial0 = &uart0; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 56 | serial1 = &uart1; |
| 57 | serial2 = &uart2; |
| 58 | serial3 = &uart3; |
| 59 | serial4 = &uart4; |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 60 | }; |
| 61 | |
Siarhei Siamashka | 3848f97 | 2016-03-29 17:29:11 +0200 | [diff] [blame] | 62 | chosen { |
| 63 | stdout-path = "serial0:115200n8"; |
| 64 | }; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame^] | 65 | |
| 66 | hdmi-connector { |
| 67 | compatible = "hdmi-connector"; |
| 68 | type = "a"; |
| 69 | |
| 70 | port { |
| 71 | hdmi_con_in: endpoint { |
| 72 | remote-endpoint = <&hdmi_out_con>; |
| 73 | }; |
| 74 | }; |
| 75 | }; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 76 | }; |
Siarhei Siamashka | 3848f97 | 2016-03-29 17:29:11 +0200 | [diff] [blame] | 77 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame^] | 78 | &de { |
| 79 | status = "okay"; |
| 80 | }; |
| 81 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 82 | &ehci0 { |
| 83 | status = "okay"; |
Siarhei Siamashka | 3848f97 | 2016-03-29 17:29:11 +0200 | [diff] [blame] | 84 | }; |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 85 | |
| 86 | &ehci1 { |
| 87 | status = "okay"; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 88 | }; |
| 89 | |
| 90 | &emac { |
| 91 | pinctrl-names = "default"; |
| 92 | pinctrl-0 = <&rmii_pins>; |
| 93 | phy-mode = "rmii"; |
| 94 | phy-handle = <&ext_rmii_phy1>; |
| 95 | phy-supply = <®_dc1sw>; |
| 96 | status = "okay"; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame^] | 97 | |
| 98 | }; |
| 99 | |
| 100 | &hdmi { |
| 101 | hvcc-supply = <®_dldo1>; |
| 102 | status = "okay"; |
| 103 | }; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 104 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame^] | 105 | &hdmi_out { |
| 106 | hdmi_out_con: endpoint { |
| 107 | remote-endpoint = <&hdmi_con_in>; |
| 108 | }; |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 109 | }; |
| 110 | |
| 111 | &i2c1 { |
| 112 | pinctrl-names = "default"; |
| 113 | pinctrl-0 = <&i2c1_pins>; |
| 114 | status = "okay"; |
| 115 | }; |
| 116 | |
| 117 | &i2c1_pins { |
| 118 | bias-pull-up; |
| 119 | }; |
| 120 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 121 | &mdio { |
| 122 | ext_rmii_phy1: ethernet-phy@1 { |
| 123 | compatible = "ethernet-phy-ieee802.3-c22"; |
| 124 | reg = <1>; |
| 125 | }; |
| 126 | }; |
| 127 | |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 128 | &mmc0 { |
| 129 | pinctrl-names = "default"; |
| 130 | pinctrl-0 = <&mmc0_pins>; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 131 | vmmc-supply = <®_dcdc1>; |
| 132 | cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 133 | disable-wp; |
| 134 | bus-width = <4>; |
| 135 | status = "okay"; |
| 136 | }; |
| 137 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 138 | &ohci0 { |
| 139 | status = "okay"; |
| 140 | }; |
| 141 | |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 142 | &ohci1 { |
| 143 | status = "okay"; |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 144 | }; |
| 145 | |
| 146 | &r_rsb { |
| 147 | status = "okay"; |
| 148 | |
| 149 | axp803: pmic@3a3 { |
| 150 | compatible = "x-powers,axp803"; |
| 151 | reg = <0x3a3>; |
| 152 | interrupt-parent = <&r_intc>; |
| 153 | interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
| 154 | }; |
| 155 | }; |
| 156 | |
| 157 | #include "axp803.dtsi" |
| 158 | |
| 159 | ®_aldo2 { |
| 160 | regulator-always-on; |
| 161 | regulator-min-microvolt = <1800000>; |
| 162 | regulator-max-microvolt = <3300000>; |
| 163 | regulator-name = "vcc-pl"; |
| 164 | }; |
| 165 | |
| 166 | ®_aldo3 { |
| 167 | regulator-always-on; |
| 168 | regulator-min-microvolt = <3000000>; |
| 169 | regulator-max-microvolt = <3000000>; |
| 170 | regulator-name = "vcc-pll-avcc"; |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 171 | }; |
| 172 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 173 | ®_dc1sw { |
| 174 | regulator-name = "vcc-phy"; |
| 175 | }; |
| 176 | |
| 177 | ®_dcdc1 { |
| 178 | regulator-always-on; |
| 179 | regulator-min-microvolt = <3300000>; |
| 180 | regulator-max-microvolt = <3300000>; |
| 181 | regulator-name = "vcc-3v3"; |
| 182 | }; |
| 183 | |
| 184 | ®_dcdc2 { |
| 185 | regulator-always-on; |
| 186 | regulator-min-microvolt = <1040000>; |
| 187 | regulator-max-microvolt = <1300000>; |
| 188 | regulator-name = "vdd-cpux"; |
| 189 | }; |
| 190 | |
| 191 | /* DCDC3 is polyphased with DCDC2 */ |
| 192 | |
| 193 | /* |
| 194 | * The DRAM chips used by Pine64 boards are DDR3L-compatible, so they can |
| 195 | * work at 1.35V with less power consumption. |
| 196 | * As AXP803 DCDC5 cannot reach 1.35V accurately, use 1.36V instead. |
| 197 | */ |
| 198 | ®_dcdc5 { |
| 199 | regulator-always-on; |
| 200 | regulator-min-microvolt = <1360000>; |
| 201 | regulator-max-microvolt = <1360000>; |
| 202 | regulator-name = "vcc-dram"; |
| 203 | }; |
| 204 | |
| 205 | ®_dcdc6 { |
| 206 | regulator-always-on; |
| 207 | regulator-min-microvolt = <1100000>; |
| 208 | regulator-max-microvolt = <1100000>; |
| 209 | regulator-name = "vdd-sys"; |
| 210 | }; |
| 211 | |
| 212 | ®_dldo1 { |
| 213 | regulator-min-microvolt = <3300000>; |
| 214 | regulator-max-microvolt = <3300000>; |
| 215 | regulator-name = "vcc-hdmi"; |
| 216 | }; |
| 217 | |
| 218 | ®_dldo2 { |
| 219 | regulator-min-microvolt = <3300000>; |
| 220 | regulator-max-microvolt = <3300000>; |
| 221 | regulator-name = "vcc-mipi"; |
| 222 | }; |
| 223 | |
| 224 | ®_dldo4 { |
| 225 | regulator-min-microvolt = <3300000>; |
| 226 | regulator-max-microvolt = <3300000>; |
| 227 | regulator-name = "vcc-wifi"; |
| 228 | }; |
| 229 | |
| 230 | ®_eldo1 { |
| 231 | regulator-min-microvolt = <1800000>; |
| 232 | regulator-max-microvolt = <1800000>; |
| 233 | regulator-name = "cpvdd"; |
| 234 | }; |
| 235 | |
| 236 | ®_fldo1 { |
| 237 | regulator-min-microvolt = <1200000>; |
| 238 | regulator-max-microvolt = <1200000>; |
| 239 | regulator-name = "vcc-1v2-hsic"; |
| 240 | }; |
| 241 | |
| 242 | /* |
| 243 | * The A64 chip cannot work without this regulator off, although |
| 244 | * it seems to be only driving the AR100 core. |
| 245 | * Maybe we don't still know well about CPUs domain. |
| 246 | */ |
| 247 | ®_fldo2 { |
| 248 | regulator-always-on; |
| 249 | regulator-min-microvolt = <1100000>; |
| 250 | regulator-max-microvolt = <1100000>; |
| 251 | regulator-name = "vdd-cpus"; |
| 252 | }; |
| 253 | |
| 254 | ®_rtc_ldo { |
| 255 | regulator-name = "vcc-rtc"; |
| 256 | }; |
| 257 | |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame^] | 258 | &simplefb_hdmi { |
| 259 | vcc-hdmi-supply = <®_dldo1>; |
| 260 | }; |
| 261 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 262 | /* On Euler connector */ |
| 263 | &spdif { |
| 264 | status = "disabled"; |
| 265 | }; |
| 266 | |
| 267 | /* On Exp and Euler connectors */ |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 268 | &uart0 { |
| 269 | pinctrl-names = "default"; |
Andre Przywara | 9607c05 | 2018-10-29 00:56:47 +0000 | [diff] [blame^] | 270 | pinctrl-0 = <&uart0_pb_pins>; |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 271 | status = "okay"; |
| 272 | }; |
| 273 | |
Andre Przywara | 0fcb830 | 2018-07-04 14:16:35 +0100 | [diff] [blame] | 274 | /* On Wifi/BT connector, with RTS/CTS */ |
| 275 | &uart1 { |
| 276 | pinctrl-names = "default"; |
| 277 | pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; |
| 278 | status = "disabled"; |
| 279 | }; |
| 280 | |
| 281 | /* On Pi-2 connector */ |
| 282 | &uart2 { |
| 283 | pinctrl-names = "default"; |
| 284 | pinctrl-0 = <&uart2_pins>; |
| 285 | status = "disabled"; |
| 286 | }; |
| 287 | |
| 288 | /* On Euler connector */ |
| 289 | &uart3 { |
| 290 | pinctrl-names = "default"; |
| 291 | pinctrl-0 = <&uart3_pins>; |
| 292 | status = "disabled"; |
| 293 | }; |
| 294 | |
| 295 | /* On Euler connector, RTS/CTS optional */ |
| 296 | &uart4 { |
| 297 | pinctrl-names = "default"; |
| 298 | pinctrl-0 = <&uart4_pins>; |
| 299 | status = "disabled"; |
| 300 | }; |
| 301 | |
Andre Przywara | 8d65e613e | 2017-05-24 10:34:56 +0100 | [diff] [blame] | 302 | &usb_otg { |
| 303 | dr_mode = "host"; |
| 304 | status = "okay"; |
| 305 | }; |
| 306 | |
| 307 | &usbphy { |
| 308 | status = "okay"; |
| 309 | }; |