blob: 0e9a4cc9449e943e7a9f9ac0441f5ec87c0ff723 [file] [log] [blame]
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02001/*
Paul Kocialkowski4db92762016-02-07 16:50:50 +01002 * LG Optimus Black codename sniper config
Paul Kocialkowski3dee0002015-07-20 15:17:11 +02003 *
4 * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12#include <asm/arch/cpu.h>
13#include <asm/arch/omap.h>
14
15/*
16 * CPU
17 */
18
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020019#define CONFIG_ARM_ARCH_CP15_ERRATA
20#define CONFIG_ARM_ERRATA_454179
21#define CONFIG_ARM_ERRATA_430973
22#define CONFIG_ARM_ERRATA_621766
23
24/*
25 * Platform
26 */
27
28#define CONFIG_OMAP
29#define CONFIG_OMAP_COMMON
30
31/*
32 * Board
33 */
34
Paul Kocialkowski248b7912015-07-20 15:17:12 +020035#define CONFIG_MISC_INIT_R
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020036
37/*
38 * Clocks
39 */
40
41#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
42#define CONFIG_SYS_PTV 2
43
44#define V_NS16550_CLK 48000000
45#define V_OSCK 26000000
46#define V_SCLK (V_OSCK >> 1)
47
48/*
49 * DRAM
50 */
51
52#define CONFIG_SDRC
53#define CONFIG_NR_DRAM_BANKS 2
54#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
55#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
56
57/*
58 * Memory
59 */
60
61#define CONFIG_SYS_TEXT_BASE 0x80100000
Paul Kocialkowskid90f8832016-02-26 13:18:47 +010062#define CONFIG_SYS_SDRAM_BASE 0x80000000
63#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020064 GENERATED_GBL_DATA_SIZE)
65
66#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
67
68/*
69 * GPIO
70 */
71
72#define CONFIG_OMAP_GPIO
73#define CONFIG_OMAP3_GPIO_2
74#define CONFIG_OMAP3_GPIO_3
75#define CONFIG_OMAP3_GPIO_4
76#define CONFIG_OMAP3_GPIO_5
77#define CONFIG_OMAP3_GPIO_6
78
79/*
80 * I2C
81 */
82
83#define CONFIG_SYS_I2C
84#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
85#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
86#define CONFIG_SYS_I2C_OMAP34XX
87#define CONFIG_I2C_MULTI_BUS
88
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020089/*
90 * Flash
91 */
92
93#define CONFIG_SYS_NO_FLASH
94
95/*
96 * MMC
97 */
98
Paul Kocialkowski3dee0002015-07-20 15:17:11 +020099#define CONFIG_MMC
Paul Kocialkowskid90f8832016-02-26 13:18:47 +0100100#define CONFIG_GENERIC_MMC
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200101#define CONFIG_OMAP_HSMMC
102
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200103/*
104 * Power
105 */
106
107#define CONFIG_TWL4030_POWER
108
109/*
110 * Input
111 */
112
113#define CONFIG_TWL4030_INPUT
114
115/*
116 * Partitions
117 */
118
119#define CONFIG_PARTITION_UUIDS
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200120#define CONFIG_CMD_PART
121
122/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200123 * SPL
124 */
125
126#define CONFIG_SPL_FRAMEWORK
127
128#define CONFIG_SPL_TEXT_BASE 0x40200000
Tom Rinicfff4aa2016-08-26 13:30:43 -0400129#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
130 CONFIG_SPL_TEXT_BASE)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200131#define CONFIG_SPL_BSS_START_ADDR 0x80000000
132#define CONFIG_SPL_BSS_MAX_SIZE (512 * 1024)
133#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
134#define CONFIG_SYS_SPL_MALLOC_SIZE (1024 * 1024)
135#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
136
137#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
138#define CONFIG_SPL_BOARD_INIT
139
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200140#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION 2
141
142#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
143#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
144
145/*
146 * Console
147 */
148
149#define CONFIG_SYS_CONSOLE_IS_IN_ENV
150
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200151#define CONFIG_AUTO_COMPLETE
152
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200153#define CONFIG_SYS_LONGHELP
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200154
155#define CONFIG_SYS_MAXARGS 16
156#define CONFIG_SYS_CBSIZE 512
157#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \
158 + 16)
159
160/*
161 * Serial
162 */
163
Thomas Chou00ad1f02015-11-19 21:48:13 +0800164#ifdef CONFIG_SPL_BUILD
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200165#define CONFIG_SYS_NS16550_SERIAL
166#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200167#endif
168
Thomas Chou52ac4432015-11-19 21:48:12 +0800169#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200170#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
171#define CONFIG_CONS_INDEX 3
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200172
173#define CONFIG_BAUDRATE 115200
174#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, \
175 115200 }
176
177/*
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200178 * USB gadget
179 */
180
181#define CONFIG_USB_MUSB_PIO_ONLY
182#define CONFIG_USB_MUSB_OMAP2PLUS
183#define CONFIG_TWL4030_USB
184
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200185/*
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200186 * Fastboot
187 */
188
189#define CONFIG_USB_FUNCTION_FASTBOOT
190
191#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
192#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
193
194#define CONFIG_FASTBOOT_FLASH
195#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
196
197#define CONFIG_CMD_FASTBOOT
198
199/*
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200200 * Environment
201 */
202
203#define CONFIG_ENV_SIZE (128 * 1024)
204#define CONFIG_ENV_IS_NOWHERE
205
206#define CONFIG_ENV_OVERWRITE
207
208#define CONFIG_EXTRA_ENV_SETTINGS \
209 "kernel_addr_r=0x82000000\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100210 "loadaddr=0x82000000\0" \
211 "fdt_addr_r=0x88000000\0" \
212 "fdtaddr=0x88000000\0" \
213 "ramdisk_addr_r=0x88080000\0" \
214 "pxefile_addr_r=0x80100000\0" \
215 "scriptaddr=0x80000000\0" \
216 "bootm_size=0x10000000\0" \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200217 "boot_mmc_dev=0\0" \
218 "kernel_mmc_part=3\0" \
219 "recovery_mmc_part=4\0" \
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100220 "fdtfile=omap3-sniper.dtb\0" \
221 "bootfile=/boot/extlinux/extlinux.conf\0" \
Paul Kocialkowskic6b6c7f2016-03-29 14:16:21 +0200222 "bootargs=console=ttyO2,115200 vram=5M,0x9FA00000 omapfb.vram=0:5M\0"
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200223
224/*
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100225 * ATAGs
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200226 */
227
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200228#define CONFIG_SETUP_MEMORY_TAGS
229#define CONFIG_CMDLINE_TAG
230#define CONFIG_INITRD_TAG
231#define CONFIG_REVISION_TAG
Paul Kocialkowskic29a72f2015-07-20 15:17:14 +0200232#define CONFIG_SERIAL_TAG
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200233
234/*
235 * Boot
236 */
237
238#define CONFIG_SYS_LOAD_ADDR 0x82000000
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200239
240#define CONFIG_ANDROID_BOOT_IMAGE
241
242#define CONFIG_BOOTCOMMAND \
243 "setenv boot_mmc_part ${kernel_mmc_part}; " \
Paul Kocialkowski248b7912015-07-20 15:17:12 +0200244 "if test reboot-${reboot-mode} = reboot-r; then " \
245 "echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; " \
Paul Kocialkowski46f99102015-07-20 15:17:15 +0200246 "if test reboot-${reboot-mode} = reboot-b; then " \
247 "echo fastboot; fastboot 0; fi; " \
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200248 "part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; " \
249 "part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; " \
250 "mmc dev ${boot_mmc_dev}; " \
251 "mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && " \
252 "bootm ${kernel_addr_r};"
253
254/*
255 * Defaults
256 */
257
258#include <config_defaults.h>
Paul Kocialkowskida4ec912015-12-23 11:28:29 +0100259#include <config_distro_defaults.h>
Paul Kocialkowski3dee0002015-07-20 15:17:11 +0200260
261#endif