blob: 7cb71be0d9fd5cbbfc03d26a6f23a7671d5fc661 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Jaehoon Chung7aff9672012-10-15 19:10:31 +00002/*
3 * (C) Copyright 2012 SAMSUNG Electronics
4 * Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung7aff9672012-10-15 19:10:31 +00005 */
6
Sam Protsenko8d49cfb2024-08-07 22:14:22 -05007#ifndef __ASM_ARM_ARCH_DWMMC_H
8#define __ASM_ARM_ARCH_DWMMC_H
9
Jaehoon Chung7aff9672012-10-15 19:10:31 +000010#define DWMCI_CLKSEL 0x09C
Sam Protsenkoaf9dcff2024-08-07 22:14:37 -050011#define DWMCI_CLKSEL64 0x0a8
Jaehoon Chung7aff9672012-10-15 19:10:31 +000012#define DWMCI_SET_SAMPLE_CLK(x) (x)
13#define DWMCI_SET_DRV_CLK(x) ((x) << 16)
14#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
15
Rajeshwari Shinde70163092013-10-29 12:53:13 +053016#define EMMCP_MPSBEGIN0 0x1200
17#define EMMCP_SEND0 0x1204
18#define EMMCP_CTRL0 0x120C
19
20#define MPSCTRL_SECURE_READ_BIT (0x1<<7)
21#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6)
22#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5)
23#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4)
24#define MPSCTRL_USE_FUSE_KEY (0x1<<3)
25#define MPSCTRL_ECB_MODE (0x1<<2)
26#define MPSCTRL_ENCRYPTION (0x1<<1)
27#define MPSCTRL_VALID (0x1<<0)
28
Rajeshwari S Shindeccfa20b2014-02-05 10:48:15 +053029/* CLKSEL Register */
30#define DWMCI_DIVRATIO_BIT 24
31#define DWMCI_DIVRATIO_MASK 0x7
Sam Protsenko8d49cfb2024-08-07 22:14:22 -050032
33#endif /* __ASM_ARM_ARCH_DWMMC_H */