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Yuantian Tang92f18ff2019-04-10 16:43:34 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Yangbo Lubb32e682021-06-03 10:51:19 +08003 * Copyright 2019-2021 NXP
Yuantian Tang92f18ff2019-04-10 16:43:34 +08004 */
5
6#ifndef __L1028A_COMMON_H
7#define __L1028A_COMMON_H
8
Yuantian Tang92f18ff2019-04-10 16:43:34 +08009#include <asm/arch/stream_id_lsch3.h>
10#include <asm/arch/config.h>
11#include <asm/arch/soc.h>
12
13/* Link Definitions */
14#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
15
Yuantian Tang92f18ff2019-04-10 16:43:34 +080016#define CONFIG_VERY_BIG_RAM
17#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
18#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
19#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
20#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
21#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
22
Yuantian Tang92f18ff2019-04-10 16:43:34 +080023/*
24 * SMP Definitinos
25 */
Michael Wallef056e0f2020-06-01 21:53:26 +020026#define CPU_RELEASE_ADDR secondary_boot_addr
Yuantian Tang92f18ff2019-04-10 16:43:34 +080027
28/* Generic Timer Definitions */
29#define COUNTER_FREQUENCY 25000000 /* 25MHz */
30
Biwen Lie7c3b042021-02-05 19:01:57 +080031/* GPIO */
Biwen Lie7c3b042021-02-05 19:01:57 +080032
Yuantian Tang92f18ff2019-04-10 16:43:34 +080033/* I2C */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080034
35/* Serial Port */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080036#define CONFIG_SYS_NS16550_SERIAL
37#define CONFIG_SYS_NS16550_REG_SIZE 1
38#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
39
Yuantian Tang92f18ff2019-04-10 16:43:34 +080040/* Miscellaneous configurable options */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080041
42/* Physical Memory Map */
43#define CONFIG_CHIP_SELECTS_PER_CTRL 4
44
45#define CONFIG_HWCONFIG
46#define HWCONFIG_BUFFER_SIZE 128
47
Yuantian Tang92f18ff2019-04-10 16:43:34 +080048#define BOOT_TARGET_DEVICES(func) \
49 func(MMC, mmc, 0) \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080050 func(MMC, mmc, 1) \
Yuantian Tang7a224e72020-03-10 11:31:05 +080051 func(USB, usb, 0) \
52 func(DHCP, dhcp, na)
Yuantian Tang92f18ff2019-04-10 16:43:34 +080053#include <config_distro_bootcmd.h>
54
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080055#define XSPI_NOR_BOOTCOMMAND \
56 "run xspi_hdploadcmd; run distro_bootcmd; run xspi_bootcmd; " \
57 "env exists secureboot && esbc_halt;;"
Yuantian Tang92f18ff2019-04-10 16:43:34 +080058#define SD_BOOTCOMMAND \
Yuantian Tang7f3da7b2019-11-04 15:10:45 +080059 "run sd_hdploadcmd; run distro_bootcmd;run sd_bootcmd; " \
60 "env exists secureboot && esbc_halt;"
61#define SD2_BOOTCOMMAND \
62 "run emmc_hdploadcmd; run distro_bootcmd;run emmc_bootcmd; " \
Yuantian Tang92f18ff2019-04-10 16:43:34 +080063 "env exists secureboot && esbc_halt;"
64
65/* Monitor Command Prompt */
66#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
67#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
68 sizeof(CONFIG_SYS_PROMPT) + 16)
69#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
70
Yuantian Tang92f18ff2019-04-10 16:43:34 +080071#define CONFIG_SYS_MAXARGS 64 /* max command args */
72
73#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
74
Yuantian Tang92f18ff2019-04-10 16:43:34 +080075#define OCRAM_NONSECURE_SIZE 0x00010000
Yuantian Tang92f18ff2019-04-10 16:43:34 +080076#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000
Yuantian Tang92f18ff2019-04-10 16:43:34 +080077
78#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
79
Yuantian Tang92f18ff2019-04-10 16:43:34 +080080/* I2C bus multiplexer */
81#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
82#define I2C_MUX_CH_DEFAULT 0x8
83
84/* EEPROM */
Yuantian Tang92f18ff2019-04-10 16:43:34 +080085#define CONFIG_SYS_I2C_EEPROM_NXID
86#define CONFIG_SYS_EEPROM_BUS_NUM 0
Yuantian Tang92f18ff2019-04-10 16:43:34 +080087
Wen He41e63db2019-11-18 13:26:09 +080088/* DisplayPort */
89#define DP_PWD_EN_DEFAULT_MASK 0x8
90
Udit Agarwal22ec2382019-11-07 16:11:32 +000091#ifdef CONFIG_NXP_ESBC
Yuantian Tang029d8ab2019-05-24 14:36:27 +080092#include <asm/fsl_secure_boot.h>
93#endif
94
Alex Marginean3a918732019-07-03 12:11:39 +030095/* Ethernet */
96/* smallest ENETC BD ring has 8 entries */
97#define CONFIG_SYS_RX_ETH_BUFFER 8
98
Yuantian Tang92f18ff2019-04-10 16:43:34 +080099#endif /* __L1028A_COMMON_H */