blob: e19be0f7701feef1133dabd358bc0cd586dc6572 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
5
6#include <config.h>
7#include <common.h>
8#include <spl.h>
9#include <dm.h>
10#include <ram.h>
11#include <asm/io.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010012#include <power/pmic.h>
Patrick Delaunay91be5942019-02-04 11:26:16 +010013#include <power/stpmic1.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010014#include <asm/arch/ddr.h>
15
16void spl_board_init(void)
17{
18 /* Keep vdd on during the reset cycle */
Patrick Delaunayd79218f2019-02-04 11:26:17 +010019#if defined(CONFIG_PMIC_STPMIC1) && defined(CONFIG_SPL_POWER_SUPPORT)
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010020 struct udevice *dev;
21 int ret;
22
23 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Patrick Delaunayd79218f2019-02-04 11:26:17 +010024 DM_GET_DRIVER(pmic_stpmic1), &dev);
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010025 if (!ret)
26 pmic_clrsetbits(dev,
Patrick Delaunay880f29b2019-02-04 11:26:18 +010027 STPMIC1_BUCKS_MRST_CR,
28 STPMIC1_MRST_BUCK(STPMIC1_BUCK3),
29 STPMIC1_MRST_BUCK(STPMIC1_BUCK3));
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010030#endif
31}