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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom Warrend50f9052011-01-27 10:58:08 +00002/*
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
Tom Warrend50f9052011-01-27 10:58:08 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Alexey Brodkin267d8e22014-02-26 17:47:58 +040010#include <linux/sizes.h>
Simon Glassef2fb1a2012-04-02 13:19:03 +000011
12/* LP0 suspend / resume */
Tom Warren22562a42012-09-04 17:00:24 -070013#define CONFIG_TEGRA_LP0
Simon Glassef2fb1a2012-04-02 13:19:03 +000014#define CONFIG_TEGRA_PMU
15#define CONFIG_TPS6586X_POWER
16#define CONFIG_TEGRA_CLOCK_SCALING
17
Allen Martin55d98a12012-08-31 08:30:00 +000018#include "tegra20-common.h"
Tom Warrend50f9052011-01-27 10:58:08 +000019
20/* High-level configuration options */
Tom Warren22562a42012-09-04 17:00:24 -070021#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
Tom Warrend50f9052011-01-27 10:58:08 +000022
23/* Board-specific serial config */
Tom Warren22562a42012-09-04 17:00:24 -070024#define CONFIG_TEGRA_ENABLE_UARTD
Tom Warrend50f9052011-01-27 10:58:08 +000025#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
26
Stephen Warrenade0d5c2012-05-24 11:38:39 +000027/* Environment in eMMC, at the end of 2nd "boot sector" */
Simon Glass3e094a82012-02-27 10:52:52 +000028
Simon Glassbad90ee2012-07-29 20:53:30 +000029/* NAND support */
Simon Glassbad90ee2012-07-29 20:53:30 +000030#define CONFIG_TEGRA_NAND
31
32/* Max number of NAND devices */
33#define CONFIG_SYS_MAX_NAND_DEVICE 1
Simon Glass3e7b3292012-11-05 13:21:01 +000034
35#include "tegra-common-post.h"
36
Tom Warrend50f9052011-01-27 10:58:08 +000037#endif /* __CONFIG_H */