Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 2 | /* |
| 3 | * K2HK EVM : Board initialization |
| 4 | * |
| 5 | * (C) Copyright 2012-2014 |
| 6 | * Texas Instruments Incorporated, <www.ti.com> |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Simon Glass | 2dc9c34 | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 10 | #include <image.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 11 | #include <init.h> |
Vitaly Andrianov | 047e780 | 2014-07-25 22:23:19 +0300 | [diff] [blame] | 12 | #include <asm/arch/clock.h> |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 13 | #include <asm/arch/hardware.h> |
Khoronzhuk, Ivan | f2c13ba | 2014-09-29 22:17:22 +0300 | [diff] [blame] | 14 | #include <asm/ti-common/keystone_net.h> |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 15 | |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 16 | unsigned int external_clk[ext_clk_count] = { |
| 17 | [sys_clk] = 122880000, |
| 18 | [alt_core_clk] = 125000000, |
| 19 | [pa_clk] = 122880000, |
| 20 | [tetris_clk] = 125000000, |
| 21 | [ddr3a_clk] = 100000000, |
| 22 | [ddr3b_clk] = 100000000, |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 23 | }; |
| 24 | |
Lokesh Vutla | a9a0e12 | 2017-05-03 16:58:26 +0530 | [diff] [blame] | 25 | unsigned int get_external_clk(u32 clk) |
| 26 | { |
| 27 | unsigned int clk_freq; |
| 28 | |
| 29 | switch (clk) { |
| 30 | case sys_clk: |
| 31 | clk_freq = 122880000; |
| 32 | break; |
| 33 | case alt_core_clk: |
| 34 | clk_freq = 125000000; |
| 35 | break; |
| 36 | case pa_clk: |
| 37 | clk_freq = 122880000; |
| 38 | break; |
| 39 | case tetris_clk: |
| 40 | clk_freq = 125000000; |
| 41 | break; |
| 42 | case ddr3a_clk: |
| 43 | clk_freq = 100000000; |
| 44 | break; |
| 45 | case ddr3b_clk: |
| 46 | clk_freq = 100000000; |
| 47 | break; |
| 48 | default: |
| 49 | clk_freq = 0; |
| 50 | break; |
| 51 | } |
| 52 | |
| 53 | return clk_freq; |
| 54 | } |
| 55 | |
Lokesh Vutla | 9da9afa | 2015-07-28 14:16:44 +0530 | [diff] [blame] | 56 | static struct pll_init_data core_pll_config[NUM_SPDS] = { |
| 57 | [SPD800] = CORE_PLL_799, |
| 58 | [SPD1000] = CORE_PLL_999, |
| 59 | [SPD1200] = CORE_PLL_1200, |
Vitaly Andrianov | 047e780 | 2014-07-25 22:23:19 +0300 | [diff] [blame] | 60 | }; |
| 61 | |
Lokesh Vutla | 70438fc | 2015-07-28 14:16:43 +0530 | [diff] [blame] | 62 | s16 divn_val[16] = { |
| 63 | 0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 |
| 64 | }; |
| 65 | |
Vitaly Andrianov | 047e780 | 2014-07-25 22:23:19 +0300 | [diff] [blame] | 66 | static struct pll_init_data tetris_pll_config[] = { |
Lokesh Vutla | 9da9afa | 2015-07-28 14:16:44 +0530 | [diff] [blame] | 67 | [SPD800] = TETRIS_PLL_800, |
| 68 | [SPD1000] = TETRIS_PLL_1000, |
| 69 | [SPD1200] = TETRIS_PLL_1200, |
| 70 | [SPD1350] = TETRIS_PLL_1350, |
| 71 | [SPD1400] = TETRIS_PLL_1400, |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 72 | }; |
| 73 | |
Vitaly Andrianov | 047e780 | 2014-07-25 22:23:19 +0300 | [diff] [blame] | 74 | static struct pll_init_data pa_pll_config = |
| 75 | PASS_PLL_983; |
| 76 | |
Lokesh Vutla | 79a94a2 | 2015-07-28 14:16:46 +0530 | [diff] [blame] | 77 | struct pll_init_data *get_pll_init_data(int pll) |
| 78 | { |
| 79 | int speed; |
| 80 | struct pll_init_data *data; |
| 81 | |
| 82 | switch (pll) { |
| 83 | case MAIN_PLL: |
Lokesh Vutla | b35410e | 2016-03-04 10:36:40 -0600 | [diff] [blame] | 84 | speed = get_max_dev_speed(speeds); |
Lokesh Vutla | 79a94a2 | 2015-07-28 14:16:46 +0530 | [diff] [blame] | 85 | data = &core_pll_config[speed]; |
| 86 | break; |
| 87 | case TETRIS_PLL: |
Lokesh Vutla | b35410e | 2016-03-04 10:36:40 -0600 | [diff] [blame] | 88 | speed = get_max_arm_speed(speeds); |
Lokesh Vutla | 79a94a2 | 2015-07-28 14:16:46 +0530 | [diff] [blame] | 89 | data = &tetris_pll_config[speed]; |
| 90 | break; |
| 91 | case PASS_PLL: |
| 92 | data = &pa_pll_config; |
| 93 | break; |
| 94 | default: |
| 95 | data = NULL; |
| 96 | } |
| 97 | |
| 98 | return data; |
| 99 | } |
| 100 | |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 101 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
| 102 | int board_early_init_f(void) |
| 103 | { |
Lokesh Vutla | 79a94a2 | 2015-07-28 14:16:46 +0530 | [diff] [blame] | 104 | init_plls(); |
Vitaly Andrianov | 047e780 | 2014-07-25 22:23:19 +0300 | [diff] [blame] | 105 | |
Hao Zhang | 8e697a0 | 2014-07-09 23:44:46 +0300 | [diff] [blame] | 106 | return 0; |
| 107 | } |
| 108 | #endif |
Hao Zhang | 9594820 | 2014-10-22 16:32:31 +0300 | [diff] [blame] | 109 | |
Jean-Jacques Hiblot | 2037fa4 | 2017-09-15 12:57:24 +0200 | [diff] [blame] | 110 | #if defined(CONFIG_MULTI_DTB_FIT) |
Cooper Jr., Franklin | 43ff224 | 2017-06-16 17:25:16 -0500 | [diff] [blame] | 111 | int board_fit_config_name_match(const char *name) |
| 112 | { |
| 113 | if (!strcmp(name, "keystone-k2hk-evm")) |
| 114 | return 0; |
| 115 | |
| 116 | return -1; |
| 117 | } |
| 118 | #endif |
| 119 | |
Hao Zhang | 9594820 | 2014-10-22 16:32:31 +0300 | [diff] [blame] | 120 | #ifdef CONFIG_SPL_BUILD |
Hao Zhang | 9594820 | 2014-10-22 16:32:31 +0300 | [diff] [blame] | 121 | void spl_init_keystone_plls(void) |
| 122 | { |
Lokesh Vutla | 79a94a2 | 2015-07-28 14:16:46 +0530 | [diff] [blame] | 123 | init_plls(); |
Hao Zhang | 9594820 | 2014-10-22 16:32:31 +0300 | [diff] [blame] | 124 | } |
| 125 | #endif |